COMPUTER ORGANIZATION &

ASSEMBLY LANGUAGE(CS-215T)

Lecture by:
Dr. Abdul Hameed
Associate Professor
CSITD, SSUET

Batch
 Instructions
and
Operands
Types,
Week 4 Addressing
Requirement
s&
Addressing
Modes
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 SOURCE & RESULT OPERANDS…
WHERE TO FIND?
Source & result operands can be in four areas:
• Main Memory
Address of the main memory
• Processor Registers
a processor contains one or more registers
referenced by machine instructions
If only one register – reference is implicit
If more than one register – reference is explicit
• Immediate
Operand value exists in the instruction field
• I/O Device
I/O module & devise for operation 3

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4
 INSTRUCTION REPRESENTATION
Each instruction is represented by a sequence of bits
Instruction is divided into fields
Corresponding to the elements of instruction
A simple instruction format is depicted below

Symbolic representation is used for instructions

Opcodes are termed as mnemonics e.g.;
ADD SUB DIV MUL LOAD
ADC SBB MOV STOR
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 INSTRUCTION TYPES
Recall computer function
Instruction types can be categorized as:
Data processing:
Arithmetic and logic instructions
Data storage:
Moving data into/out of register and/or memory
Data movement:
I/O instructions
Control:
Test and branch instructions.

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 NUMBER OF ADDRESSES
REQUIRED?
Arithmetic and logic instructions will require the most
operands
All arithmetic and logic operations are either
unary (one source operand) or
binary (two source operands)
two addresses to reference source operands
Address to be stored also
one address to reference destination operand
Next instruction to be fetched
one address to reference next instruction
Mostly, next instruction is implicitly referenced
 Three addresses are required 7

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 INSTRUCTION SET DESIGN
Fundamental design issues include:

Operation
How many operations to provide? and how complex?
Data types:
Various types of data upon which operations are performed
Instruction format:
Instruction length, number of addresses, size of fields, so on.
Registers:
Number of registers that can be referenced by instructions?
Addressing:
Mode(s) by which address of an operand is specified.

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ADDRESSING MODES

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 TYPES OF OPERANDS
Machine instructions operate on data.

Types of operands are:

Addresses

Numbers

Characters

Logical data

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 ADDRESSING MODES
Addressing Modes

Allow us to specify location of the instruction operands

Can specify a constant, a register, or a location in memory

Certain modes allow shorter addresses

Some help to determine the location of the actual operand

often called the effective address of the operand

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 WHY ADDRESSING MODES?
To address data in memory in different ways
as and where needed!

Consider the following code in C language,

int x = 5;
int y, z;

z = &y;

What does the following instruction mean?

*(z) = x;
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 PHYSICAL & LOGICAL ADDRESSES
Physical Address

= (scaled) Segment Address

+
Offset Address

A Segment is equal to 64 KB of memory

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 PHYSICAL & LOGICAL ADDRESSES

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Sir Syed University of Engg. & Tech. Lecture by: Mr. Shakir Karim
 TYPES OF ADDRESSING MODES
• Immediate Addressing
• Register Addressing
• Direct Addressing
• Indirect Addressing
• Register indirect Addressing
• Displacement Addressing
• Stack Addressing

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 ADDRESSING MODES
Notations used in coming slides

A = contents of an address field in the instruction

R = contents of an address field in the instruction

that refers to a register

EA = actual (effective) address of the location

containing the referenced operand

(X) = contents of memory location X or register X

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 ADDRESSING MODES

Immediate Addressing Mode:

The simplest form of addressing

Operand value is present in the instruction

Operand = A

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 ADDRESSING MODES

Immediate Addressing Mode – Example:

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 Immediate Addressing

• Examples of the immediate-addressed instructions.

Assembly Language Size Operation
MOV BL, 44 8-bits Copies a 44 decimal (2CH) into BL
TheAX,
MOV term44Himmediate implies that theCopies
16-bits data aimmediately
0044H into AX
follow
MOV CH, the
100 hexadecimal8-bits
opcode in the memory.
Copies Also (64H) into CH
a 100 decimal
MOV
noteAL, 'A' immediate data
that 8-bits Copies
are con­stant an ASCII
data, whileAthe
into AL
MOV AX, 'AB' 16-bits Copies an ASCII BA into AX
data transferred
MOV CL, 11001110B
from a register
8-bits
are variable data.
Copies a 11001110 binary into CL
MOV EBX, 12340000H 32-bits Copies a 12340000H into EBX
MOV ESI, 12 32-bits Copies a 12 decimal into ESI
MOV EAX, 100B 32-bits Copies a 100 binary into EAX
 ADDRESSING MODES
Register Addressing Mode:
similar to direct addressing
the only difference is that
the address field refers to a register
rather than a main memory address
EA = R
Advantage:
Only small address field is needed
No time consuming
Disadvantage:
Very limited address space
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 ADDRESSING MODES
Register Addressing Mode - Examples:

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 Register Addressing
• Examples of the register-addressed instructions.
Assembly Language Size Operation
MOV AL, BL 8-bits Copies BL into AL
MOV CH, CL 8-bits Copies CL into CH
MOV AX, CX 16-bits Copies CX into AX
Register addressing
MOV SP, BP
is the most
16-bits
common form of data
Copies BP into SP
addressing and, once the
MOV BX, ES
registerCopies
16-bits
names are learned,
ES into BX
MOV ECX, EBX is the easiest
32-bits to apply.
Copies EBX into ECX
MOV ESP, EDX 32-bits Copies EDX into ESP
MOV ES, DS — Not allowed (segment-to-segment)
MOV BL, DX — Not allowed (mixed sizes)
 ADDRESSING MODES
Indirect Addressing Mode:
Pointer implementation
EA = (A)
parentheses means contents of
Advantage:
for a word length of N,
available address space is 2N
Disadvantage:
two memory references to fetch
the operand:
one to get its address
second to get its value 23

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 ADDRESSING MODES
Direct Addressing Mode:
very simple form

address field contains the

effective address of the operand

EA = A

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 ADDRESSING MODES
Direct Addressing Mode - Example:

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 ADDRESSING MODES
Direct Addressing Mode – Example 1-15:

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 Direct Data Addressing
• Examples of the Direct addressed instructions.

Direct addressing with a MOV instruction transfers

data between a memory location, located within
the data segment, and the AL (8-bit), AX (16-bit),
or EAX (32-bit) reg­ister.
Assembly Language Size Operation

MOV CH, DOG 8-bits Copies the byte contents of data segment
memory location DOG into CH
MOV CH, [1000H] 8-bits Copies the byte contents of data segment
offset address 1000HintoCH
MOV ES, DATA6 16-bits Copies the word contents of data
segment memory location DATA6 into ES
MOV DATA7, BP 16-bits Copies BP into data segment memory
location DATA7
MOV NUMBER, SP 16-bits Copies SP into data segment memory
location NUMBER
MOVDATA1, EAX 32-bits Copies EAX into data segment memory
location DATA1
MOV EDI, SUM1 32-bits Copies the doubleword contents of data
segment memory location SUM1 into EDI
 ADDRESSING MODES
Register Indirect Addressing Mode:
similar to indirect addressing
the only difference is that
the address field refers to a register
rather than a main memory address
EA = (R)
the parentheses are to be interpreted
as contents of

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 ADDRESSING MODES
Register Indirect Addressing Mode - Example:

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 ADDRESSING MODES
Register Indirect Addressing Mode–
Example 1.16:

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 Register Indirect Addressing

• Examples of the Register indirect addressed instructions.

Assembly
Size Operation
Language
MOV CX, [BX] 16-bits Copies the word contents of the data segment
memory location address by BX into CX
Register indirect
MOV [BP], DL addressing allows data to be
8-bits Copies DL into the stack segment memory
addressed at
MOV [DI], BH
any memory location through an
8-bits
location addressed by BP
Copies BH into the data segment memory
offset address held in any of the following
location addressed by Dl
MOV [DI], [BX] — Memory-to-memory moves are not allowed
registers: BP, BX, DI, and SI.
except with string instructions
MOV AL, [EDX] 8-bits Copies the byte contents of the data segment
memory location addressed by EDX into AL
MOV ECX, [EBX] 32-bits Copies the doubleword contents of the data
segment memory location addressed by EBX
into ECX
 ADDRESSING MODES
Displacement Addressing Mode:
A very powerful addressing mode
combines the capabilities of
direct addressing and
register indirect addressing
EA = A + (R)
the parentheses means contents of
Requires two address fields
Types of Displacement mode are:
Relative addressing [BX+2]
Base - Register addressing DS:[BX]
Indexing [BX][SI] or [SI] 32

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 ADDRESSING MODES
Displacement Addressing Mode:

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 ADDRESSING MODES
Displacement Addressing Mode –
Example 1.17:

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 ADDRESSING MODES
Displacement Addressing Mode:

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 ADDRESSING MODES
Stack Addressing Mode:
A form of implied addressing

No need to include a memory reference

in machine instructions

but

implicitly operate on the top of stack

using Stack Pointer

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 ADDRESSING MODES
Summary of Addressing Mode:

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 ADDRESSING MODES IN A GLANCE

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 ADDRESSING MODES: EXAMPLES

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 ADDRESSING MODES: EXAMPLES

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 ADDRESSING MODES: EXAMPLES

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 ADDRESSING MODES: EXAMPLES

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 ADDRESSING MODES: EXAMPLES

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 ADDRESSING MODES: EXAMPLES

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Questions and Answers
 What do the following MOV instructions
accomplish?
(a) MOV AX, BX (b) MOV BX, AX
(c) MOV BL, CH (d) MOV ESP, EBP
(e) MOV AX, CS

Instruction Accomplish

(a) MOV AX, BX Copy the contents of register BX into register AX

(b) MOV BX, AX Copy the contents of register AX into register BX

(c) MOVBL, CH Copy the contents of register CH into register BL

(d) MOV ESP, EBP Copy the contents of register EBP into register ESP

(e) MOV AX, CS Copy the contents of register CS into register AX

 List the 8-bit , 16-bit, registers that are used
for register addressing.

Registers

8-bit AH, AL, BH, BL, CH, CL, DH, DL

16-bit AX, BX,CX, DX, SP, BP, DI, SI

Select an for each of the following tasks:
(a) copy EBX iinstruction nto EDX (b) copy BL
into CL
(c) copy SI into BX (d) copy DS into AX
(e) copy AL into AH

Task Instruction

(a) copy EBX into EDX MOV EDX, EBX

(b) copy BL into CL MOV CL, BL

(c) copy SI into BX MOV BX, SI

(d) copy DS into AX MOV AX, DS

(e) copy AL into AH MOV AH, AL

Select an instruction for each of the following tasks:
(a) move a 12H into AL (b) move a 123AH into AX
(c) move a CDH into CL (d) move a 1000H into SI
(e) move a 1200A2H into EBX

Task Instruction

(a) move a 12H into AL MOV AL, 12H

(b) move a 123AH into AX MOV AX, 123H

(c) move a CDH into CL MOV CL, CDH

(d) move a 1000H into SI MOV SI, 1000H

(e) move a 1200A2H into EBX MOV EBX, 1200A2H

Suppose that DS = 0200H, BX= 0300H, and DI = 400H.
Determine the memory address ac­cessed by each of the
following instructions:
(a) MOV AL, [1234H] (b) MOV EAX, [BX]
(c) MOV [DI], AL

(a) Starting address of the segment (DS) 2000H

+ displacement (1234H) + 1234H
Memory location address 3234H
(b) Starting address of the segment (DS) 2000H
+ displacement (BX) + 0300H
Memory location address 2300H
(c) Starting address of the segment (DS) 2000H
+ displacement (DI) + 0400H
Memory location address 2400H
Suppose that DS = 1000H, SS = 2000H, BP = 1000H, and DI =
0100H. Determine the memory address accessed by each of
the following instructions, assuming real mode operation:
(a) MOV AL, [BP+DI] (b) MOV CX, [DI]
(c) MOV EDX, [BP]

(a) Starting address of the segment (SS) 20000H

+ Base (BP) + 1000H
+ Index (DI) + 0100H
Memory location address 21100H

(b) Starting address of the segment (DS) 10000H

+ displacement (DI) + 0100H
Memory location address 10100H

(c) Starting address of the segment (SS) 20000H

+ Base (BP) + 1000H
Memory location address 21000H
 Suppose that DS = 1200H, BX = 0100H, and SI = 0250H.
Determine the address accessed by each of the following
instructions,
(a) MOV [100H], DL (b) MOV [SI+100H], EAX
(c) MOV DL, [BX+100H]
(a) Starting address of the segment (DS) 12000H
+ displacement (100H) + 100H
Memory location address 12100H

(b) Starting address of the segment (DS) 12000H

+ register SI (0250H) + 0250H
+ displacement (100H) + 100H
Memory location address 12350H

(c) Starting address of the segment (SS) 20000H

+ register BX (0100H) + 0100H
+ displacement (100H) + 0100H
Memory location address 20200H
 Suppose that DS = 1100H, BX = 0200H, LIST = 0250H, and SI =
0500H, determine the ad­dress accessed by each of the
following instructions,
(a) MOV LIST[SI], EDX (b) MOV CL, LIST[BX+SI]
(c) MOV CH, [BX+SI]
(a) Starting address of the segment (DS) 11000H
+ address of List (0250H) + 0250H
+ register SI (0500H) + 0500H
Memory location address 11750H

(b) Starting address of the segment (DS) 11000H

+ address of List (0250H) + 0250H
+ register BX (0200H) + 0200H
+ register SI (0500H) + 0500H
Memory location address 11950H

(c) Starting address of the segment (DS) 11000H

+ register BX (0200H) + 0200H
+ register SI (0500H) + 0500H
Memory location address 11700H
Suppose that DS = 1300H, SS = 1400H, BP = 1500H, and SI =
0100H. Determine the address accessed by each of the
following instructions,
(a) MOV EAX, [BP+200H]
(b) MOV AL, [BP+SI-200H]

(a) Starting address of the segment (SS) 14000H

+ register BP (1500H) + 1500H
+ displacement (200H) + 200H
Memory location address 15700H

(b) Starting address of the segment (SS) 14000H

+ register BP (1500H) + 1500H
+ register SI (0100H) + 0100H
- displacement (200H) - 200H
Memory location address 15400H
 Suppose that DS = 1300H, SS = 1400H, BP = 1500H, and SI =
0100H. Determine the address accessed by each of the
following instructions,
(a) MOV EAX, [BP+200H]
(b) MOV AL, [BP+SI-200H]

(a) Starting address of the segment (SS) 14000H

+ register BP (1500H) + 1500H
+ displacement (200H) + 200H
Memory location address 15700H

(b) Starting address of the segment (SS) 14000H

+ register BP (1500H) + 1500H
+ register SI (0100H) + 0100H
- displacement (200H) - 200H
Memory location address 15400H
• Consider the following memory system and initial values of
registers. Assume that first instruction is fetch and executed by
microprocessor. Write all the steps of instruction fetch and execute
cycle. Also calculate the effective address and operand value for
each addressing mode in the following table:

Faculty of Electronic Engineering – Dept. of Computer Science & Eng.

‫جامعة المنوفية‬
Microprocessors Course 3 - 56
 Solution

Effective
Memory Registers Mode Address Operand
200 Opcode Mode 1. Immediate 201 500
201 Address = 500 PC [Link] 500 800
202 Next Instruction 200 [Link] 800 300
R1 [Link] - 400

399 450 400 5. Register Indirect 400 700

700 Index Register [Link] Mode 600 900

100 7. PC-relative mode 702 Target address

500 800 AC

600 900

702 Target Address

800 300

Faculty of Electronic Engineering – Dept. of Computer Science & Eng.

‫جامعة المنوفية‬
Microprocessors Course 3 - 57
 • An instruction is stored at location 300 with the address field at
location 301. The address field has value 250. A processor register R1
contains the number 200. Evaluate the effective address:
•
• i. Direct addressing mode
• ii. Relative addressing mode (PC-relative)
• iii. Register indirect addressing mode
•
• Solution:
• i. 250
• Direct addressing means that the address field contains the address of memory
location the instruction is supposed to work with (where an operand
"resides").Effective address would therefore be 250.
• ii. Relative addressing means that the address field contains offset to be added
to the program counter to address a memory location of the operand. Effective
address would therefore be 301 + 250= 551
• iii. 200

Faculty of Electronic Engineering – Dept. of Computer Science & Eng.

‫جامعة المنوفية‬
Microprocessors Course 3 - 58
•Consider a 6-words instructions as follows:

Op Code Mod1 Mod2 Add1 Add2

The first operand (destination) uses register indirect mode and second operand uses
indirect mode. Assume each operand is of size 2 word and main memory takes 20 ns
for 1 word access. What is the total memory access time required?
i. Fetch Cycle of instruction.
ii. Execute Cycle of instruction.
iii. Instruction Cycle of Instruction.

i. 6X20 = 120ns
ii. (2x20)+2X2X20+2X20 = 160ns
iii. 120+160 = 280ns

Faculty of Electronic Engineering – Dept. of Computer Science & Eng.

‫جامعة المنوفية‬
Microprocessors Course 3 - 59