CHAPTER - 5

PROGRAM CONTROL INSTRUCTIONS

1
 Contents

 Controlling the Flow of the Program

 The Jump Group
 Unconditional Jump (JMP)
 Conditional Jumps
 LOOP
 Procedures
 CALL
RET
 Introduction to Interrupts
Interrupt Vectors
 Interrupt Instructions
 Machine Control and Miscellaneous Instructions(Reading Assignment)
 Flag Control Instructions, WAIT,HLT,NOP
2
 Control flow instruction
 The 8086/8088 microprocessor executes each instruction one

by one in a sequential flow.

 Control flow instructions are used to alter the execution path of

sequential flow.
Can skip one or group of instruction

Can cause the execution of certain instructions to be repeated

 In the 8086 architecture, the code segment register and

instruction pointer keep track of the next instruction to be

fetched for execution. Thus, to initiate a change in control flow,
3 a jump instruction must change the contents of these registers.
 Jump (JMP) instruction
 Jump (JMP) instruction allows the programmer to skip
sections of a program and branch to any part of the
memory for the next instruction. Jump are two types:
Unconditional Jump
Conditional Jump

4
 Jump (JMP) instruction
 Example: shows how jump instructions pass control from one part
of the program to another. It also illustrates the use of a label (a
symbolic name for a memory) with the jump instruction.

;JMP operand
XOR BX,BX
;operand=label
START: MOV AX,1
MOV AL,02H
ADD AX,BX
MOV BL,04H
JMP NEXT
ADD BL,AL
MOV CX,200H
JMP ABC ; IP Value 0006=>000E
NEXT: MOV BX,AX
MOV AX,1023H
JMP START
MOV CX,4524H
5 ABC: MOV BH,BL
 JMP (UNCONDITIONAL JUMP TO SPECIFIED
DESTINATION)

 This instruction will fetch the next instruction from the location specified in

the instruction rather than from the next location after the JMP instruction.
 If the destination is in the same as code segment as the JMP instruction, then

only the instruction pointer will be changed to get the destination location. This
is referred to as a near jump.
 If the destination for the jump instruction is in a segment with a name different

from that of the segment containing the JMP instruction, then both the
instruction pointer and the code segment register content will be changed to get
the destination location. This referred to as a far jump.
 The JMP instruction does not affect any flag.
6
 Jump (JMP) instruction
 Unconditional Jump (JMP XXX)
 In the unconditional jump, the control is transferred unconditionally to the target
label.
 It does not depend any condition or numerical tests.
 Unconditional Jump types:
 Intrasegment: branch is with in the same segment.
 Value of the offset register will only change ,the value of the segment register
will remain same.
 Short and near jump are often called intrasegment jump
 Intersegment: branch is in a different segment.
 Value of both the offset register address and the segment address will change.
 far jumps are often called intersegment jump.
 Short jump and near jump follows a distance or displacement to jump where as
7
far jump follows an address (segment + offset) to jump.
 Jump (JMP) instruction

 Intrasegment: this is a jump within the current segment .This type

of jump is achieved by just modifying the value in IP.
 Short Jump: Format → JMP short Label (8 bit)
 Near Jump: Format → JMP near Label (16 bit)
 Mem.16: Format → JMP Mem.16
 Reg.16: Format → JMP Reg.16

8
 Jump (JMP) instruction
 Short Jump (JMP 1byte-displacement)
 Short jump is a two-byte instruction.
 Instead of a jump address, it jumps by following a 8-bit (one byte)
signed displacement .
 It allows jumps or branches to memory location within +127 and -128
bytes from the address following the jump.
 The displacement is sign-extended and added to the instruction pointer
(IP) to generate the jump address within the current code segment.

 Format: JMP disp ; here disp is 8-bit signed displacement or distance

9
 Jump (JMP) instruction
 Example: JMP 04 H

;JMP operand
;operand=direct
MOV AL,02H
JMP 04H ; 04=>IP
MOV AX,50H
HLT

10
 Jump (JMP) instruction
 Near Jump (JMP 2byte-displacement)
 Near jump is similar to short jump, except that the distance is farther.
 Near jump is a three-byte instruction.
 In NEAR the control is transferred within the current code segment (intrasegment). IP is
changed.
 Displacement is 16-bit (2 byte) signed displacement.
 It allows jumps or branches to memory location within ±32 𝐾 𝑏𝑦𝑡𝑒𝑠 of current code
segment.
 216=65536=64𝐾𝑏𝑦𝑡 65536 = −32𝐾𝑏𝑦𝑡𝑒 𝑡𝑜+32𝐾𝑏𝑦𝑡𝑒
1024
 The signed displacement added to the instruction pointer (IP) to generate the jump
address.

 Example: Consider the following example of an unconditional jump instruction:

JMP 1234H
 It means jump to address 1234H.
11
 Jump (JMP) instruction
 The jump-to address can also be specified indirectly by the contents of a memory
location or the contents of a register, corresponding to the Mem.16 and Reg.16
operand, respectively.
 Just as for the Near-label operand, they both permit a jump to any address in the
current code segment.
 Example: JMP BX
 uses the contents of register BX for the offset in the current code segment that
is, the value in BX is copied into IP.
 This instruction replaces the content of IP with the content of BX. BX must first
be loaded with the offset of the destination instruction in CS. This is a near jump.
It is also referred to as an indirect jump because the new value of IP comes from
a register rather than from the instruction itself, as in a direct jump.
 To specify an operand as a pointer to memory, the various addressing modes of
8086 can be used, For instance:
 Example: JMP [BX]
 uses the contents of BX as the offset address of them memory location that
12 contains the value of IP (Mem.16 operand).
 Jump (JMP) instruction

 Intersegment: this is a jump out of the current segment. This type of jump
requires modification of the contents of both CS and IP.
 Far Jump (JMP 4byte-displacement)
 A far jump instruction obtain a new segment and offset address to accomplish the
jump. Format → JMP far Label (32 bit label)
 It is a 5 byte instruction. Byte 2 and 3 contain new offset address. Byte 4 and 5
contains new segment address.

 It allows jumps or branches to any memory location of any memory segment.

That’s why far jump is called intersegment jump.
 Ex: JMP label(4-byteaddress)
JMP 1234H:5678H
 Transfers control to another part of the program. 4-byte address may be entered
in this form: 1234h:5678h, first value is a segment second value is an offset.
 In FAR the control is transferred outside the current code segment
13 (intersegment). Both CS and IP are changed.
 Jump (JMP) instruction
 Example: JMP A300H:0127H
 Jump to CSX10+IP = A300X10+0127 = A3127

14
 Jump (JMP) instruction
 Conditional Jump
 A conditional jump instruction allows the programmer to make decision
based upon numerical tests.
 The conditional jump instructions are always short jump in 8086.
Format: Jcc Label => cc = NZ,Z,C,NC,BE,BA …..
 Conditional jump instructions test the following flag bits: sign (S), zero
(O), carry (C), parity (P) and overflow(O).
 If the condition under test is true, a branch to the label associated with the
jump instruction occurs. If the condition is false, the next sequential step
in the program executes.
 In the conditional jump, control is transferred to a new location if a certain
condition is met. JC (jump if carry) [CF is checked], JNZ (jump if not
zero) [ZF is checked].
15

Some common conditional jump instructions are:

Opcode Operation Condition tested

JA Jump if above Z=0 & C=0
JAE Jump if above or equal C=0
JB Jump if below C=1
JBE Jump if below or equal Z=1 or C=1
JC Jump if carry set C=1
JE or JZ Jump if equal or jump if zero Z=1
JNE or JNZ Jump if not equal or jump if not zero Z=0
JNC Jump if no carry C=0
JNP or JPO Jump if no parity or jump if parity odd P=0
JP or JPE Jump if parity or jump if parity even P=1
 Jump (JMP) instruction
For example, a JC will jump if the carry bit is set.
MOV AX,8000H
MOV BX,9D35H
ADD AX,BX
JC XYZ
MOV CX,5000H
HLT
XYZ:MOV DX,6000H
HLT
 For example, a JZ will jump if the zero bit is set
MOV AX,1234H
MOV BX,1235H
XOR AX,BX
JZ XYZ
MOV CX,5000H
HLT
XYZ:MOV DX,6000H
17
HLT
 Controlling the Flow of the Program
 LOOP Instruction (JUMP TO SPECIFIED LABEL IF CX 0 AFTER AUTO
DECREMENT)
 The loop instruction is a combination of a decrement CX and the JNZ conditional
jump. In the 8086 processor, LOOP decrement CX, if CX!=0, it jumps to the
address indicated by the label. If CX becomes 0, the next sequential instruction
executes.
 The LOOP instruction executes the group of instructions a number of times .The
number of iterations will depend on the condition to be satisfied. The CX register
will perform the LOOP operation on the instructions to be iterated.
 For every execution of LOOP instruction, the CX is automatically decremented by
one without affecting flags and performs a short jump to the target address. This
loop will continue until the CX becomes zero. When CX = 0, the execution of the
loop will stop and the instructions after the LOOP will start execution.

18
 Controlling the Flow of the Program
 LOOP Instruction
 LOOP LABEL=>Loop to LABEL if CX is not zero
 If CX ≠ 0, it jumps to the address indicated by the label.
 when CX (the count register) becomes 0, the next sequential instruction executes.
 EXAMPLES:
PRICES DB 10H,20H,30H,45H ; Declare array of 4 bytes named PRICE
;and initialize them with specified values.
MOV BX, OFFSET PRICES ;Point BX at first element in array
MOV CX, 5H ;Load CX with number of elements in array
NEXT: MOV AL, [BX] ; Get element from array
INC AL ;Increment the content of AL
MOV [BX], AL ;Put result back in array
INC BX ;Increment BX to point to next location
LOOP NEXT ;Repeat until CX=0
MOV CX, 0005 MOV AX, 00H
XOR BX,BX MOV BX,02H
L1: MOV AX,01 MOV CX,03H
ADD AX,BX XYZ: ADD AX,BX
MOV BX,AX LOOP XYZ
19
LOOP L1 HLT
 Procedures
 A procedure is a group of instructions (subroutine or function) that
usually perform a specific task.
 Advantages and Disadvantages of using procedure :
 Advantages :
 Allows to save memory space.
 Program development becomes easier.
 Debugging of errors in program become easy.
 Reduced size of program
 Reusability of procedure.
 Disadvantages :
 CALL and RET instructions are always required to integrate with
procedures.
 Requires the extra time to link procedure and return from it.
 For small group of instructions, linking and returning back time more
than the execution time, hence for small group of instructions
20
procedures cannot be preferred.
 Procedures
 How procedure links with main program
 The CALL instruction links to the procedure and the RET (return)
instruction return from the procedure.
 The CALL instruction pushes the address (return address) of the
instruction following the CALL on the stack. The RET instruction
removes an address from the stack so the program return to the
instruction following the CALL.
 A procedure begins with the PROC directive and ends with the
ENDP directive.
 The PROC directive is followed by the type of procedure: NEAR
(intrasegment) or FAR (intersegment).

21
 Procedures
 Format of Procedure

Procedure_name PROC NEAR/FAR Example:

…………………………………….. SUMS PROC NEAR
…………………………………….. ADD AX,BX
…………………………………….. ADD AX,CX
RET ADD AX,DX
procedure_name ENDP RET
SUMS ENDP
 N.B
 procedure_name should match in PROC and ENDP
 PROC to define name of procedure & mark its beginning
 ENDP to mark end of procedure
 To call a procedure in main program write: CALL Procedure_name or
CALL FAR Procedure_name
22
 The RET instruction return to the caller
 Procedures
 Example of a procedure definition
 The SUMOF procedure calculates the sum of three integers,
receives three integer parameters
 Assumed to be in AX, BX, and CX
 Computes and returns result in register AX

SUMOF PROC
ADD AX,BX ;AX=AX + second number
ADD AX,CX ; AX=AX + third number
RET ;return to caller
SUMOF ENDP

23
 The Call instruction
 The CALL instruction transfer the flow of the program to the procedure. The
CALL instruction differ from a jump instruction because a CALL saves a return
address on the stack.
 To invoke a procedure, the call instruction used.
 The CALL instruction has the following format
 CALL procedure_name
 Example on calling the procedure SUMOF
 Caller passes actual parameters in AX,BX, and CX before calling procedure
SUMOF
MOV AX,NUM1 ;Pass first parameter in AX
MOV BX,NUM2 ;Pass second parameter in BX
MOV CX,NUM3 ;Pass third parameter in CX
CALL SUMOF ;result is in AX
MOV SUM,AX ;Save result in variable SUM
24 CALL SUMOF will call the procedure SUMOF
 CALL (CALL A PROCEDURE)
 The CALL instruction is used to transfer execution to a subprogram or a
procedure. There two basic type of calls near and far.
 A near call is a call to a procedure, which is in the same code segment as
the CALL instruction.
 When the 8086 executes a near CALL instruction, it decrements the stack
pointer by 2 and copies the offset of the next instruction after the CALL into
the stack.
 This offset saved in the stack is referred to as the return address, because
this is the address that execution will return to after the procedure is
executed.
 A near CALL instruction will also load the instruction pointer with the
offset of the first instruction in the procedure.
 A RET instruction at the end of the procedure will return execution to the
offset saved on the stack which is copied back to IP.
25
 CALL (CALL A PROCEDURE)
 A far call is a call to a procedure, which is in a different segment
from the one that contains the CALL instruction.
 When the 8086 executes a far call, it decrements the stack pointer
by 2 and copies the content of the CS register to the stack. It then
decrements the stack pointer by 2 again and copies the offset of the
instruction after the CALL instruction to the stack.
 Finally, it loads CS with the segment base of the segment that
contains the procedure, and loads IP with the offset of the first
instruction of the procedure in that segment.
 A RET instruction at the end of the procedure will return execution
to the next instruction after the CALL by restoring the saved values
of CS and IP from the stack.

26
 CALL (CALL A PROCEDURE)
 Difference between Near CALL and Far Call

27
 RET instruction
 RET (RETURN EXECUTION FROM PROCEDURE TO
CALLING PROGRAM)
 The RET instruction will return execution from a procedure to the
next instruction after the CALL instruction which was used to call
the procedure.
 If the procedure is near procedure (in the same code segment as the
CALL instruction), then the return will be done by replacing the IP
with a word from the top of the stack.
 The word from the top of the stack is the offset of the next
instruction after the CALL. This offset was pushed into the stack as
part of the operation of the CALL instruction.
 The stack pointer will be incremented by 2 after the return address is
popped off the stack.
28
 RET instruction
If the procedure is a far procedure (in a code segment
other than the one from which it is called), then the
instruction pointer will be replaced by the word at the top
of the stack.
This word is the offset part of the return address put there
by the CALL instruction. The stack pointer will then be
incremented by 2.
The CS register is then replaced with a word from the
new top of the stack. This word is the segment base part
of the return address that was pushed onto the stack by a
far call operation.
After this, the stack pointer is again incremented by 2.
29
 RET instruction
 The return (RET) instruction removes a 16-bit number (near return)
from the stack and places it into IP or removes a 32-bit number (far
return) and places it into IP and CS.
 The near and far return instructions are both defined in the
procedure’s PROC directive, which automatically selects the proper
return instruction.
 A RET instruction can be followed by a number, for example, RET
6. In this case, the stack pointer will be incremented by an
additional six addresses after the IP when the IP and CS are popped
off the stack. This form is used to increment the stack pointer over
parameters passed to the procedure on the stack.
 The RET instruction does not affect any flag.

30
 RET instruction
 Example: CALL MULT
 This is a direct within segment (near or intra segment) call. MULT is the name of
the procedure. The assembler determines the displacement of MULT from the
instruction after the CALL and codes this displacement in as part of the
instruction.
 Example: CALL BX
 This is an indirect within-segment (near or intra-segment) call. BX contains the
offset of the first instruction of the procedure. It replaces content of IP with
content of register BX.
 Example: CALL FAR DIVIDE
 This is a direct call to another segment (far or inter-segment call). DIVIDE is the
name of the procedure. The procedure must be declared far with DIVIDE PROC
FAR at its start. The assembler will determine the code segment base for the
segment that contains the procedure and the offset of the start of the procedure. It
will put these values in as part of the instruction code.
31
 How a procedure call/return work?
 How does a procedure Know where to return?
There can be multiple calls to same procedure in a program
Procedure has to return differently for different calls
 It knows by saving the return address(RA) on the stack
This is the address of next instruction after CALL
 The CALL instruction calls procedure
 PUSH IP(Push offset of next instruction on the stack)
 JMP procedure_address(copies the address of the called
procedure into IP)
 The RET(return) instruction does the following
 POP IP(POP top of stack into IP)
32
 How a procedure call/return work?
Example:

main PROC
MOV AX,1000H ;Pass first parameter in AX main proc
MOV BX,2000H ;Pass second parameter in BX MOV AX,2H
MOV CX,3000H ;Pass third parameter in CX CALL SUB1
CALL SUMOF ;result is in AX MOV BX,3H
MOV DX,AX ;Save result in DX MAIN ENDP
HLT SUB1 PROC
MAIN ENDP MOV AX,5H
MOV CX,6H
SUMOF PROC
ADD AX,BX ;AX=AX + second number RET
ADD AX,CX ; AX=AX + third number SUB1 ENDP
RET ;return to caller
SUMOF ENDP

33
 Procedures
 Difference between JMP and CALL instruction

34
 INTERRUPTS
 An interrupt is an event that requests the CPU to suspend the program
execution briefly and run a subroutine called Interrupt Service Routine
(ISR).
 After executing the ISR, the CPU resumes the program execution from
the point it left the program.

 An interrupt means an event has occurred and a relevant action should be

taken.
 An event can be a signal coming from a device such as sensor, circuit,
35 timer, etc.
 INTERRUPTS
 Interrupt is the method of creating a temporary halt during program
execution and allows peripheral devices to access the
microprocessor.
 The microprocessor responds to that interrupt with an ISR
(Interrupt Service Routine), which is a short program to instruct the
microprocessor on how to handle the interrupt.
 It means interrupting the normal execution of the microprocessor.
 When microprocessor receives interrupt signal, it discontinues
whatever it was executing.
 It starts executing new program indicated by the interrupt signal.
 Interrupt signals are generated by external peripheral devices.
 After execution of the new program, microprocessor goes back to
the previous program.
36
 INTERRUPTS
 When the 8086 is executing a program, it can get interrupted
because of one the following: -
Due to an interrupt getting activated. This is called as hardware
interrupt.
Due to an exceptional happening during an instruction execution,
such as division of a number by zero. This is generally termed as
exception or traps
Due to the execution of an interrupt instruction like “INT 21H”.
This is called a software interrupt. The action taken by the 8086
is similar for all the three cases, except for minor differences.

37
 INTERRUPTS

38
 INTERRUPTS

39
 INTERRUPTS
 Hardware Interrupts
 Hardware interrupt is caused by any peripheral device by sending a signal
through a specified pin to the microprocessor.
 The 8086 has two hardware interrupt pins, i.e. NMI and INTR.
 NMI is a non-maskable interrupt and INTR is a maskable interrupt having lower
priority. One more interrupt pin associated is INTA called interrupt acknowledge.
 NMI: Non-maskable interrupt ,used for major system faults such as parity errors
and power failures.
 highest priority interrupts.
 Non Maskable Interrupt input pin which means that any interrupt request at NMI
input cannot to masked or disabled by any means.
 Can’t be disabled or ignored by the CPU.
 Used for critical applications, e.g., in case of loss of power, the CPU can save
the contents of the registers in a nonvolatile memory when the voltage drops
below a threshold.
40
 INTERRUPTS
 Hardware Interrupts
 INTR: Interrupt Request
 The INTR is a maskable interrupt because the microprocessor will be interrupted
only if interrupts are enabled using set interrupt flag instruction. It can be masked
using the Interrupt Flag (IF).
 This is a low priority interrupt
 Activated by a peripheral device to interrupt the processor
 The INTR interrupt is activated by an I/O port.
 maskable interrupts: The program can ask the CPU to respond or ignore them,
i.e., can be enabled and disabled.
 CPU does not execute the ISR if the interrupt is disabled .
 Most of the interrupts are maskable
 INTA: interrupt acknowledgement :activated by the processor to inform the
interrupting device that the interrupt request(INTR) is accepted.(IF checked)
41
 INTERRUPTS
 Software Interrupts: Software interrupts (exceptions) using the INT instruction

(followed by the interrupt number (type)).

 The software interrupts are program instructions. These instructions are inserted

at desired locations in a program. while running a program, if software interrupt

instruction is encountered then the processor initiates an interrupt.

 The 8086 processor has 256 types of software interrupts.

 The software interrupt instruction is INT n, where n is the type number in the

range 0 to 255.
42
 INTERRUPTS
 An interrupt is either a hardware-generated CALL (externally
derived from a hardware signal) or a software-generated CALL
(internally derived from the execution of an instruction or some
other internal event) that allow normal program execution to be
interrupted (stopped).
 In response to an interrupt, the microprocessor stops execution its
current program and calls a procedure called interrupt service
procedure (ISP).
 An IRET instruction at end of the interrupt-service procedure
returns execution to the interrupted program.
 Instruction: INT nn ; where nn indicates interrupt vector number
(0 to 255) Each INT instruction is 2-byte long .
1st byte contain opcode and 2nd byte contains vector type
43 number. (exception: INTO and INT3 both are 1-byte instruction)
 8086 INTERRUPTS types
 256 interrupts of 8086 are divided in to 3 groups
1. TYPE 0 TO TYPE 4 INTERRUPTS: these are used for fixed
operations and hence are called Dedicated interrupts
2. TYPE 5 TO TYPE 31 INTERRUPTS: not used by 8086,reserved
for higher processors like 80286,80386 etc. Reserved interrupts
are also some interrupts which are not available for the users.
Then they are kept for higher processors.
3. TYPE 32 TO 255 INTERRUPTS: available for user, called user
defined interrupts.
 Available interrupts : They range from INT 32- INT255 and are
software interrupts. Users can define these interrupts as well.
 The INT n instructions can invoke these interrupts.
 This interrupt also has the ISR location of nx4 in the interrupt
44
vector table.
 INTERRUPTS
 PREDEFINED INTERRUPTS(Dedicated interrupts ) (0 TO 4)

 The predefined interrupts (it is defined by the manufacturer) include

 DIVISION ZERO (type 0)

 SINGLE STEP (type 1)

 NONMASKABLE INTERRUPT pin (type 2)

 BREAKPOINT INTERRUPT (type 3) and

 INTERRUPT ON OVERFLOW (type 4).

45
 INTERRUPTS
 Dedicated interrupts of 8086: The following are the various types of
interrupts: -
 Type 0 interrupts: This interrupt is also known as the divide by zero
interrupt. For cases where the quotient becomes particularly large to be
placed / adjusted an error might occur. When the quotient from either a
DIV or IDIV instruction is too large to fit in the result register; 8086
Interrupt Types will automatically execute type 0 interrupt. Quotient is
large can’t fit in AL/AX or divide by zero.
 Type 1 interrupts: Once TF (Trap Flags) is set to one, the 8086
automatically generates a TYPE 1 interrupt after execution of each
instruction. This is also known as the single step interrupt. This type of
interrupt is primarily used for debugging purposes in assembly language.
 Type 2 interrupts: also known as the non-maskable interrupts (NMI ).
The non-maskable interrupt is initiated via the 8086 NMI pin. These type
of interrupts are used for emergency scenarios such as power failure. As
46
the name suggests, this interrupt cannot be disabled by any software instruction.
 INTERRUPTS
 Type 3 interrupts: These type of interrupts are also known as
breakpoint interrupts. When this interrupt occurs a program would
execute up to its break point.
 When a break point interrupt inserted (it is inserted by INT 3
instruction), the system executes the instruction up to break point.
 Unlike the single step feature which stops execution after each
instruction, the break point features executes all the instruction up
to the inserted breakpoint and then stop execution.
 It is a 1-byte instruction.
 Type 4 interrupts: Also known as overflow interrupts is generally
existent after an arithmetic operation was performed.

47
 INTERRUPTS
 For example, if you add the 8-bit signed number 0111 1000 (+ 120
decimal) and the 8 bit signed number 0110 1010 (+ 106 decimal),
result is 1110 0010 (- 98 decimal).
 In signed numbers, MSB (Most significant Bit) is reserved for sign
and other bits represent magnitude of the number. In the previous
example, after addition of two 8-bit signed numbers result is
negative, since it is too large to fit in 7 bits.
 To detect this condition in the program, you can put interrupt on
overflow instruction, INTO, immediately after the arithmetic
instruction in the program. If the overflow flag is not set when the
8086 executes the INTO instruction, the instruction will simply
function as an NOP (no operation).
 However, if the overflow flag is set, indicating an overflow error, the
8086 will execute a type 4 interrupt after executing the INTO
48
instruction.
 INTERRUPTS
 Interrupt Vectors
 In an Interrupt Structure of 8086 system the first 1 Kbyte of memory from
00000H to 003FFH is reserved for storing the starting addresses of Interrupt
Service Procedures(ISP).
 This block of memory is often called the Interrupt Vector Table in 8086 or
the interrupt pointer table. Since 4 bytes are required to store the CS and IP
values for each interrupt service procedure, the table can hold the starting
addresses for 256 interrupt service routines.
 Interrupt vector is the 4 byte long (CS:IP) address of interrupt service
procedure(ISP) stored in the first 1024 bytes (out of 1Mbytes) of the memory
(00000-003FFH). This memory location (1024 byte) is known as interrupt vector
table.
 There are 256 different interrupt vectors, and each vector contains 4 byte address
of ISP. The first two bytes contain the IP and last two byte contains the CS.
 Instruction: INT nn ; where nn indicates interrupt vector number.

49
 INTERRUPTS
 8086 Interrupt Vector Table
 The starting address of an ISP is often called the Interrupt Vector or Interrupt
Pointer. There fore the table is referred as Interrupt Vector Table.
 Fig. 1 shows how the 256 interrupt pointers are arranged in the memory table.

50
 INTERRUPTS
Finding address of ISP
8086 interrupt vector table
For the interrupt type nn(Instruction INT nn), /pointer table
the table address for IP=4×nn and
the table address for CS=4×nn+2.

Assign interrupt types

▶ Types 0 to 4 are for the
predefined interrupts.
▶ Types 5 to 31 are reserved by
intel for future use.
▶ Types 32 to 255 are available for
maskable interrupts.

51
 INTERRUPTS
 Exercise: Find the physical address of interrupt service procedure( for the
following interrupt instructions:
 (a)INT 01H
 (b)INT FFH Interrupt vector table is given.
 Interrupt vector table is given.

Solution (a)
Address for IP = 4 × 1 = 00004H
Address for CS = 4 × 1 ＋ 2 = 00006H
So, IP= AC5EH and CS= C83AH
Physical address = CS × 10+IP = (C83AH × 10+AC5EH) =
D2FFEH
Solution (b)
Address for IP = 4 × FF = 003FCH
Address for CS = 4 × FF ＋ 2 = 003FEH
So, IP= 5A99H and CS= 9800H
Physical address = CS × 10+IP
= (5A99H × 10+9800H)
= 64190H
52
 INTERRUPTS
 Interrupt Vectors

 Each interrupt type is given a number between 0 to 255 and the

address of each interrupt is found by multiplying the type by 4.
 e.g. for type 11, interrupt address is 11 x 4 = 4410= 0002CH

 When the 8086 responds to an interrupt, it automatically goes to the

specified location in the Interrupt Vector Table in 8086 to get the

starting address of interrupt service routine. So user has to load
these starting addresses for different routines at the start of the
program.

53
 Interrupt Instructions

 3 interrupt instructions available to the programmer are

 INT

 IRET

 INTO
 INT

 There are 256 different interrupt instructions(INTs).

 Each INT instruction has a numeric operand whose range is 0 to

255.
 Each INT instruction is 2 bytes long. The first byte contains the

opcode and the 2nd byte contains the vector type number.(only
the exception to this is INT 3. It is a one –byte special interrupt
instruction used for break points.)
 It is common to insert an INT-3 instruction in a program to

interrupt or break the flow of the program.

 IRET

 Interrupt returns instruction is used only with software or hardware

interrupt service procedures.
 When an interrupt service is to be called, before transferring
control to it, the IP, CS, and flag register are stored on to the stack
to indicate the location from where the execution is to be
continued.
 When IRET is executed, the values of IP, CS and flags are
retrieved from the stack to continue the execution of the main
program. That means, the IRET instruction is a special return
instruction which perform following task-
- Pop stack data back into IP.
- Pop stack data back to CS.
- Pop stack data back into flag register.
 INTO

 Interrupt on Overflow(INTO) is a conditional interrupt

instructions that test the Overflow flag (0F)
 If OF=0, the INTO instruction performs no operation.

 If OF=1, the INTO instruction executes an interrupt occurs

through vector type number 4.

 INTO call procedure whose address is stored in interrupt

vector with type number 4 .

 The INTO instruction appears in program that adds or subtracts

signed binary numbers.

 Miscellaneous Control Instruction
(Reading Assignment)
 Controlling the carry flag bit
 STC= Sets the carry flag.
 CLC= Clears the carry flag.
 CMC= Complements the carry flag.
 HLT (Halt) instruction HLT instruction stops the execution of the
program. There are three ways to exit of HLT state-
(1) By an interrupt.
(2) By a hardware reset.
(3) A DMA (Direct Memory Access)
operation.
 NOP
 It just takes time to execute NOP instruction but performs no
58 operation.

 Miscellaneous Control Instruction
 WAIT instruction
Wait instruction monitors the pin of 8086 microprocessor.
If WAIT instruction executes while pin is 1(high), nothing
will happen.
If WAIT instruction executes while pin is low
microprocessor waits until pin becomes 1(high).
 CLD (Clear direction flag)
This instruction resets the direction flag to 0. No other flags are
effected.
If the direction flag is reset, SI and DI will automatically be
incremented when one of the string instructions, such as
MOVS, CMPS or, SCAS executes.
59
 Miscellaneous Control Instruction
CLI (Clear interrupt flag)

This instruction resets the interrupt flag without effecting

other flag bits.

If the interrupt flag is reset, the 8086 will not respond to an

interrupt signal on its INTR input.

60
 END

62