Computer

Organization
(Register transfer
language) Prepared by:
Prof. Miksha Solanki
miksha.solanki21591@paruluniversi
[Link]
EC dept, PIET
 REGISTER TRANSFER LANGUAGE
• specific notation used to specify the digital system is called
register transfer language.
• For any function of the computer, the register transfer
language can be used to describe the (sequence of) micro-
operations.
• Register transfer language
A symbolic language
A convenient tool for describing the internal organization of digital
computers
Can also be used to facilitate the design process of digital systems
REGISTER TRANSFER MICRO OPERATIONS

• Capital letters are used to designate registers

Ex: MAR- memory address register (holds an address for memory unit)
PC – Program Counter and IR – Instruction Register
• Individual flip-flops are used in n-bit registers
• The symbolic representation of the register transfer is R2 ––R1
• The information is transferred from the register R1 (source) to register R2
(destination).
• Common ways of representing a register is shown in figure below:
• Since transferring info from one register to another in separate lines
BUS AND MEMORY TRANSFERS
becomes complex, a more efficient scheme called common bus
system is used.
• A bus consists of a common set of lines, one for each bit of a register
through which
the binary info is transferred at a time.
• Control signals determine which register is selected by the bus
during each particular
register transfer.
• One way of constructing the common bus system is using
multiplexers
• The bus consists of 4 registers and four 4 by 1 mux each having data
inputs 0 through
3 and selection lines S1 and S0
• Ex: o/p of register A is connected to input 0 of mux1 because this i/p
is labelled A1.
• From a register to bus: BUS R

Register A Register B Register C Register D

Bus lines

Register A Register B Register C Register D

1 2 3 4 1 2 3 4 1 2 3 4 1 2 3 4

B1 C1 D 1 B2 C2 D 2 B3 C3 D 3 B4 C 4 D 4

0 0 0 0
4 x1 4 x1 4 x1 4 x1
MUX MUX MUX MUX

x
select
y

4-line bus
 THREE STATE BUFFER
• A three state gate is a digital circuit that exhibits threes states
 Two of them being conventional logics 0 and 1
 Third is high impedance state which behaves as an open circuit
i.e., output disconnected
• They may perform any conventional logics such as AND or NAND
• Where as in three state buffer gate
 Control i/p determine the o/p state
 When control i/p is 1, the o/p is enabled and behaves as normal
i/p
 When control i/p is 0, the o/p acts as high impedance state
 Because of this high impedance state a large number of 3 state
gates o/p’s
can be connected to form a common bus line without loading
 MEMORY (RAM)
• Memory (RAM) can be thought as a sequential circuit containing
some number of registers
• These registers hold the words of memory
• Each of the r registers is indicated by an address
• These addresses range from 0 to r-1
• Each register (word) can hold n bits of data
• Assume the RAM contains r = 2k words. It needs the following
– n data input lines data input lines

– n data output lines n

– k address lines address lines

k
– A Read control line Read
RAM
unit
– A Write control line Write
n
data output lines
 MEMORY TRANSFER
• Collectively, the memory is viewed at the register level as a device,
M.
• Since it contains multiple locations, we must specify which address
in memory we will be using
• This is done by indexing memory references
• Memory is often accessed in computer systems by putting the
desired address in a special register, the Memory Address Register
(MAR, or AR)
• When memory is accessed, the contents of the MAR get sent to the
memory unit’s
AR
address lines
Memory Read
unit Write

Data out Data in

 MEMORY READ

• To read a value from a location in memory and load it into a

register, the register transfer language notation looks like this:
R1  M[MAR]

• This causes the following to occur

• The contents of the MAR get sent to the memory address lines
• A Read (= 1) gets sent to the memory unit
• The contents of the specified address are put on the memory’s
output data lines
• These get sent over the bus to be loaded into register R1
 MEMORY WRITE

• To write a value from a register to a location in memory looks like

this in register transfer language:
M[MAR]  R1

• This causes the following to occur

• The contents of the MAR get sent to the memory address lines
• A Write (= 1) gets sent to the memory unit
• The values in register R1 get sent over the bus to the data input
lines of the memory
• The values get loaded into the specified address in the memory
 SUMMARY OF R. TRANSFER
MICROOPERATIONS
A B Transfer content of reg. B into reg. A
AR DR(AD) Transfer content of AD portion of reg. DR into reg. AR
A  constant Transfer a binary constant into reg. A
A BUS  R1, Transfer content of R1 into bus A and, at the same time,
R2 ABUS transfer content of bus A into R2
AR Address register
DR Data register
M[R] Memory word specified by reg. R
M Equivalent to M[AR]
DR  M Memory read operation: transfers content of
memory word specified by AR into DR
M  DR Memory write operation: transfers content of
DR into memory word specified by AR
 MICROOPERATIONS
• The operations executed on the data stored in the registers are
called micro operations.
• The functions built into registers are examples of micro- operations
- Shift - Load - Clear - Increment ...etc.
Classifications of micro operations:
1. Register transfer micro operations
2. Arithmetic micro operations
3. Logic micro operations
4. Shift micro operations
• This is an elementary operation performed on the information
stored in registers. Ex: shift, count, clear and load
 ARITHMETIC MICROOPERATIONS

• The basic arithmetic microoperations are

• Addition
• Subtraction
• Increment
• Decrement
• The additional arithmetic microoperations are
• Add with carry
• Subtract with borrow
• Transfer/Load R3  R1 + R2 Contents of R1 plus R2 transferred to R3
R3  R1 - R2 Contents of R1 minus R2 transferred to R3
R2  R2’ Complement the contents of R2
R2  R2’+ 1 2's complement the contents of R2 (negate)
R3  R1 + R2’+ 1 subtraction
R1  R1 + 1 Increment
R1  R1 - 1 Decrement
 BINARY ADDER / SUBTRACTOR /
INCREMENTER
B3 A3 B2 A2 B1 A1 B0 A0

Binary Adder C3 C2 C1 C0
FA FA FA FA

C4 S3 S2 S1 S0

B3 A3 B2 A2 B1 A1 B0 A0

M
Binary Adder-Subtractor

C3 C2 C1 C0
FA FA FA FA

C4 S3 S2 S1 S0
A3 A2 A1 A0 1
Binary Incrementer
x y x y x y x y
HA HA HA HA
C S C S C S C S

C4 S3 S2 S1 S0
ARITHMETIC
CIRCUIT
 LOGIC MICROOPERATIONS
• Specify binary operations on the strings of bits in registers
• Logic microoperations are bit-wise operations, i.e., they work on
the individual bits of data
• useful for bit manipulations on binary data
• useful for making logical decisions based on the bit value
• There are, in principle, 16 different logic functions that can be
defined over two binary input variables
A B F0 F1 F2 … F13 F14 F15
0 0 0 0 0 … 1 1 1
0 1 0 0 0 … 1 1 1
1 0 0 0 1 … 0 1 1
1 1 0 1 0 … 1 0 1

However, most systems only implement four of these:

AND (), OR (), XOR (), Complement/NOT
The others can be created from combination of these
 LIST OF LOGIC MICROOPERATIONS
• List of Logic Microoperations
• - 16 different logic operations with 2 binary vars.
• - n binary vars →2^2^n functions
• Truth tables for 16 functions of 2 variables and the corresponding
16 logic micro-operations
HARDWARE IMPLEMENTATION OF LOGIC
MICROOPERATIONS
 SELECTIVE SET

• In a selective set operation, the bit pattern in B is used to set

certain bits in A
1100 At
1010 B
1110 At+1 (A  A + B)

• If a bit in B is set to 1, that same position in A gets set to 1,

otherwise that bit in A keeps its previous value
 SHIFT MICROOPERATIONS
• There are three types of shifts
• Logical shift
• Circular shift
• Arithmetic shift
• What differentiates them is the information that goes into the serial input
• A right shift operation

Serial input

• A left shift operation

Serial input
 LOGICAL SHIFT
• In a logical shift the serial input to the shift is a 0.
• A right logical shift operation:

A left logical shift operation:

In a Register Transfer Language, the following

notation is used
shl for a logical shift left
shr for a logical shift right
Examples:
R2  shr R2
 CIRCULAR SHIFT
• In a circular shift the serial input is the bit that is shifted out of the
other end of the register.
• A right circular shift operation:

• A left circular shift operation

In a RTL, the following notation is used

cil for a circular shift left
cir for a circular shift right
Examples:
R2  cir R2
R3  cil R3
 ARITHMETIC SHIFT
• An Arithmetic shift is meant for signed binary numbers (integer)
• An Arithmetic left shift multiplies a signed number by two
• Arithmetic right shift divides a signed number by two
• The main distinction of an arithmetic shift is that it must keep
the sign of the number the same as it performs the
multiplication or division

• A right arithmetic shift operation

• A left arithmetic shift operation

• A left arithmetic shift operation must be checked for the overflow

• In a RTL, the following notation is used

– ashl for an arithmetic shift left
– ashr for an arithmetic shift right

– Examples:
» R2  ashr R2
» R3  ashl R3
HARDWARE IMPLEMENTATION OF SHIFT
MICROOPERATIONS
ARITHMETIC LOGIC SHIFT UNIT
 REFRENCE

• COMPUTER SYSTEM ARCHITECTURE, MORRIS M. MANO, 3RD

EDITION, PRENTICE HALL INDIA.