ADC
(Analog to Digital Conversion)
By
Brijesh Kundaliya
Outlines
Microcontroller connection to sensor
Using ADC
Sensor ADC CPU Display
10 Bit ADC
Vref
Vin ( Analog Input) D0
Binary Data Output
Start to conversion D9
ADC characteristics
• Step Size (Resolution) : The step size is the voltage difference between
one digital level (i.e. 0001) and the next one (i.e. 0010 or 0000).
OR
• Step Size is the smallest change that can be detected by an ADC
Resolution = Vref/2n
• Where, n is number output bit. ( n can be 8,10,12,16 bit)
• High Resolution ADC ( Smaller Step size) has more precise output.
Resolution for ADC
• Lets take Vref = 5v.
• Assume that we have 8 bit ADC ,
step size = 2n = 28 = 256
Resolution = Vref/256 = 19.53 mv
n-bit Number of steps Step size (mV)
8 256 5/256 = 19.53
10 1024 5/1024 = 4.88
12 4096 5/4096 = 1.2
16 65536 5/65536 = 0.076
Resolution can be improved by increasing the number of bit conversion or by decreasing
Vref voltage.
Effect of Vref on resolution
Vref (V) Vin(V) Step Size (mV) for 8 bit Step Size (mV) for 10 bit
5.0 0 to 5 5/256=19.53 5/1024 =4.88
4.096 0 to 4 4.096/256=15.62 4.096/1024=4
3.0 0 to 3 3/256=11.71 3/1024 = 2.93
2.56 0 to 2.56 2.56/256=10 2.56/1024 = 2.5
2.0 0 to 2 2/256=7.81 2.048/1024 = 2
1.28 0 to 1.28 1.28/256=5 1/1024 = 1.25
1 0 to 1 1/256=3.90 1.024/1024 = 1
ADC characteristics
• Conversion Time : It is the time taken by ADC to convert analog input
to a digital numbers.
• Conversion time controlled by the clock source connected to the ADC
• It also depend on data conversion method and technology used for
the fabrication.
Example
• For an 10-bit ADC, we have Vref = 2.56 V. Calculate the D0-D9 output
if the analog input is : i) 0.2v ii) 0.5 iii)0.75
⁻ Step Size = Vref/2n = 2.56/1024 = 2.5mV
⁻ So here we can say that 2.5 mV ADC gives 1 as output.
⁻ So to find the output for 0.2 V
0.2v/2.5mV = 80 in decimal
⁻ Dout = 0001010000
Parallel ADC vs Serial ADC
Types of ADC
• Successive Approximation
• Dual Slope
• Delta –Sigma
• Pipelined
• Flash
ATMega 32 ADC Feature
• It has 10 bit ADC
• 8-Analog input channels, 7-differential input channels and 2-
differential input channel with optional gain of 10x and 200x.
• Converted data held in ADCL(A/D Result Low) and ADCH ( A/D Result
High)
• ADCH:ADCL gives 16 bits data and ADC’s output is only 10 bit.
• Three option for Vref. i) Analog Vcc ii) Internal 2.56 iii) External AREF
• Conversion time controlled by crystal frequency to the XTAL pins
(Fosc) and ADPS0:2 bits.
ADC registers
ADCH ( 8 Bit Register)
Store Final Output
ADCL ( 8 Bit Register)
ADCSRA ( ADC status and control register)
ADMUX ( ADC Multiplexer selection register)
ADMUX Register
REFS1 REFS0 ADLAR MUX4 MUX3 MUX2 MUX1 MUX0
REFS1:0 : Reference Selection bit
• This bit select reference voltage for ADC
ADLAR : ADC Left Adjust Register
• This bit decides either the left bits or the right bits of the result register ADCH:ADCL that are used to store the
result.
• ADLAR = 1 The result will be left adjusted
• ADLAR = 0 The result will be right adjusted
MUX 4:0 : Analog channel and gain selection bit
• The value of these bits selects the gain for differential channels and also selects which combination of analog
inputs are connected to ADC.
ADC Reference Selection
REFS1 REFS0 Reference
voltage
0 0 AVREF ( External
Voltage)
0
1 0 Reserved
1 0 1 AVCC Pin
Selected (Vref =
Vcc0
1 1 Internal 2.56V as
Vref
ADLAR
ADCH ADCL
ADLAR = 0 The result will be right adjusted
- - - - - - ADC9 ADC8 ADC7 ADC6 ADC5 ADC4 ADC3 ADC2 ADC1 ADC0
ADCH ADCL
ADLAR = 1 The result will be left adjusted
ADC9 ADC8 ADC7 ADC6 ADC5 ADC4 ADC3 ADC2 ADC1 ADC0 - - - - - -
ADCH ADCL
ADC selection using MUX
Single ended channels
MUX4:0 Single ended Input
00000 ADC0
00001 ADC1
00010 ADC2
00011 ADC3
00100 ADC4
00101 ADC5
00110 ADC6
00111 ADC7
Differential channel selection
ADCSRA – ADC status and control
Register
ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0
ADEN : ADC Enable
• ADEN = 1 ADC enable
• ADEN = 0 ADC Disable ( Even during the conversion process)
ADSC : ADC Start Conversion
• To start each conversion we have to set this bit
ADATE : ADC Auto Trigger Enable
• Auto triggering of ADC is enable when you set this bit to 1.
ADCSRA – ADC status and control
Register
ADEN ADSC ADATE ADIF ADIE ADPS2 ADPS1 ADPS0
ADIF : ADC Interrupt Flag
• This bit is set when an ADC conversion completes and the data registers are updated
ADIE : ADC Interrupt Enable
• Setting this bit to one enables the ADC conversion complete interrupt
ADPS 2:0 : ADC Prescaler select bits
• These bits determines the division factor between the XTAL frequency and the input
clock to ADC
ADC Start conversion
ADPS2 ADPS1 ADPS0 ADC Clock
0 0 0 Reserved
0 0 1 CK/2
0 1 0 CK/4
0 1 1 CK/8
1 0 0 CK/16
1 0 1 CK/32
1 1 0 CK/64
1 1 1 CK/128
Sensor Interfacing and Signal
Conditioning
• Thermistor : Detect the temperature and convert it in to resistance
Temperature(c) Tf(K ohm)
It indicate not liner relationship 0 29.490
25 10.000
50 3.893
• LM 34/35: 75 1.700
100 0.817
It indicate liner and accurate
relationship
Signal Conditioning
Voltage, current, charge,
capacitance etc…
Voltage
Interfacing LM35 to AVR
Atmega 16 Implementation
#define F_CPU 8000000UL
#include <avr/io.h>
#include <util/delay.h>
#include <avr/interrupt.h>
unsigned char a;
int main(void)
{
DDRD = 0xff;
DDRC = 0XFF;
DDRA= 0X00;
ADCSRA = 0x87;
ADMUX = 0xE0;
while (1)
{
ADCSRA |= (1<<ADSC);
while(!(ADCSRA & (1<<ADIF)));
PORTD = ADCH;
PORTC = ADCL;
}
return 0;
}