Hardware Simulator Tutorial

This program is part of the software suite

that accompanies the book

The Elements of Computing Systems

by Noam Nisan and Shimon Schocken
MIT Press
[Link]
This software was developed by students at the
Efi Arazi School of Computer Science at IDC
Chief Software Architect: Yaron Ukrainitz

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Background

The Elements of Computing Systems evolves

around the construction of a complete computer
system, done in the framework of a 1- or 2-
semester course.
In the first part of the book/course, we build the
hardware platform of a simple yet powerful
computer, called Hack. In the second part, we
build the computer’s software hierarchy,
consisting of an assembler, a virtual machine, a
simple Java-like language called Jack, a compiler
for it, and a mini operating system, written in
Jack.
The book/course is completely self-contained,
requiring only programming as a pre-requisite.
The book’s web site includes some 200 test
programs, test scripts, and all the software
tools necessary for doing all the projects.

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The book’s software suite
(All the supplied tools are dual-platform: [Link] starts
Xxx in Windows, and [Link] starts it in Unix)

Simulators
(HardwareSimulator, CPUEmulator, VMEmulator):
 Used to build hardware platforms and
execute programs;
This tutorial is  Supplied by us.
about the
hardware
simulator. Translators (Assembler, JackCompiler):
 Used to translate from high-level to low-level;
 Developed by the students, using the book’s
specs; Executable solutions supplied by us.
Other
 Bin: simulators and translators software;

 builtIn: executable versions of all the logic

gates and chips mentioned in the book;
 OS: executable version of the Jack OS;

 TextComparer: a text comparison utility.

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The Hack computer
The hardware simulator described in this
tutorial can be used to build and test many
different hardware platforms. In this book,
we focus on one particular computer, called
Hack.
Hack -- a 16-bit computer equipped with a
screen and a keyboard -- resembles hand-
held computers like game machines, PDA’s,
and cellular telephones.
The first 5 chapters of the book specify the
elementary gates, combinational chips,
sequential chips, and hardware architecture
of the Hack computer.
All these modules can be built and tested
using the hardware simulator described in
this tutorial.
That is how hardware engineers build chips
for real: first, the hardware is designed,
tested, and optimized on a software
simulator. Only then, the resulting
gate logic is committed to silicon.

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Hardware Simulation Tutorial

I. Getting started

II. Test scripts

III. Built-in chips

IV. Clocked chips

V. GUI-empowered chips

VI. Debugging tools

VII. The Hack Platform

Relevant reading (from “The Elements of Computing Systems”):

 Chapter 1: Boolean Logic
 Appendix A: Hardware Description Language
 Appendix B: Test Scripting Language

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Hardware Simulation Tutorial

Part I:
Getting Started

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Chip Definition (.hdl file)

/**
/** Exclusive-or
Exclusive-or gate.
gate. out
out == aa xor
xor bb */
*/
chip CHIP Xor
CHIP Xor {{
interface IN
IN a,
a, b;
b;
OUT
OUT out;
out;

//
// Implementation
Implementation missing.
missing.
}}

 Chip interface:
 Name of the chip
 Names of its input and output pins
 Documentation of the intended chip operation
 Typically supplied by the chip architect; similar to an API, or a contract.
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Chip Definition (.hdl file)

/**
/** Exclusive-or
Exclusive-or gate.
gate. out
out == aa xor
xor bb */
*/
chip CHIP Xor
CHIP Xor {{
interface IN
IN a,
a, b;
b;
OUT
OUT out;
out;

PARTS:
PARTS:
Not(in=a,
Not(in=a, out=nota);
out=nota);
chip
implementation Not(in=b,
Not(in=b, out=notb);
out=notb);
And(a=a,
And(a=a, b=notb,
b=notb, out=w1);
out=w1);
And(a=nota,
And(a=nota, b=b,
b=b, out=w2);
out=w2);
Or(a=w1,
Or(a=w1, b=w2,
b=w2, out=out);
out=out);
}}

 Any given chip can be implemented in several different ways. This particular
implementation is based on: Xor(a,b) = Or(And(a,Not(b)), And(b,Not(a)))
 Not, And, Or: Internal parts (previously built chips), invoked by the HDL
programmer
 nota, notb, w1, w2: internal pins, created and named by the HDL programmer;
used to connect internal parts.
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Loading a Chip

Navigate to a
directory and select
an .hdl file.

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Loading a Chip

 Names and current

values of the chip’s
output pins;
 Calculated by the
 Names and current values simulator; read-
only.
of the chip’s input pins;
 To change their values,
 Names and current values of
enter the new values
the chip’s internal pins
here.
(used to connect the chip’s
parts, forming the chip’s logic);
 Calculated by the
simulator; read-only.

 Read-only view of the loaded .hdl file;

 Defines the chip logic;
 To edit it, use an external text editor.

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Exploring the Chip Logic

2. A table pops up, showing the chip’s internal

1. Click the parts (lower-level chips) and whether they are:
PARTS  Primitive (“given”) or composite (user-defined)
keyword  Clocked (sequential) or unclocked (combinational)

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Exploring the Chip Logic

2. A table pops up, showing the

input/output pins of the selected
1. Click any one of part (actually, its API), and their
the chip PARTS current values;
A convenient debugging tool.

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Interactive Chip Testing

1. User: changes the values of some

input pins
2. Simulator: responds by:
 Darkening the output and internal
pins, to indicate that the displayed
values are no longer valid
 Enabling the eval
(calculator-shaped) button.

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Interactive Chip Testing

1. User: changes the values of some

input pins
2. Simulator: responds by:
 Darkening the output and internal
pins, to indicate that the displayed
values are no longer valid
 Enabling the eval
Re-
(calculator-shaped) button.
calc

3. User: Clicked the eval button

4. Simulator: re-calculates the values
of the chip’s internal and output
pins (i.e. applies the chip logic to
the new input values)
5. To continue interactive testing,
enter new values into the input
pins and click the eval button.

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Hardware Simulation Tutorial

Part II:
Test Scripts

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Test Scripts
load
load [Link],
[Link], Test scripts:
output-file
output-file [Link],
[Link],
compare-to
compare-to [Link],
[Link],  Are used for specifying, automating and
output-list Init
replicating chip testing
output-list a%B3.1.3
a%B3.1.3
b%B3.1.3
b%B3.1.3
out%B3.1.3;
out%B3.1.3;
 Are supplied for every chip mentioned in
set a 0,
set a 0, the book (so you don’t have to write them)
set
set bb 0,
0,
eval,  Can effect, batch-style, any operation that
eval, Simulation step
output;
output; can be done interactively

set Generated  Are written in a simple language described

set aa 0,
0,
set output file in Appendix B of the book
set bb 1,
1, ([Link])
eval,
eval,  Can
Simulation step
create an output file that records the
output;
output;
Etc. results of the chip test
Etc.

|| aa || bb || out
out ||
|| 00 || 00 || 00 ||
 If the script specifies a compare file, the
|| 00 || 11 || 11 || simulator will compare the .out file to
|| 11 || 00 || 11 || the .cmp file, line by line.
|| 11 || 11 || 00 ||

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Loading a Script

To load a new script (.tst

file), click this button;

Interactive loading of the chip

itself (.hdl file) may not be
necessary, since the test
script typically contains a
“load chip” command.

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Script Controls

Controls
the script
execution
speed Script =
series of
simulation
steps, each
Resets
ending with
the script
a semicolon.
Pauses the
script
execution
Multi-step execution,
until a pause

Executes the next

simulation step

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Running a Script

Script
exec-
Typical “init” code:
ution
1. Loads a chip definition (.hdl) file
flow
2. Initializes an output (.out) file
3. Specifies a compare (.cmp) file
4. Declares an output line format.

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Running a Script

Comparison of the output lines to

the lines of the .cmp file are
reported.

Script
exec-
ution
ends

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Viewing Output and Compare Files

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Viewing Output and Compare Files

Observation:
This output file
looks like a Xor
truth table

Conclusion: the chip logic

([Link]) is apparently
correct (but not necessarily
efficient).

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Hardware Simulation Tutorial

Part III:
Built-in Chips

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Built-In Chips
General
 //
// Mux16
Mux16 gate
gate (example)
(example)
A built-in chip has an HDL interface and a Java
implementation (e.g. here: [Link]) CHIP
CHIP Mux16
Mux16 {{
 IN
IN a[16],b[16],sel;
a[16],b[16],sel;
The name of the Java class is specified following
the BUILTIN keyword OUT
OUT out[16];
out[16];
BUILTIN
BUILTIN Mux16;
Mux16;
 Built-In implementations of all the chips that
appear in he book are supplied in the }}
tools/buitIn directory.

Built-in chips are used to:

 Implement primitive gates (in the computer built in this book: Nand and DFF)
 Implement chips that have peripheral side effects (like I/O devices)
 Implement chips that feature a GUI (for debugging)
 Provide the functionality of chips that the user did not implement for some reason
 Improve simulation speed and save memory (when used as parts in complex chips)
 Facilitate behavioral simulation of a chip before actually building it in HDL
 Built-in chips can be used either explicitly, or implicitly.

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Explicit Use of Built-in Chips

The chip is loaded from the

tools/buitIn directory (includes
executable versions of all the chips
mentioned in the book).

Standard interface.

Built-in implementation.

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Implicit Use of Built-in Chips
/**
/** Exclusive-or
Exclusive-or gate.
gate. out
out == aa xor
xor bb */
*/
CHIP Xor
CHIP Xor {{
IN
IN a,
a, b;
b;
OUT out;
OUT out;
PARTS:
PARTS:
Not(in=a,out=Nota);
Not(in=a,out=Nota);
Not(in=b,out=Notb);
Not(in=b,out=Notb);
And(a=a,b=Notb,out=aNotb);
And(a=a,b=Notb,out=aNotb);
And(a=Nota,b=b,out=bNota);
And(a=Nota,b=b,out=bNota);
Or(a=aNotb,b=bNota,out=out);
Or(a=aNotb,b=bNota,out=out);
}}

 When any HDL file is loaded, the simulator parses its definition. For each internal
chip Xxx(...) mentioned in the PARTS section, the simulator looks for an [Link]
file in the same directory (e.g. [Link], [Link], and [Link] in this example).
 If [Link] is found in the current directory (e.g. if it was also written by the user), the
simulator uses its HDL logic in the evaluation of the overall chip.
 If [Link] is not found in the current directory, the simulator attempts to invoke the
file tools/builtIn/[Link] instead.
 And since tools/builtIn includes executable versions of all the chips mentioned in
the book, it is possible to build and test any of these chips before first building their
lower-level parts.
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Hardware Simulation Tutorial

Part IV:
Clocked Chips
(Sequential Logic)

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Clocked (Sequential) Chips

 The implementation of clocked chips is based on sequential logic

 The operation of clocked chips is regulated by a master clock signal:

 In our jargon, a clock cycle = tick-phase (low), followed by a tock-phase (high)

 During a tick-tock, the internal states of all the clocked chips are allowed to change,
but their outputs are “latched”

 At the beginning of the next tick, the outputs of all the clocked chips in the
architecture commit to the new values

 In a real computer, the clock is implemented by an oscillator; in simulators, clock

cycles can be simulated either manually by the user, or repeatedly by a test script.

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The D-Flip-Flop (DFF) Gate

/** Clocked chips

/** Data
Data Flip-flop:
Flip-flop:
** out(t)=in(t-1)
out(t)=in(t-1)  Clocked chips include registers,
** where
where tt is
is the
the time
time unit.
unit. RAM devices, counters, and
*/
*/ the CPU
CHIP
CHIP DFF
DFF {{
IN
IN in;
in;  The simulator knows that the
OUT
OUT out;
out; loaded chip is clocked when
one or more of its pins is
BUILTIN
BUILTIN DFF;
DFF; declared “clocked”, or one or
CLOCKED
CLOCKED in,
in, out;
out; more of its parts (or sub-parts,
}}
recursively) is a clocked chip
 In the hardware platform built in
the book, all the clocked chips
DFF: are based, directly or indirectly,
 A primitive memory gate that can on (many instances of) built-in
“remember” a state over clock cycles DFF gates.
 Can serve as the basic building block
of all the clocked chips in a computer.

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Simulating Clocked Chips

Clocked (sequential) chips are clock-regulated.

Therefore, the standard way to test a clocked chip
is to set its input pins to some values (as with
combinational chips), simulate the progression of
the clock, and watch how the chip logic responds
to the ticks and the tocks.
For example, consider the simulation of an 8-word
random-access memory chip (RAM8).
Since this built-in chip also
happens to be GUI- empowered,
the simulator displays its GUI

A built-in, (More about GUI-empowered

clocked chips, soon)
chip
(RAM8) is
loaded

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Simulating Clocked Chips

1. User: enters
some input
values and
clicks the clock
icon once (tick)

A built-in,
clocked
chip
(RAM8) is
loaded

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Simulating Clocked Chips

1. User: enters
some input
values and
clicks the clock 2. Simulator:
icon once (tick) changes the
internal state of
the chip, but note
that the chip’s
A built-in, output pin is not
clocked yet effected.
chip
(RAM8) is
loaded

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Simulating Clocked Chips

3. User: clicks
the clock icon
again (tock)

1. User: enters
some input
values and
clicks the clock 2. Simulator:
icon once (tick) changes the
internal state of
the chip, but note
that the chip’s
A built-in, output pin is not
clocked yet effected.
chip
(RAM8) is
loaded

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Simulating Clocked Chips

3. User: clicks
the clock icon
again (tock)

1. User: enters
some input
values and
4. Simulator: 2. Simulator:
clicks the clock
commits the changes the
icon once (tick)
chip’s output pin internal state of
to the value of the chip, but note
the chip’s that the chip’s
A built-in, internal state. output pin is not
clocked yet effected.
chip
(RAM8) is
loaded

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Simulating Clocked Chips Using a Test Script

Controls the script

speed, and thus the
simulated clock
speed, and thus the
Default script: always loaded when
overall chip execution
the simulator starts running;
Single-action speed
tick-tock The logic of the default script simply
runs the clock repeatedly;
Tick-tocks Hence, executing the default script
repeatedly and has the effect of causing the clock
infinitely to go through an infinite train of tics
and tocks.
This, in turn, causes all the clocked
chip parts of the loaded chip to
react to clock cycles, repeatedly.

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Hardware Simulation Tutorial

Part V:
GUI-Empowered
chips

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Built-in Chips with GUI Effects

1. A chip whose
parts include Note: the signature of the internal part does
built-in chips not reveal if the part is implemented by a
was loaded into built-in chip or by another chip built by the
the simulator user. Thus in this example you have to
(ignore the chip believe us that all the parts of this loaded
logic for now) chip are built-in chips.

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Built-in Chips with GUI Effects

2. If the loaded chip or For each GUI-empowered built-in chip that appears
some of its parts have in the definition of the loaded chip, the simulator
GUI side-effects, the does its best to putGUI of the
the chip GUIbuilt-in
in this area.
simulator displays the [Link] chip
The actual GUI’s behaviors are then effected by the
GUI’s here. Java classes that implement the built-in chips.

1. A chip whose
parts include GUI of the built-in
built-in chips [Link] chip
was loaded into
the simulator
GUI of the built-in
(ignore the chip [Link] chip
logic for now)

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The Logic of the GUIDemo Chip
RAM16K,
Screen, &
//
// Demo
Demo of
of built-in
built-in chips
chips with
with GUI
GUI effects
effects Keyboard
CHIP are built-in
CHIP GUIDemo
GUIDemo {{
chips with GUI
IN
IN in[16],load,address[15];
in[16],load,address[15]; side-effects
OUT
OUT out[16];
out[16];
PARTS:
PARTS:
RAM16K(in=in,load=load,address=address[0..13],out=null);
RAM16K(in=in,load=load,address=address[0..13],out=null);
Screen(in=in,load=load,address=address[0..12],out=null);
Screen(in=in,load=load,address=address[0..12],out=null);
Keyboard(out=null);
Keyboard(out=null);
}}

 Effect: When the simulator evaluates this chip, it displays the GUI side-
effects of its built-in chip parts
 Chip logic: The only purpose of this demo chip is to force the simulator to
show the GUI of some built-in chips. Other than that, the chip logic is
meaningless: it simultaneously feeds the 16-bit data input (in) into the
RAM16K and the Screen chips, and it does nothing with the keyboard.

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GUIDemo Chip in Action

3. 16 black
2. User: pixels are
runs the drawn
clock beginning in
row = 156
col = 320

1. User enters:
 in = –1
Explanation: According to the specification of
(=16 1’s in binary)
the computer architecture3. The chipinlogic
described the
 address = 5012 routesscreen
book, the pixels of the physical the in are
value
 load = 1 simultaneously
continuously refreshed from an 8K RAM- into
the Screen
resident memory map implemented bychip
the and
[Link] chip. The exactthe RAM16K
mappingchip
between this memory chip and the actual
pixels is specified in Chapter 5. The refresh
process is carried out by the simulator.

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Hardware Simulation Tutorial

Part VI:
Debugging tools

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System Variables

The simulator recognizes and maintains the following variables:

 Time: the number of time-units (clock-cycles) that elapsed since the script
started running is stored in the variable time

 Pins: the values of all the input, output, and internal pins of the simulated chip
are accessible as variables, using the names of the pins in the HDL code

 GUI elements: the values stored in the states of GUI-empowered built-in chips
can be accessed via variables. For example, the value of register 3 of the
RAM8 chip can be accessed via RAM8[3].

All these variables can be used in scripts and breakpoints, for debugging.

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Breakpoints

2. Previously-
1. Open the declared
breakpoints breakpoints
panel

3. To update an existing
breakpoint, double-click
it

The breakpoints logic:

 Breakpoint = (variable, value)
 When the specified variable in some
breakpoint reaches its specified value,
3. Add, delete, the script pauses and a message is
or update displayed
breakpoints  A powerful debugging tool.

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Scripts for Testing the Topmost Computer chip
load
load [Link]
[Link]  Scripts that test the CPU chip or the
ROM32K
ROM32K load
load [Link],
[Link], Computer chip described in the book usually
output-file [Link],
output-file [Link],
compare-to start by loading a machine-language program
compare-to [Link],
[Link],
output-list (.asm or .hack file) into the ROM32K chip
output-list time%S1.4.1
time%S1.4.1
reset%B2.1.2
reset%B2.1.2  The rest of the script typically uses various
ARegister[]%D1.7.1
ARegister[]%D1.7.1 features like:
DRegister[]%D1.7.1
DRegister[]%D1.7.1
PC[]%D0.4.0
PC[]%D0.4.0 • Output files
RAM16K[0]%D1.7.1
RAM16K[0]%D1.7.1
RAM16K[1]%D1.7.1 • Loops
RAM16K[1]%D1.7.1
RAM16K[2]%D1.7.1;
RAM16K[2]%D1.7.1; • Breakpoints
breakpoint
breakpoint PC PC 10;
10;
//
// First run: compute max(3,5)
First run: compute max(3,5)
• Variables manipulation
set RAM16K[0]
set RAM16K[0] 3, 3, • tick, tock
set
set RAM16K[1]
RAM16K[1] 5, 5,
output;
output; • Etc.
repeat
repeat 14
14 {{
tick,
• All these features are described in Appendix
tick, tock,
tock, output;
output; B of the book (Test Scripting Language).
}}
//
// Reset
Reset the
the PC
PC (preparing
(preparing for
for
// second run)
// second run)
set
set reset
reset 1,
1,
tick,
tick, tock, output;
tock, output;
// Etc.
// Etc.
clear-breakpoints;
clear-breakpoints;
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Visual Options

 Program flow: animates the

flow of the currently loaded
Format of displayed  Script: displays the
pin values: current test script
program
 Decimal (default)  Output: displays the
 Program & data flow:
animates the flow of the current  Hexadecimal generated output file
program and the data flow  Binary  Compare: displays
throughout the GUI elements the supplied
displayed on the screen comparison file
 No animation (default):  Screen: displays the
program and data flow are not GUI effects of built-in
animated. chips, if any.
 Tip: When running programs on
the CPU or Computer chip, any
animation effects slow down the
simulation considerably.

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Hardware Simulation Tutorial

Part VII:

The Hack
Hardware Platform

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 Hack: a General-Purpose 16-bit Computer
Sample applications running on the Hack computer:

Hang
Maze
Man

Grades
Pong
Stats

These programs (and many more) were written in the Jack programming language,
running in the Jack OS environment over the Hack hardware platform. The hardware
platform is built in chapters 1-5, and the software hierarchy in chapters 6-12.
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 The Hack Chip-Set and Hardware Platform
Elementary logic gates Combinational chips Sequential chips Computer Architecture
(Project 1): (Project 2): (Project 3): (Project 5):
 Nand (primitive)
 HalfAdder  DFF (primitive)  Memory
 Not
 FullAdder  Bit  CPU
 And
 Or  Add16  Register  Computer
 Xor  Inc16  RAM8
 Mux  ALU  RAM64
 Dmux  RAM512
 Not16
 RAM4K
 And16
 RAM16K
 Or16
 Mux16
 PC
 Or8Way
 Mux4Way16 Most of these chips are generic, meaning that they can
 be used in the construction of many different computers.
Mux8Way16
 DMux4Way The Hack chip-set and hardware platform can be built
 DMux8Way using the hardware simulator, starting with primitive
[Link] and [Link] gates and culminating in the
[Link] chip.
This construction is described in chapters 1,2,3,5 of the
book, and carried out in the respective projects.

HW Simulator Tutorial [Link] Tutorial Index Slide 48/49

Aside: H.D. Thoreau about chips, bugs, and close observation:

I was surprised to find that the chips were covered

with such combatants, that it was not a duellum,
but a bellum, a war between two races of ants, the
red always pitted against the black, and frequently
two red ones to one black. The legions of these
Myrmidons covered all the hills and vales in my
wood-yard, and the ground was already strewn with
the dead and dying, both red and black.
It was the only battle which I have ever witnessed, the only
battlefield I ever trod while the battle was raging; internecine war;
the red republicans on the one hand, and the black imperialists on
the other. On every side they were engaged in deadly combat, yet
without any noise that I could hear, and human soldiers never
fought so resolutely.... The more you think of it, the less the
difference. And certainly there is not the fight recorded in Concord
history, at least, if in the history of America, that will bear a
moment’s comparison with this, whether for the numbers engaged
in it, or for the patriotism and heroism displayed.
From “Brute Neighbors,” Walden (1854).
HW Simulator Tutorial [Link] Tutorial Index Slide 49/49