Bus Interconnection
What is Bus
• A bus is a communication pathway connecting
2 or more devices
Key Characteristic of bus:
• Shared Transmission Medium
• Multiple Devices Connect to bus(s/g
transmitted by 1 device is available for
reception by all other devices )
Cont..
• If 2 devices transmit during same time, their
signal OVERLAP and become GRABLED
• So Only 1 device at a time can successfully
transmit
• Typically, bus contains multiple
communicating pathways or lines
• Each line is capable of transmitting signal
represented binary 1 or 0
• A sequence of binary digit can be transmitted
across a single line
• Several Lines of bus can transmit(in parallel)
• Eg . 8 bit unit of data can be transmitted over
8 bus lines
• A bus that connects major computer
components (Processor,memory,IO) is called
System bus.
Bus Structure
• A system bus consists of 50 to 100 separate
lines
• Each line is assigned a particular meaning or
function
• Classified into 3 groups
1. Data Lines
2. Address Lines
3. Control Lines
[Link] Lines
• Provide a path for moving a data among
system modules
• Lines are called Data Bus
• Data bus consists of 32,64,128 or even more
separate lines
• No of lines referred to as width of the data bus
Contd..
• No .of lines determines how many bits can be
transferred at a time
• WIDTH of the data bus is a KEY Factor in
determing a Overall System Performance
2. Address Lines
• Are used to designate source and destination
of the data on the data bus
• Known as Address Bus
• Address bus determines the maximum
possible memory capacity of the system
• Address lines are also used to address IO ports
3. Control Lines
• Known as control bus
• Used to control the access to data and
address lines
• Control bus transmit both command and
timing information among system modules
• Timing signal: Indicate Validity of data &
address information
• Command signal: Specify operation to be
performed
Bus Interconnection Scheme
Physical Realization of Bus
Architecture
Single Bus Problems
• Lots of devices on one bus leads to:
– Propagation delays(Time takes the devices to
coordinate the use of bus)
• Long data paths mean that co-ordination of bus use can
adversely affect performance
• If aggregate data transfer approaches bus capacity
• Most systems use multiple buses to overcome
these problems
Traditional (ISA)
(with cache)
High Performance Bus
Bus Types
• Dedicated
– Separate data & address lines
• Multiplexed
– Shared lines
– Address valid or data valid control line
– Advantage - fewer lines
– Disadvantages
• More complex control
• Ultimate performance
Bus Arbitration
• More than one module controlling the bus
• e.g. CPU and DMA controller
• Only one module may control bus at one time
• Arbitration may be centralised or distributed
Centralised or Distributed Arbitration
• Centralised
– Single hardware device controlling bus access
• Bus Controller
• Arbiter
Responsible for allocating time on the bus
– May be part of CPU or separate
• Distributed
– Each module contains access control logic &
modules act together to share the bus