8085 Instructions Set

Reference Book:
Ramesh Gaonkar, Microprocessor Architecture Programming and
Applications with the 8085, Prentice Hall, Eight Edition, 2013.

Module 7: 8085 Instruction Set (Lecture-15)

Prepared by
Amarjeet Kaur
 The 8085 Instructions
– Since the 8085 is an 8-bit device it can have up to 28 (256) instructions.
• However, the 8085 only uses 246 combinations that represent a total of 74 instructions.
– Most of the instructions have more than one format.

– These instructions can be grouped into five different groups:

• Data Transfer Operations
• Arithmetic Operations
• Logic Operations
• Branch Operations
• Machine Control Operations

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 Instruction and Data Formats

• Each instruction has two parts.

– The first part is the task or operation to be performed.
• This part is called the “opcode” (operation code).

– The second part is the data to be operated on

• Called the “operand”.

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 Data Transfer Operations
– These operations simply COPY the data from the source to the destination.
– MOV, MVI, LDA, and STA

– They transfer:
• Data between registers.
• Data Byte to a register or memory location.
• Data between a memory location and a register.
• Data between an I\O Device and the accumulator.

– The data in the source is not

changed.
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 The LXI instruction
• The 8085 provides an instruction to place the 16-bit data into the
register pair in one step.
• LXI Rp, <16-bit address> (Load eXtended Immediate)

– The instruction LXI B 4000H will place the 16-bit number 4000 into the
register pair B, C.
• The upper two digits are placed in the 1st register of the pair and the lower two
digits in the 2nd .

LXI B 40 B 40 00 C
00H

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 The Memory “Register”
• Most of the instructions of the 8085 can use a memory location in place
of a register.
– The memory location will become the “memory” register M.
• MOV M B
– copy the data from register B into a memory location.
– Which memory location?

• The memory location is identified by the contents of the HL register

pair.
– The 16-bit contents of the HL register pair are treated as a 16-bit address and
used to identify the memory location.
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 Using the Other Register Pairs

– There is also an instruction for moving data from memory to the

accumulator without disturbing the contents of the H and L register.

• LDAX Rp (LoaD Accumulator eXtended)

– Copy the 8-bit contents of the memory location identified by the Rp register pair into the Accumulator.
– This instruction only uses the BC or DE pair.
– It does not accept the HL pair.

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 Indirect Addressing Mode
• Using data in memory directly (without loading first into a
Microprocessor’s register) is called Indirect Addressing.

• Indirect addressing uses the data in a register pair as a 16-bit address to

identify the memory location being accessed.
– The HL register pair is always used in conjunction with the memory register
“M”.
– The BC and DE register pairs can be used to load data into the Accumultor using
indirect addressing.

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 Arithmetic Operations
– Addition (ADD, ADI):
– Any 8-bit number.
– The contents of a register.
– The contents of a memory location.
• Can be added to the contents of the accumulator and the result is stored in the accumulator.

– Subtraction (SUB, SUI):

– Any 8-bit number
– The contents of a register
– The contents of a memory location
• Can be subtracted from the contents of the accumulator. The result is stored in the
accumulator.

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 Arithmetic Operations Related to Memory

• These instructions perform an arithmetic operation using the

contents of a memory location while they are still in memory.
– ADD M
• Add the contents of M to the Accumulator
– SUB M
• Sub the contents of M from the Accumulator
– INR M / DCR M
• Increment/decrement the contents of the memory location in place.

– All of these use the contents of the HL register pair to identify the
memory location being used.

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 Arithmetic Operations

– Increment (INR) and Decrement (DCR):

• The 8-bit contents of any memory location or any register can be directly
incremented or decremented by 1.
• No need to disturb the contents of the accumulator.

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 Manipulating Addresses
Now that we have a 16-bit address in a register pair, how do we
manipulate it?
• – It is possible to manipulate a 16-bit address stored in a register pair as one entity
using some special instructions.

• INX Rp (Increment the 16-bit number in the register pair)

• DCX Rp (Decrement the 16-bit number in the register pair)

– The register pair is incremented or decremented as one entity. No

need to worry about a carry from the lower 8-bits to the upper. It is
taken care of automatically.
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 Logic Operations
• These instructions perform logic operations on the contents of
the accumulator.
– ANA, ANI, ORA, ORI, XRA and XRI
• Source: Accumulator and
– An 8-bit number
– The contents of a register
– The contents of a memory location
• Destination: Accumulator
ANA R/M AND Accumulator With Reg/Mem
ANI # AND Accumulator With an 8-bit number

ORA R/M OR Accumulator With Reg/Mem

ORI # OR Accumulator With an 8-bit number

XRA R/M XOR Accumulator With Reg/Mem

XRI # XOR Accumulator With an 8-bit number
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 Logic Operations
– Complement:
• 1’s complement of the contents of the
accumulator.
CMA No operand

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 Additional Logic Operations
• Rotate
– Rotate the contents of the accumulator one
position to the left or right.
– RLC Rotate the accumulator left.
Bit 7 goes to bit 0 AND the Carry flag.
– RAL Rotate the accumulator left through the carry. Bit 7 goes to the
carry and carry goes to bit 0.
– RRC Rotate the accumulator right.
Bit 0 goes to bit 7 AND the Carry flag.
– RAR Rotate the accumulator right through the carry. Bit 0 goes to the
carry and carry goes to bit 7.

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 RLC vs. RLA
Carry Flag

• RLC
7 6 5 4 3 2 1 0

Accumulator

Carry Flag

• RAL 7 6 5 4 3 2 1 0

Accumulator

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 Logical Operations
• Compare
• Compare the contents of a register or memory location with the contents of the accumulator.

– CMP R/M Compare the contents of the register or memory location to the
contents of the accumulator.

– CPI # Compare the 8-bit number to the contents of the accumulator.

• The compare instruction sets the flags (Z, Cy, and S).

• The compare is done using an internal subtraction that does not change the contents of the accumulator.
A – (R / M / #)

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 Branch Operations

• Two types:
– Unconditional branch.
• Go to a new location no matter what.
– Conditional branch.
• Go to a new location if the condition is true.

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 Unconditional
Branch
– JMP Address
– Jump to the address specified (Go to).

– CALL Address
• Jump to the address specified but treat it as a subroutine.

– RET
• Return from a subroutine.

– The addresses supplied to all branch operations must be 16-bits.

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 Conditional Branch
– Go to new location if a specified condition is
met.
• JZ Address (Jump on Zero)
– Go to address specified if the Zero flag is set.
• JNZ Address (Jump on NOT Zero)
– Go to address specified if the Zero flag is not set.
• JC Address (Jump on Carry)
– Go to the address specified if the Carry flag is set.
• JNC Address (Jump on No Carry)
– Go to the address specified if the Carry flag is not set.
• JP Address (Jump on Plus)
– Go to the address specified if the Sign flag is not set
• JM Address (Jump on Minus)
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– Go to the address specified if the Sign flag is set.
 Machine Control
– HLT
• Stop executing the program.
– NOP
• No operation
• Exactly as it says, do nothing.
• Usually used for delay or to replace instructions during debugging.

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 Operand Types
• There are different ways for specifying the operand:
– There may not be an operand (implied operand)
• CMA
– The operand may be an 8-bit number (immediate data)
• ADI 4FH
– The operand may be an internal register (register)
• SUB B
– The operand may be a 16-bit address (memory address)
• LDA 4000H

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 Instruction Size
• Depending on the operand type, the instruction may have different sizes. It
will occupy a different number of memory bytes.
– Typically, all instructions occupy one byte only.
– The exception is any instruction that contains immediate data or a memory address.
• Instructions that include immediate data use two bytes.
– One for the opcode and the other for the 8-bit data.
• Instructions that include a memory address occupy three bytes.
– One for the opcode, and the other two for the 16-bit address.

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 Instruction with Immediate Date

• Operation: Load an 8-bit number into the accumulator.

– MVI A, 32
• Operation: MVI A
• Operand: The number 32
• Binary Code:

0011 1110 3E 1st byte.

0011 0010 32 byte.
nd
2

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 Instruction with a Memory Address

• Operation: go to address 2085.

– Instruction: JMP 2085

• Opcode: JMP
• Operand: 2085
• Binary code:
1100 0011 C3 1st byte.
1000 0101 85 2nd byte
0010 0000 20 3rd byte
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 Addressing Modes
• The microprocessor has different ways of specifying the data for the
instruction. These are called “addressing modes”.

• The 8085 has four addressing modes:

– Implied CMA , XRA, ANA, RAL

– Immediate MVI B, 45, ORI 05, ANI 05, CPI 05
– Direct LDA 4000 JMP 4000h
– Indirect LDAX B, ADD M
• Load the accumulator with the contents of the memory
location whose address is stored in the register pair BC).
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 Data Formats
• In an 8-bit microprocessor, data can be represented in one of four
formats:
• ASCII
• BCD
• Signed Integer
• Unsigned Integer.

– It is important to recognize that the microprocessor deals with 0’s and 1’s.
• It deals with values as strings of bits.
• It is the job of the user to add a meaning to these strings.

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 Data Formats
• Assume the accumulator contains the following value: 0100 0001.
– There are four ways of reading this value:
• It is an unsigned integer expressed in binary, the equivalent decimal number would be 65.
• It is a number expressed in BCD (Binary Coded Decimal) format. That would make it, 41.
• It is an ASCII representation of a letter. That would make it the letter A.
• It is a string of 0’s and 1’s where the 0th and the 6th bits are set to 1 while all other bits are set to
0.

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Interchange.
 Intel 8085 addressing modes
• Immediate addressing (MVI B, 25H)
• Direct addressing (LDA 1020H)
• Register addressing (MOV B, C)
• Implied addressing (CMA, RAR)
• Register Indirect addressing(MOV A, M; ADD M).
• Register Indirect addressing(LDAX B, LDAX D, STAX B, STAX D)

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 INSTRUCTION FORMAT OF 8085
• The size of 8085 instructions can be 1 byte, 2 bytes or 3
bytes.
– The 1-byte instruction has an opcode alone.
– The 2 bytes instruction has an opcode followed by an eight-bit
address or data.
– The 3 bytes instruction has an opcode followed by 16 bit address
or data. While storing the 3 bytes instruction in memory, the
sequence of storage is, opcode first followed by low byte of
address or data and then high byte of address or data.

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 Reference
• Ramesh Gaonkar, Microprocessor Architecture Programming and Applications with
the 8085, Prentice Hall, Eight Edition, 2013.
• [Link]
• [Link]

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