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8086 Data Transfer Instruction Overview

The document outlines the instruction set for the 8086 microprocessor, detailing various types of data transfer instructions, including move, load, store, input/output, and string instructions. It also describes logical instructions such as AND, OR, XOR, and shift operations, along with their respective opcodes and operands. Additionally, it covers repetition instructions and examples of their usage.

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0% found this document useful (0 votes)
9 views31 pages

8086 Data Transfer Instruction Overview

The document outlines the instruction set for the 8086 microprocessor, detailing various types of data transfer instructions, including move, load, store, input/output, and string instructions. It also describes logical instructions such as AND, OR, XOR, and shift operations, along with their respective opcodes and operands. Additionally, it covers repetition instructions and examples of their usage.

Uploaded by

Anantha Rama H
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd

8086 INSTRUCTION

SET
Types of Data transfer instructions :

1. Move instructions:
These instructions are used to move data from one memory location to
another or between a memory location and a register. They include the
following instructions:

• MOV: Moves data from a source operand to a destination operand.


• XCHG: Swaps the contents of two operands.
• XLAT: Translates a byte in memory using a lookup table pointed to by
the contents of the AL register.
• LEA: Loads a 16-bit offset address into a register.
2. Load instructions:

These instructions are used to load data from a memory location or I/O
device into a register. They include the following instructions:

• LDS: Loads a 16-bit pointer value from a memory location into a register
pair and loads the 8-bit value from the next memory location into
another register.
• LSS: Loads a 16-bit pointer value from a memory location into a register
pair and loads the 16-bit value from the next memory location into
another register.
• LXI: Loads a 16-bit value into a register pair.
• MOV with memory operand: Loads data from a memory location into a
register.
3. Store instructions:
These instructions are used to store data from a register into a memory
location or I/O device. They include the following instructions:

• MOV with memory operand: Stores data from a register into a memory
location.
• STA: Stores the contents of the accumulator register (AL or AX) in memory.
• STAX: Stores the contents of a register pair (BC, DE, or HL) in memory using
either the indirect addressing
• mode or the direct addressing mode.
• SHLD: Stores a 16-bit data word from registers H and L in memory using the
direct addressing mode.
• PUSH: Stores the contents of a register onto the stack.
4. Input/Output instructions:

These instructions are used to communicate with external input/output


(I/O) devices. They include the following instructions:

• IN: Reads a byte or word of data from an I/O port into a register.
• OUT: Writes a byte or word of data from a register to an I/O port.
• INS: Reads a block of data from an I/O port into a memory location.
• OUTS: Writes a block of data from a memory location to an I/O port.
5. String instructions:
These instructions are used for manipulating strings of data, such as moving,
copying, or comparing strings. They operate on consecutive bytes or words in
memory, and can be used for fast and efficient string processing.
Some examples of string instructions include:
• MOVS: Moves a byte or word from a source location to a destination
location, and updates the index registers to point to the next byte or word.
• CMPS: Compares a byte or word in memory to a byte or word in a register,
and updates the index registers accordingly.
• LODS: Loads a byte or word from a memory location into a register, and
updates the index registers to point to the next byte or word.
• STOS: Stores a byte or word from a register into a memory location, and
updates the index registers to point to the next byte or word.
OPCODE OPERAND EXPLANATION EXAMPLE

MOV D, S D=S MOV AX, [SI]


PUSH D pushes D to the stack PUSH DX
POP D pops the stack to D POP AS
PUSHA NONE put all the register into stack PUSHA
POPA NONE get words from stack to all the registers POPA
XCHG D,S exchanges contents of D and S XCHG [2050], AX
IN D, S copies a byte or word from S to D IN AX, DX
OUT D, S copies a byte or word from D to S OUT 05, AL

XLAT none translates a byte in AL using a table in the XLAT


memory
OPCODE OPERAND EXPLANATION EXAMPLE
LAHF NONE loads AH with the lower byte of the flag LAHF
register

SAHF NONE stores AH register to lower byte of the flag SAHF


register

PUSHF NONE copies the flag register at the top of the PUSHF
stack

POPF NONE copies a word at the top of the stack to the POPF
flag register
• Here D stands for destination and S stands for source.
• D and S can either be register, data or memory address.
Opcode Operand Description

ADD D,S Used to add the provided


byte to byte/word to word.

ADC D,S Used to add with carry.

INC D Used to increment the


provided byte/word by 1.

AAA ---- Used to adjust ASCII after


addition.

DAA ---- Used to adjust the decimal


after the
addition/subtraction
operation.
SUB D,S Used to subtract the byte from
byte/word from word.

SBB D,S Used to perform subtraction with


borrow.

DEC D Used to decrement the provided


byte/word by 1.

NEG D Used to negate each bit of the provided


byte/word and add 1/2’s complement.

CMP D Used to compare 2 provided byte/word.

AAS ---- Used to adjust ASCII codes after


subtraction.

DAS ---- Used to adjust decimal after


subtraction.
MUL 8-bit reg Used to multiply
unsigned byte by
byte/word by word.

IMUL 8 or 16-bit reg Used to multiply


signed byte by
byte/word by word.

AAM ---- Used to adjust ASCII


codes after
multiplication.
DIV 8-bit reg Used to divide the
unsigned word by byte or
unsigned double word by
word.

IDIV 8 or 16-bit reg Used to divide the signed


word by byte or signed
double word by word.

AAD ---- Used to adjust ASCII


codes after division.

CBW ---- Used to fill the upper byte


of the word with the
copies of sign bit of the
lower byte.

CWD ---- Used to fill the upper


word of the double word
with the sign bit of the
lower word.
• Logical Instructions
• 8086 Logical Instructions
AND Instruction :
The AND instruction performs bit by bit logical AND operation between
source operand and destination operand, and stores the result in the
destination operand.
The logical AND operation gives output as TRUE (logic 1) only when
both the inputs are TRUE i.e., logic 1, otherwise, the output will be
FALSE (logic 0) as shown in the below truth table.
• OR Instruction :
• The OR instruction performs bit by bit logical OR
operation between source operand and destination
operand, and stores the result in the destination
operand. The logical OR operation gives output as logic
1 when either one of the inputs or both the inputs is
given as logic 1. When both the inputs are given as logic
0, then the output will be logic 0 as shown in the below
truth table.
XOR Instruction :
• The XOR instruction performs bit by bit logical exclusive OR (XOR)
operation between source operand and destination operand, and
stores the result in the destination operand. The logical XOR
operation returns FALSE only when two inputs are same i.e.,
either two inputs with logic 0 or with logic 1, otherwise the output
will be TRUE as shown in the below truth table.
• NOT (Complement) Instruction :
The NOT instruction complement (invert) the elements of the
operand (register or memory location) in a bit-wise manner. It
gives output as FALSE if the input is TRUE and vice versa as shown
in below truth table.
TEST Instruction :
• The TEST instruction performs bit by bit logical AND
operation on the source and destination operand but
does not load the destination operand with result.
• This instruction performs bit by bit AND and sets the
corresponding Flag.
• Hence TEST instruction only affects the flag register
(OF, CF, SF, ZF, PF and AF) which indicates the result of
the operation without changing any operand.
• This is normally used to compare the operands bit by
bit.
• SHL/SAL Instruction :
• This instruction stands for Shift Logical/Arithmetic Left. The
SHL/SAL instruction performs shifting of each bit in the operand
(register or memory location) to the left side and fills the least
significant bit (LSB) with zero and obtain the result in the
destination operand. The MSB is shifted into the carry flag (CF).
The operation of SHL/SAL instruction with 2 times shift is shown
below.
• SHR Instruction :
• This instruction stands for shift Logical Right. The SHR instruction
performs shifting of each bit in the operand (register or memory
location) to the right side and fills the most significant bit (MSB)
with zero. The LSB is shifted into the carry flag (CF). The
operation of SHR instruction with 2 times shift is shown below.
• SAR Instruction :
• This instruction stands for Shift Arithmetic Right. It does the same
operation as SHR except it fills the bit portion shifted right from
the MSB with a copy of old MSB i.e., the SAR instruction performs
the right shift on each bit and fills the MSB portion with the copy
of old MSB. The operation of SAR instruction with 2 times shift is
shown below.
• ROL Instruction :
• This instruction stands for Rotate Left without carry flag. The
contents of the operand (register or memory location) are rotated
left bit-wise by some number of positions depending on the count
value. During this rotation, the most significant bit (MSB) is
moved into the carry flag (CF) as well as into the least significant
bit (LSB) position. The below shows the operation ROL instruction
with count value 2.
• ROR Instruction :
• This instruction stands for Rotate Right without carry flag. The
contents of the operand are rotated right bit-wise by some
number of positions depending on the count value. The ROL
instruction seen above rotates the bits towards the left side,
whereas the ROR instruction rotates the bits towards the right
side. Since this instruction rotates the bits right, the least
significant bit (LSB) is moved into the carry flag (CF) as well as
into the most significant bit (MSB) position. The below shows the
operation ROR instruction with count value 2.
• RCR Instruction :
This instruction stands for Rotate Right Through Carry. In this
instruction, the contents of the operand (register or memory
location) are rotated right bit-wise by some number of positions
along with the carry flag. During the rotation the least significant
bit (LSB) is moved to carry flag, and the carry flag is moved into
the most significant bit (MSB). The below shows the operation RCR
instruction with count value 2.
• RCL Instruction :
This instruction stands Rotate Left Through Carry. This
instruction is similar to RCR instruction, but in this, the
contents of the operand will be rotated bit-wise left with
the carry flag involved in the rotation. The below shows
the operation RCL instruction with count value 2.
OPCODE OPERAND EXPLANATION EXAMPLE

repeat the given


REP instruction instruction till CX != 0 REP MOVSB

repeat the given


REPE instruction instruction while CX = 0 REPE

repeat the given


REPZ instruction REPZ
instruction while ZF = 1

repeat the given


REPNE instruction instruction while CX != 0 REPNE

repeat the given


REPNZ instruction REPNZ
instruction while ZF = 0

moves contents of byte


MOVSB none given by DS:SI into ES:DI MOVSB
moves contents of
MOVSW none word given by DS:SI MOVSW
into ES:DI

moves contents of
MOVD none double word given by MOVD
DS:SI into ES:DI

moves the byte at


LODSB none address DS:SI into AL; LODSB
SI is incr/decr by 1

moves the word at


LODSW none address DS: SI into AX; LODSW
SI is incr/decr by 2

moves the double


word at address DS:SI
LODSD none into EAX; SI is incr/decr LODSD
by 4
moves contents of AL
to byte address given
STOSB none STOSB
by ES:DI; DI is incr/dec
by 1

moves the contents of


AX to the word address
STOSW none given by ES:DI; DI is STOSW
incr/decr by 2

moves contents of EAX


to the DOUBLE WORD
STOSD none address given by ES:DI; STOSD
DI is incr/decr by 4

compares byte at ES:DI


SCASB none with AL and sets flags SCASB
according to result
compares word at
SCASW none ES:DI with AX and SCASW
sets flags

compares double
SCASD none word at ES:DI with SCASD
EAX and sets flags

compares byte at
CMPSB none ES:DI with byte at CMPSB
DS:SI and sets flags
compares word at
CMPSW none ES:DI with word at CMPSW
DS:SI and sets flags

compares double
word at ES:DI with
CMPSD none double word at CMPSD
DS:SI and sets flags

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