BCS402
MICROCONTROLLERS
MODULE 3
C Compilers and Optimization: Basic C
Data Types, C Looping Structures, Register
Allocation, Function Calls, Pointer Aliasing,
Portability Issues.
Textbook 1: Chapter 5.1 to 5.7 and 5.1
1
There are two reasons for the extra instructions---
Here 2 cycle is saving
Register Allocation---
Compiler generated output
Example programs
[Link] ALP program for ARM7 demonstrating the data
transfer(block transfer).
AREA DATATRANSFER, CODE, READONLY
ENTRY
LDR R9,=SRC
LDR R10,=DST
LDMIA R9!,{R0-R7}
STMIA R10!,{R0-R7}
SRC DCD 1,2,3,4,5,6,7,8
AREA BLOCKDATA, DATA, READWRITE
DST DCD 0,0,0,0,0,0,0,0
END
2. Write ALP program for ARM7 demonstrating logical
operation.
AREA LOGIC, CODE, READONLY
ENTRY
LDR R0, =5
LDR R1, =3
AND R4, R0, R1
ORR R5, R0, R1
EOR R6, R0, R1
BIC R7, R0, R1
END
[Link] ALP program for ARM7 demonstrating arithmetic
operation.
AREA ARITH, CODE, READONLY
ENTRY
LDR, R1, =20
LDR R2, =25
ADD R3, R1, R2
MUL R4, R1, R2
SUB R5, R1, R2
END
AREA FACTORIAL, CODE, READONLY
[Link] ENTRY
ALP using ARM instructions that calls
subroutine
LDRfact
R0, to
=5find factorial of a given number.
BL FACT // BRANCH WITH LINK
LDR R4, =DST // LOCATION TO STORE RESULT
STR R5, [R4]
STOP B STOP
FACT
MOVS R1, R0 ; If R1= 0, ZF =1
MOVEQ R5, #1 ; If ZF =1, Return 1
LOOP
SUBNES R1, R1, #1 ; R1 = R1-1 if R1 not 0
MULNE R0, R1, R0 ; R0 = R1 * R0
BNE LOOP ; IF (R1 != 0) LOOP.
MOV R5, R0
MOV PC, R14 ; RETURN WITH RESULT IN
R5. AREA FACT, DATA, READWRITE
DST DCD 0
END
[Link] ALP program to add array of 16 bit
numbers
AREA and store
AryAdd, CODE,the result in memory.
READONLY
ENTRY
LDR R0, =SCR ; pointer to source array
LDR R1, = DST ; pointer to destination
MOV R2, #5 ; count of numbers
MOV R5, #0 ; initial sum
UP LDRH R3, [R0] ; 1st number in R2
ADD R5, R5, R3 ; add numbers
ADD R0, R0, #2 ; increment pointer to next number
SUBS R2, R2, #1 ; decrement count by 1
CMP R2, #0
BNE UP
STRH R5, [R1]
SRC DCW 10, 20, 30, 40, 50
AREA BLOCKDATA, DATA, READWRITE
DST DCW 0
END
6. Write ALP program to fibonacci of given number.
AREA FIB, CODE, READONLY
ENTRY
MOV R0, #0 ; FIRST FIBONACCI NUMBER
SUB R0, R0, #1 ; R0= -1
MOV R1, #1
MOV R4, #5 ;NO OF FIBONACCI NUMBERS TO GENERATE
LDR R2, = FIBO ;ADDRESS TO STORE FIBONACCI NUMBERS
BACK
ADD R0, R1 ;ADDING THE PREVIOUS TWO NUMBERS
STR R0, [R2] ; STORING THE NUMBER IN A MEMORY
ADD R2, #4 ;INCREMENTING THE ADDRESS
MOV R3, R0
MOV R0, R1
MOV R1, R3
SUB R4, #1 ;DECREMENTING THE COUNTER
CMP R4, #0 ;COMPARING THE COUNTER TO ZERO
BNE BACK ;LOOPING BACK
STOP B STOP
AREA FIBONACCI, DATA, READWRITE
FIBO DCD 0,0,0,0,0