MicroPrommed Control Unit

• The control memory address register specifies the address of the

microinstruction,
• The control data register holds the microinstruction read from
memory
• The microinstruction contains a control word that specifies one or
more micro­operations for the data processor
• Once these operations are executed, the control must determine the
next address
• The location of the next micro-instruc­tion may be the one next in
sequence, or it may be located somewhere else in the control
memory.
• For this reason it is necessary to use some bits of the present
microinstruction to control the generation of the address of the next
microinstruction.
• The next address may also be a function of external input conditions
• While the microoperations are being executed, the next address is
computed in the next address generator circuit and then transferred
into the control address register to read the next microinstruction
• Thus a micro-instruc­tion contains bits for initiating microoperations in
the data processor part and bits that determine the address sequence
for the control memory.
• The next address generator is sometimes called a microprogram
sequence
Typical functions of
MicroProgramSequencer
• incrementing the control address register by one
• loading into the control address register an address from control
memory
• transferring an external address
• loading an initial address to start the control operations.
Address Sequencing:
• Microinstructions are stored in control memory in groups, with each
group specifying a routine.
• Each computer instruction has its own microprogram routine in
control memory to generate the microoperations that execute the
instruction.
Steps in address sequencing:
Fetch Routine:
• An initial address is loaded into the control address register when
power is turned on in the computer.
• This address is usually the address of the first microinstruction that
activates the instruction fetch routine.
• The fetch routine may be sequenced by incrementing the control
address register through the rest of its microinstructions.
• At the end of the fetch routine, the instruction is in the instruction
register of the computer
Calculation of Effective Address:
• The effective address computation routine in control memory can be
reached through a branch microinstruction, which is conditioned on the
status of the mode bits of the instruction.
• When the effective address computation routine is completed, the
address of the operand is available in the memory address register
Execution of instruction:
• Each instruction has its own microprogram routine stored in a given
location of control memory.
Mapping: The transformation from the instruction code bits to an
address in control memory where the routine is located is referred to as
a mapping process.
A mapping procedure is a rule that transforms the instruction
code into a control memory address.
• Once the required routine is reached, the microinstructions that
execute the instruction may be sequenced by increment­ing the
control address register, but sometimes the sequence of
microoperations will depend on values of certain status bits in
processor registers.
• Microprograms that employ subroutines will require an external
register for storing the return address.
Return to next fetch routine
• When the execution of the instruction is completed, control must
return to the fetch routine. This is accomplished by executing an
unconditional branch microinstruction to the first address of the fetch
routine
Block diagram of a control memory and the
associated hardware needed for selecting the
next microinstruction address
Subroutines:
• many microprograms contain identical sec­tions of code.
Microinstructions can be saved by employing subroutines that use
common sections of microcode.
• For example, the sequence of microoper­ations needed to generate
the effective address of the operand for an instruc­tion is common to
all memory reference instructions.
• This sequence could be a subroutine that is called from within many
other routines to execute the effective address computation.
subroutine register:
• Microprograms that use subroutines must have a provision for storing
the return address during a subroutine call and restoring the address
during a subroutine return.
• This may be accomplished by placing the incremented output from
the control address register into a subroutine register and branch­ing
to the beginning of the subroutine.
• The subroutine register can then become the source for transferring
the address for the return to the main routine.
Microinstruction Format:
Symbolic Microinstructions:
• A symbolic microprogram can be translated into its binary
equivalent by means of an assembler.
• Each line of the assembly language microprogram defines a symbolic
Microinstruction
• Each symbolic microinstruction is divided into five fields:
label, microoperations, CD, BR, and AD. The fields specify the following
information.
1. The label field may be empty or it may specify a symbolic address. A
label is terminated with a colon (:).
2. The microoperations field consists of one, two, or three symbols, sep­
arated by commas, from those defined in Table 7-1. There may be no
more than one symbol from each F field. The NOP symbol is used when
the microinstruction has no microoperations. This will be translated by
the assembler to nine zeros.
• 3. The CD field has one of the letters U, I, S, or Z
4. The BR field contains one of the four symbols defined in Table 7-1.
5. The AD field specifies a value for the address field of the microinstruc­
tion in one of three possible ways:
a. With a symbolic address, which must also appear as a label.
b. With the symbol NEXT to designate the next address in sequence.
c. When the BR field contains a RET or MAP symbol, the AD field is
left empty and is converted to seven zeros by the assembler.
ORG:
• We will use also the pseudo instruction ORG to define the origin, or
first address, of a microprogram routine.
• Thus the symbol ORG 64 informs the assembler to place the next
microinstruction in control memory at decimal address 64, which is
equivalent to the binary address 1000000.
The Fetch Routine: