“Shift Register”
Topics
1. Introducution
2. Classification of Register
3. Bidirectional Shift Register
4. FIFO
5. Usage
[Link] of Shift Register
• A Shift Register is a sequential logic circuit used to store and
shift data.
Parallel input Parallel output
• Data is moved bit by bit through flip-flops in response to clock
pulses.
Serial Serial output
• It shifts data left or right based on control signals. input N bit shift register
• Widely used for data storage and transfer in digital systems.
Clock
2. Classification of Register
1. serial-In, Serial-Out (SISO): Data enters/exits one bit at a time.
2. Serial-In, Parallel-Out (SIPO): Data enters serially, exits in parallel.
3. Parallel-In, Serial-Out (PISO): Data enters in parallel, exits serially.
4. Parallel-In, Parallel-Out (PIPO): Data enters/exits in parallel.
Timing and Control :
• Clock Input: Synchronizes bit shifting.
• Control Signals: Manage shifting (e.g., enable/reset).
1. SISO (Serial-In Serial-Out)
Introduction :
• A Serial-In Serial-Out (SISO) Shift Register is a type of
sequential circuit used to store and transfer data bit by bit.
Key Features :
• Data enters the register serially bit by bit and exits serially
after being shifted through all stages A. Serial-In Serial-Out
Structure:
• Flip-flops connected in series with one serial input and one serial output, controlled by a
shared clock.
Working:
• Initialization: Data enters serially, bit by bit.
• Shifting: Each clock pulse moves data to the next flip-flop.
• Output: Data appears at the output after N clock cycles.
Serial D Q3 D Q2 D Q1 D Q0
DataIn
clk clk clk clk
clock
How Shifting Occurs in SISO Shift Registers
• Initialization: Load a 4-bit sequence (e.g., "1010") one bit at a time via the
serial input.
• Clock Pulses: Each pulse shifts data right. The first flip-flop receives the new bit,
and the last outputs is the current bit.
• Example Shifting: Ex. 0101
• Pulse 1: “0---"
• Pulse 2: “01--" Clock Q3 Q2 Q1 Q0
• Pulse 3: "010-" 0 0 0 0 0
• Pulse 4: "0101" 1 1 0 0 0
• Output: Bits exit sequentially from the last flip-flop. 1 0 1 0 0
1 1 0 1 0
1 0 1 0 1
2. SIPO (Serial-In Parallel-Out)
Definition :
• A SIPO Shift Register takes serial data input and provides
parallel output after processing.
Key Features:
• Shifts data serially, one bit per clock pulse.
B. Serial-In Parallel-Out
• Outputs all data in parallel after N clock cycles for an N-
bit register.
Structure:
• Flip-flops connected in series with one serial input, multiple parallel outputs,
and a shared clock for synchronization.
Working :
Bits enter serially through the input line.
Each bit is stored in a flip-flop and shifted to the next stage on every clock
pulse.
The full data word is available simultaneously at the parallel output lines.
DQ3 DQ1 DQ1 DQ0
Data Input D Q3 D Q2 D Q1 D Q0
clk clk clk clk
clock
clear
3. PISO(Parallel-In Serial-Out)
Definition :
• A Parallel-In Serial-Out (PISO) Shift Register is used to
load parallel data and shift it out serially, bit by bit.
• It’s designed for parallel-to-serial conversion, enabling
efficient data transfer.
C. Parallel-In Serial-Out
Key Features :
• Converts parallel data to a serial stream.
• Synchronization is achieved using a clock signal.
Structure:
• Flip-flops store data; multiplexers handle serial shifting. Parallel inputs allow
simultaneous data loading.
Working Mechanism:
• Parallel Load: Data is loaded simultaneously into flip-flops.
• Shifting: Bits shift one position per clock pulse.
• Serial Output: Outputs one bit per cycle until all bits are shifted out.
ParalleI
Control Input
Signal
AND AND AND AND AND AND
OR OR OR
D Q3 D Q2 D Q1 D Q0 Serial
output
clk clk clk clk
clock
clear
4. PIPO(Parallel-In Parallel-Out)
Definition :
• A Parallel-In Parallel-Out (PIPO) Shift Register accepts and outputs data in
parallel without serialization.
• It’s primarily used for fast data storage and transfer.
Key Features :
• Operates on the entire data word at once.
• No shifting occurs; only storage and transfer functions are performed.
D. Parallel-In Parallel-Out
Structure :
• Consists of flip-flops with parallel input and parallel output connections.
• All bits are loaded and retrieved simultaneously.
Working Mechanism :
[Link] Load: Data is loaded into all flip-flops at the same time.
[Link] Output: All bits appear simultaneously at the output lines.
Parallel DataOut
QA QB QC QD
D Q3 D Q2 D Q1 D Q0
clk clk clk clk
clock
PA PB PC PD
Parallel Data In
3. Bidirectional Shift Register
Definition :
• A shift register is a sequential circuit for storing and shifting data.
• Uses flip-flops to move data bit by bit.
• A bidirectional shift register shifts data left or right.
• Controlled by dedicated signals for direction selection.
• Enables flexible and reversible data operations.
• Commonly used in advanced data handling applications.
Structure :
•A bidirectional shift register includes:
•Flip-Flops: Store data.
•Clock Input: Synchronizes data shifts.
•Control Signals: Determine the direction (left or right).
•Serial Data I/O: For entering and retrieving data.
•Direction Logic Circuit: Manages control signals for bidirectional flow.
Working :
•Data Input: Entered serially at the input.
•Direction Control:
•Left Shift: Data moves to higher-order bits.
•Right Shift: Data moves to lower-order bits.
•Clock Pulse: Shifts data step-by-step through flip-flops.
•Data Output: Exits serially at the output.
Control
Signal
Dr Dl
AND AND AND AND AND AND AND AND
OR OR OR OR
D Q3 D Q2 D Q1 D Q0
clk clk clk clk
clock
clear
4. FIFO(First-In First-Out)
What is FIFO?
• FIFO (First-In, First-Out) is a sequential data storage and transfer
system where the first data input is the first to be output.
• Operates like a queue, maintaining the order of data flow.
Key Features :
• Ensures order preservation: Data exits in the same order it data written
data read
from FIFO
enters. in FIFO
• Commonly used for data buffering, synchronization, and
interfacing.
Structure of FIFO
Components :
• Input/Write Port: Accepts new data.
• Flip-Flops: Temporarily store data sequentially. Wr_Clk Rd_Clk
• Output/Read Port: Retrieves data in the same order as entered. Data_In Data_out
• Control Logic: Manages read/write operations and data flow. FIFO
Wr_en Rd_in
Full Empty
How It Works :
• Data enters through the write port and shifts toward the read
port. Rst
• Control signals (e.g., enable, full/empty flags) regulate data
entry and output.
Types of FIFO
• 1. Synchronous FIFO
• Both read and write operations are clocked by the same clock signal.
• Used when the input and output operate at the same speed.
• 2. Asynchronous FIFO
• Read and write operations use different clock signals.
• Ideal for systems with mismatched input/output speeds.
5. Usage of shift registers
SISO (Serial-In Serial-Out) PISO (Parallel-In Serial-Out)
• Transfers data bit by bit over a single line. •Combines parallel data into a serial stream
for transmission.
• Useful for signal delay and temporary data
storage. •Optimizes microcontroller I/O usage and data
compression.
SIPO (Serial-In Parallel-Out) PIPO (Parallel-In Parallel-Out)
• Converts serial data into parallel for •Holds entire data words for temporary
processing. storage.
• Common in interfacing and driving •Enables fast parallel data transfer between
multiple LEDs. systems.
FIFO (First-In First-Out)
• Buffers data for speed mismatch resolution in communication systems (e.g., UART,
Ethernet).
• Ensures smooth data flow in pipelines or processors.
• Temporarily stores data between sender and receiver.
Bidirectional Shift Register
• Reversible data shifting for advanced operations.
• Useful in digital filters, signal routing, and bit manipulation.
• Transfers data between registers in multi-directional systems.