Subject:-MicroProcessors

Topic: Addressing Modes

Group No:- 3
Abhishek Kumar 18HCS4503 Submitted to:
Anish Vishwakarma 18HCS4504 DR. RAMPAL SIR
Jitender 18HCS4518
Mayank Harnotiya 18HCS4522
Rohit Singhal 18HCS5434
 Topics to be covered

• Data Addressing Modes :-

# Immediate Addressing Mode
# Register Addressing Mode
# Direct Addressing Mode
# Register Indirect Addressing Mode
# Base-Plus-Index Addressing Mode
# Register Relative Addressing Mode
# Base Relative Plus Index Addressing
Mode
# Scaled Index Addressing Mode

• Program Memory Addressing Modes :-

# Direct Program Memory Addressing
# Relative Program Memory
Addressing
# Indirect Program Memory
Addressing

• Stack Memory Addressing Modes

 ADDRESSING MODE

In a microprocessor, the machine needs to be told how

to get the operands to perform the operation.
The effective address is a term that describes the
address of an operand that is stored in memory. There
are several methods to designate the effective address of
those operands or get them directly from the register.
These methods are known as addressing modes.

And to perform the different operations,

microprocessor requires the following :-

1) The operator or opcode which determines what will

be done.
2) The operands which define the data to be used in the
operation
For example:-

MOV AX,BX

It is an instruction.
MOV :- Operator or Opcode.
AX,BX :- Operands
Source :- BX
Destination :- AX
8 bit register names :- AH,AL,BH,BL,CH,CL,DH,DL
16 bit register names:-
AX,BX,CX,DX,SP,BP,SI,DI,CS,DS,SS,ES
32 bit register names:-
EAX,EBX,ECX,EDX,ESP,EBP,ESI,EDI

It is important to note that it is not possible to carry out

an operation if the sizes of both the source and
destination does not match.
TYPES OF ADDRESSING MODES
# DATA ADDRESSING MODES

1. IMMEDIATE ADDRESSING MODE

The type of addressing mode in which the data operand is a part of

the instruction itself is called immediate addressing mode.

In this type of addressing mode the source data is present in the

instruction itself, and upon seeing MOV instruction it get copies to
the destination register.
Some of the examples are :-

MOV AL,44 8 bits

MOV BX,67H 16 bits
MOV CL,11011001B 8 bits
MOV EBX,43215678H 32 bits
MOV EAX,100B 32 bits
2. REGISTER ADDRESSING MODE

Register Addressing mode is a type of addressing mode in which the

data is stored in another register, which is then a part of the
instruction.

The main difference of this addressing mode with the previous one is
that, in this mode the main data which is to be copied to the
destination is not a part of the instruction itself.

Here also a copy of the data from the source is put into the
destination.
Some examples are:-

MOV AL,BL 8 bits

MOV CH,CL 8 bits
MOV AX,BX 16 bits
MOV SP,BP 16 bits
MOV SI,DI 16 bits
MOV ECX,EBX 32 bits
MOV ESP,EDX 32 bits
MOV ES,DS -- (Copy within segment registers)
MOV BL,DX -- (Different sizes)
MOV CS,AX -- (CS cannot be destination)
3. DIRECT ADDRESSING MODE

Direct addressing mode is a type of addressing mode in which the

effective address of memory location is written directly in to the
instruction itself

In this addressing mode, when the processor encounters the

instruction, it searches for the address in the memory and then takes
the data from that address and copies it to the destination
 Some assembler programs support the instruction of the pattern
MOV AL,[1234H], but many do not, they support MOV AL,DS:[1234H].
The latter type of addressing mode shows that the address is in the
data segment.

Here the effective address is calculated by the formula:-

EA= DS X 10H + Displacement

For the instruction MOV BL,DS:[1234H], the EA will be as:-

EA= 10000H X 10H + 1234H = 11234H

Hence the final instruction will be MOV AL,[11234H].

4. INDIRECT ADDRESSING MODE

Indirect Addressing Mode is a type of addressing mode in which

the microprocessor uses any of the two base registers BP,BX or
Index registers SI,DI to store the offset address.

In this addressing mode, when the processor encounters the

instruction, it gets the contents inside the source register, and
looks for that address in the memory, where it gets the actual
data to be copied into the destination register.
For example, if register BX contains 1000H and the MOV AX,[BX]
instruction executes, the word contents of data segment offset address
1000H are copied into register AX.

If the microprocessor is operated in the real mode and DS = 1000H ,

this instruction addresses a word stored at memory bytes 2000H and
2001H, and transfers it into register AX.

Effective Address (EA) = DS X 10H + BX

5. Base plus-Index Addressing
Base-plus-index addressing is similar to indirect addressing because it indirectly addresses memory data.
In the 8086 , this type of addressing uses one base register (BP or BX) and one index register (DI or SI) to indirectly
address memory. The base register often holds the beginning location of a memory array, whereas the index register
holds the relative position of an element in the array. Remember that whenever BP addresses memory data, both the
stack segment register and BP generate the effective address.

Locating Data with Base-Plus-Index Addressing:-

The following figure shows how data are addressed by the MOV DX,[ ] instruction when the microprocessor operates in
the real mode. In this example, , which translate into memory address 02010H. This instruction transfers a copy of the
word from location 02010H into the DX register.
Some examples of base plus addressing are:-

Locating Array Data Using Base-Plus-Index Addressing:-

A major use of the base-plus-index addressing mode is to address elements in a memory array. Suppose that the elements
in an array located in the data segment at memory location ARRAY must be accessed. To accomplish this, load the BX
register (base) with the beginning address of the array and the DI register (index) with the element number to be
accessed.
6. Register Relative Addressing
Register relative addressing is similar to base-plus-index addressing and displacement addressing. In register relative
addressing, the data in a segment of memory are addressed by adding the displacement to the contents of a base or an
index register (BP, BX, DI, or SI).

The given fig. shows the operation of the MOV AX,[ ] instruction. In this example ,BX=0100H ,DS=0200H and , so the
address generated is the sum of , BX, and the displacement of 1000H, which addresses location 03100H. Remember that
BX, DI, or SI addresses the data segment and BP addresses the stack segment.
The displacement is a number added to the register within the [ ].

Some examples of Register Relative Addressing are:

7. Base Relative-plus-Index Addressing
The base relative-plus-index addressing mode is similar to base-plus-index addressing, but it adds a displacement,
besides using a base register and an index register, to form the memory address. This type of addressing mode often
addresses a two- dimensional array of memory data.
Addressing Data with Base Relative-Plus-Index:-
Base relative-plus-index addressing is the least-used addressing mode. The figure shows how data are referenced if the

instruction executed by the microprocessor is MOV AX,[ ]. This addressing mode is too complex for frequent use in
programming.
Example base relative-plus-index instructions
8. Scaled Indexed Addressing
Scaled-index addressing is the last type of data-addressing mode discussed. This data-addressing mode is unique to the
80386 through the Core2 microprocessors. Scaled-index addressing uses two 32-bit registers (a base register and an

index register) to access the memory. The second register (index) is multiplied by a scaling factor. The scaling factor can
be . A scaling factor of is implied and need not be included in the assembly language instruction (MOV AL,[ ]). A scaling
factor of is used to address word-sized memory arrays, a scaling factor of is used with doubleword-sized memory arrays.
An example instruction is MOV AX,[ ]. This instruction uses a scaling factor of , which multiplies the contents of ECX by 2
before adding it to the EDI register to form the memory address. If ECX contains a 00000000H, word-sized memory
element 0 is addressed; if ECX contains a 00000001H, word-sized memory element 1 is accessed, and so forth. This scales
the index (ECX) by a factor of 2 for a word-sized memory array.
Scaling is also applied to instructions that use a single indirect register to access memory.

Examples of scaled-index addressing.

9. RIP Relative Addressing
This form of addressing uses the 64-bit instruction pointer register in the 64-bit mode to address a linear location in
the flat memory model. The inline assembler program available to Visual does not contain any way of using this
addressing mode or any other 64-bit addressing mode. The Microsoft Visual C++does not at present support developing

64-bit assembly code. The instruction pointer is normally addressed using a * as in , which is 34 bytes ahead in a
program.
When Microsoft finally places an inline assembler into Visual for the 64-bit mode, this most likely will be the way that
RIP relative addressing will appear.
 Data Structures :
A data structure is used to specify how information is stored in a memory array and can be quite useful with applications
that use arrays. It is best to think of a data structure as a template for data. The start of a structure is identified with the
STRUC assembly language directive and the end with the ENDS statement. A typical data structure is defined and used three
times in given example. Notice that the name of the structure appears with the STRUC and with ENDS statement. The example
shows the data structure as it was typed without the assembled version.
 The first is 32 bytes long and holds a name; the second is 32 bytes long and holds a street address; the third is 16 bytes
long for the city; the fourth is 2 bytes long for the state; the fifth is 5 bytes long for the ZIP code. Once the structure is
defined (INFO), it can be filled, as illustrated, with names and addresses. Three example uses for INFO are illustrated. Note
that literals are surrounded with apostrophes and the entire field is surrounded with < > symbols when the data structure
is used to define data.
When data are addressed in a structure, use the structure name and the field name to select a field from the structure. For
example, to address the STREET in NAME2, use the operand [Link], where the name of the structure is first
followed by a period and then by the name of the field. Likewise, use [Link] to refer to the city in structure NAME3.
# PROGRAM MEMORY-ADDRESSING MODES
Program memory-addressing modes, used with the JMP (jump) and CALL instructions, consist of three distinct forms:
direct, relative, and indirect.

1. DIRECT PROGRAM MEMORY ADDRESSING

Direct program memory addressing is what many early microprocessors used for all jumps and calls. Direct program
memory addressing is also used in high-level languages, such as the BASIC language GOTO and GOSUB instructions. The
microprocessor uses this form of addressing, but not as often as relative and indirect program memory addressing are
used.
The instructions for direct program memory addressing store the address with the opcode. For example, if a program
jumps to memory location 10000H for the next instruction, the address (10000H) is stored following the opcode in the
memory. Figure shows the direct intersegment JMP instruction and the 4 bytes required to store the address
10000H. This JMP instruction loads CS with 1000H and IP with 0000H to jump to memory location 10000H for the next
instruction. (Anintersegment jumpis a jump to any memory location within the entire memory system.) The direct
jump is often called a far jump because it can jump to any memory location for the next instruction. In the real mode, a
far jump accesses any location within the first 1M byte of memory by changing both CS and IP.
2. RELATIVE PROGRAM MEMORY ADDRESSING
Relative program memory addressing is not available in all early microprocessors, but it is available to this family of
microprocessors. The term relative means “relative to the instruction pointer (IP).” For example, if a JMP instruction
skips the next 2 bytes of memory, the address in relation to the instruction pointer is a 2 that adds to the instruction
pointer. This develops the address of the next program instruction. An example of the relative JMP instruction is shown

in Figure.

Relative JMP and CALL instructions contain either an 8-bit or a 16-bit signed displacement that allows a forward
memory reference or a reverse memory reference.
3. INDIRECT PROGRAM MEMORY ADDRESSING
The microprocessor allows several forms of program indirect memory addressing for the JMP and CALL instructions.
In the 80386 and above, an extended register can also be used to hold the address or indirect address of a relative
JMP or CALL. For example, the JMP EAX jumps to the location address by register EAX.
If a relative register holds the address, the jump is also considered to be an indirect jump. For example, JMP [BX] refers
to the memory location within the data segment at the offset address contained in BX. At this offset address is a l6-bit
number that is used as the offset address in the intrasegment jump. This type of jump is sometimes called an indirect-
indirect or double-indirect jump.
# STACK MEMORY-ADDRESSING MODES
The stack plays an important role in all microprocessors. It holds data temporarily and stores the return addresses
used by procedures. The stack memory is an LIFO (last-in, first-out) memory, which describes the way that data are
stored and removed from the stack. Data are placed onto the stack with a PUSH instructionand removed with a POP
instruction. The CALL instruction also uses the stack to hold the return address for procedures and a RET (return)
instruction to remove the return address from the stack.
The stack memory is maintained by two registers: the stack pointer (SP or ESP) and the stack segment register (SS).
Whenever a word of data is pushed onto the stack , the high-order 8 bits are placed in the location
addressed by SP – 1. The low-order 8 bits are placed in the location addressed by SP – 2. The SP is then decremented by
2 so that the next word of data is stored in the next available stack memory location. The SP/ESP register always points
to an area of memory located within the stack segment.
Whenever data are popped from the stack [see Figure 3–17(b)], the low-order 8 bits are removed from the location
addressed by SP. The high-order 8 bits are removed from the location addressed by . The SP register is then incremented
by 2.
Data may be pushed onto the stack from any 16-bit register or segment register; in the 80386 and above, from any 32-bit
extended register. Data may be popped off the stack into any register or any segment register except CS. The reason that data
may not be popped from the stack into CS is that this only changes part of the address of the next instruction. In the Pentium
4 or Core2 operated in 64-bit mode, the 64-bit registers can be pushed or popped from the stack, but they are 8 bytes in
length.
The PUSHA and POPA instructions either push or pop all of the registers, except segment registers, onto the stack. These
instructions are not available on the early 8086/8088 processors. The push immediate instruction is also new to the 80286
through the Core2 microprocessors.
Examples of PUSH n POP instructions
THANK YOU