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Memory Address Validation and Calculation

The document outlines two scenarios involving a process with specific base and limit registers for memory protection. In the first scenario, logical addresses are evaluated for validity and converted to physical addresses based on the given registers. The second scenario follows a similar process, assessing another set of logical addresses against a different set of registers to determine validity and calculate corresponding physical addresses.

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ronstephenmathew
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12 views2 pages

Memory Address Validation and Calculation

The document outlines two scenarios involving a process with specific base and limit registers for memory protection. In the first scenario, logical addresses are evaluated for validity and converted to physical addresses based on the given registers. The second scenario follows a similar process, assessing another set of logical addresses against a different set of registers to determine validity and calculate corresponding physical addresses.

Uploaded by

ronstephenmathew
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd

1.

A process is assigned the following configuration:


Base Register: 2000
Limit Register: 500
The process generates the following logical addresses: 300, 600, -50,
and 500.
Tasks:
Determine the validity of each logical address.
For each valid address, calculate the corresponding physical address.
2. A system has a base and limit register for memory protection:
Base Register: 1500
Limit Register: 800
A process attempts to access the following logical addresses: 100, 850,
0, and 700.
Tasks:
Identify which logical addresses are valid.
Calculate the physical addresses for each valid logical address.

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