Module II

Architecture of Embedded
System

By
Dr. Mitali Shewale
 Contents
• Hardware Architecture: 8051, Arm, Memory, Watchdog Timer, Chip Select,
I/O Devices, Debug Port, Communication Interfaces, Power Supply Unit
• Software Architecture: Services Provided By OS, Architecture Of
Embedded OS, Categories Of Embedded OS, Application Software,
Development And Testing Tools
Hardware Architecture
 8051
• The 8051 microcontroller was invented in 1980's by Intel
• Its foundation is based on Harvard architecture and this
microcontroller was developed principally for bringing it to be used
in Embedded Systems
• At first it was created by using NMOS technology but the use of
NMOS consumed more power to work therefore Intel re-launch the
microcontroller 8051 using CMOS technology and new edition
came up with edition of letter 'C' in the title name, therefore the
new modified version of microcontroller is called by name 80C51
where C in the name tells that it is based on CMOS technology
• It is referred to as a System on a Chip (SoC)
microcontroller because it is a chip circuit/integrated circuit that
holds many components of a computer together on a single chip.
These components include a CPU, memory, input-output ports(I/O
ports), timers, and secondary storage
• It is an 8-bit microcontroller
• It is built with 40 pins DIP (dual inline package), 4kb of ROM
storage and 128 bytes of RAM storage, 2 16-bit timers
• It consists of four parallel 8-bit ports, which are programmable
as well as addressable as per the requirement
• An on-chip crystal oscillator is integrated in the microcontroller
having crystal frequency of 11.0592 MHz
 PIN diagram of 8051
• 8051 microcontroller is a 40 pin dual inline
package (DIP)
• These 40 pins serve different functions
like read, write, I/O operations,
interrupts etc.
• 8051 has 4 I/O ports wherein each port
has 8 pins which can be configured as
input or output depending upon the
logic state of the pins
• Therefore 32 out of these 40 pins are
dedicated to I/O ports
• The rest of the pins are dedicated to
VCC, GND, XTAL1, XTAL2, RST, ALE,EA’
and PSEN’
• Pins 1 to 8 − These pins are known as Port 1. This
port doesn’t serve any other functions. It is
internally pulled up, bi-directional I/O port
• Pin 9 − It is a RESET pin, which is used to reset the
microcontroller to its initial values. It is an active
HIGH Pin i.e. if the RST pin is HIGH for a minimum of
two machine cycles, the microcontroller will be
reset
• Pins 10 to 17 − These pins are known as Port 3. This
port also acts as a bidirectional I/O port with
internal pull-ups. This port serves some special
functions like interrupts, timer input, control
signals, serial communication signals RxD and TxD,
etc. the following table gives the details of the
additional functions of port 3 pins
• Pins 18 & 19 − Pins 18 & 19 i.e XTAL2 and XTAL1 are the pins used for interfacing an
external crystal to get the system clock. Generally, a Quartz crystal oscillator is connected
here
• Pin 20 (GND) − This pin is the ground pin. It represents 0V and is connected to the negative
terminal (0V) of the power supply
• Pins 21 to 28 − These pins are known as Port 2. It serves as I/O port. Higher order address
bus signals are also multiplexed using this port
• Pin 29 − This is PSEN’ pin which stands for Program Store Enable. It is used to read a signal
from the external program memory
• Pin 30 − This is ALE/PROG’ pin which stands for Address Latch Enable. Using this pins,
external address can be separated from data
• Pin 31 − This is EA’/VPP pin which stands for External Access input. It is used to
enable/disable external memory interfacing. In 8051, EA is connected to VCC as it comes
with on-chip ROM to store programs. For other family members such as 8031 and 8032 in
which there is no on-chip ROM, the EA pin is connected to the GND
• Pins 32 to 39 − These pins are known as Port 0. It serves as I/O port. Lower order address
and data bus signals are multiplexed using this port.
• Pin 40 − This pin is used to provide power supply voltage i.e +5 Volts to the circuit
 8051 Block diagram
1. Oscillator and Timing
• Oscillator: This circuit provides the microcontroller with a
clock signal. All of the microcontroller’s actions are
synchronized by means of the clock signal
• Timing: In order to control the timing of activities within the
microcontroller and guarantee that each instruction is
performed at the appropriate moment, the timing circuit
collaborates with the oscillator
2. 4KB Program Memory
• Program Memory (ROM): The program code is kept in this
type of non-volatile memory. Typically, the on-chip ROM of an
8051 microcontroller is 4KB (4096 bytes)
3. 128 Byte RAM
• While the microcontroller is in operation, temporary data is
stored in Random Access Memory (RAM), a form of volatile
memory. The 8051 has 128 bytes of inbuilt RAM
4. Two 16-bit Timers
• Timer 0 and Timer 1 are the two 16-bit timers on the 8051.
These clocks may be used for counting events, monitoring
time intervals, and creating time delays, among other things
5. 64 Byte Bus Expansion Control
• The microcontroller may interact with external memory or peripherals thanks to bus
expansion control. It facilitates the extension of control signals for external devices and the
accessible memory area
6. Programmable I/O ports
• The four I/O ports (Ports 0 through 3) of the 8051 microcontroller may be configured to
carry out a range of input and output operations
7. Programmable Serial Port (UART)
• Serial communication is made possible via UART. It can send and receive data concurrently
while operating in full duplex mode
8. Synchronous Shifter
• Data is shifted in and out of the microcontroller in synchrony using a synchronous shifter. It
is frequently employed in communication protocols
9. CPU
• The microcontroller’s CPU is responsible for carrying out instructions read from program
memory. It controls the other parts, handles data flow inside the microcontroller, and
executes arithmetic and logic operations
Application of 8051 Microcontroller
• Medical Devices: Convenient medical devices such as blood glucose and blood
pressure monitors contain microcontrollers that display measurements
• Touch Screen: Many microcontroller vendors incorporate touch functionality into
their designs. Portable devices such as media players, and gaming devices
• Embedded Systems: The 8051 microcontroller is commonly used in embedded
systems, such as home automation systems, security systems, and industrial
control systems. Its low cost, small size, and ease of programming make it an
ideal choice for these applications
• Automotive Systems: The 8051 microcontroller is used in automotive systems,
such as engine control units, anti-lock braking systems, and airbag systems, to
control various functions and ensure safe and efficient operation
• Robotics: The 8051 microcontroller is used in robotics applications to control the
movement and operation of robots. It is commonly used to control the motors,
sensors, and other peripherals of the robot
Issues in 8051 Microcontroller
• Limited Memory: The 8051 microcontroller has limited program memory and data memory. The
program memory is typically 4 KB or 8 KB, and the data memory is typically 128 bytes or 256 bytes.
This limitation can be an issue when developing complex applications that require more memory.
• Limited Processing Power: The 8051 microcontroller has limited processing power compared to
modern microcontrollers. Its clock speed is typically between 12 MHz and 24 MHz, and its
instruction set is limited.
• Limited Peripheral Support: The 8051 microcontroller has limited support for peripherals
compared to modern microcontrollers. It has a limited number of input/output pins, and its
communication interfaces are limited.
• Limited Development Tools: The development tools for the 8051 microcontroller are limited
compared to modern microcontrollers. The available compilers, debuggers, and simulators are not
as advanced as those available for modern microcontrollers. This limitation can be an issue when
developing complex applications that require advanced development tools.
• Limited Security Features: The 8051 microcontroller has limited security features compared to
modern microcontrollers. It does not have hardware security features, such as memory protection
and encryption, which can be an issue in applications that require high security.
8051 Internal architecture
Central Processing Unit (CPU):
• The CPU of 8051 Architecture consists of eight-bit Arithmetic and Logic unit with associated
registers like A, B, PSW, SP, the sixteen bit program counter and “Data pointer” (DPTR)
registers
• ALU: Performs arithmetic and logical operations over the operands held by the temporary
registers TMP1 and TMP2
• Users cannot access temporary registers
• Control unit (CU): It is responsible for timing of the communication process between the CPU
and its peripherals
Accumulator:
• It is an 8-bit register
• It holds a source operand and receives the result of the arithmetic instructions (addition,
subtraction, multiplication, and division)
• The accumulator can be the source or destination for logical operations and a number of
special data movement instructions, including look-up tables and external RAM expansion
• Several functions apply exclusively to the accumulator : rotate, parity computation, testing
for zero, and so on
B register:
• 8 bit B register is available as a general purpose register when it is not being
used for the hardware multiple/divide operation
• This register is used to store one of the operands for multiply and divide
instructions
Ports in 8051 (P0, P1, P2, P3):
• Ports (0-3): There are 4 bidirectional I/O ports of 8 bits each
• P0 and P2 can be used as I/O ports or address lines for external memory
• P1 can be used as I/O ports
• P3 can be used as I/O ports and other alternate functions
Program Status Word:
• Many instructions implicitly or explicitly affect (or are affected by) several
status flags, which are grouped together to form the Program Status Word.
Fig. shows the bit pattern of the program status word. It is an 8-bit word,
containing the information as follows
• General purpose flag (F0): This is a user programmable flag; the user can
program and store any bit of their choice in this flag, using the bit address
• Parity bit (P):If the number of 1s in the accumulator is odd, the Parity bit is
set to ‘1’ (odd parity); If the number of 1s is even, the Parity bit is set to ‘0’
(even parity)
• Overflow flag (OV): This flag is set during ALU operations, to indicate
overflow in the result. It is set to 1 if there is a carry out of either the D7 bit
or the D6 bit of the accumulator
• Auxiliary carry flag (AC): This flag is set when there is a carry out of the D3
bit of the accumulator
• Carry flag (CY): This flag is used to indicate the carry generated after
arithmetic operations
• Register bank select bits (RS0 & RS1): These bits are user-programmable.
The register bank can be selected by using RS0 and RS1 bits
Stack and Stack pointer (SP)
• The stack refers to the an area in internal RAM to store and retrieve data
quickly
• The 8 bit SP register is used to hold internal RAM address that is on top of the
stack
• It is incremented before data is stored during PUSH instructions
• The stack array can reside anywhere in on-chip RAM. The stack pointer is
initialized to 07H after a reset. This causes the stack to begin at location 08H
Program counter (PC)
• It is a 16 bit register
• Its value shows the address of the next instruction to be executed
• It can access address from 0000 H to FFFF H
• When each instruction is being executed, the PC increments to point to the
address of next instruction
Data Pointer (DPTR)
• 16 bit register that has two 8 bit registers DPH that holds the high byte of
the DPTR and DPL that holds the low byte of the DPTR
• Used to access external data and code memory
• 8051 will access external memory at the address indicated by DPTR
• It's the only user accessible 16-bit register
• Can be used as temporary storage
Power Control Register
• It is an 8 bit register which is a Special function register (SFR)
• It has 2 functions: to control the data transfer rate (baud rate) and for power control capability

•The SMOD (Serial Mode or Serial Mode Control Bit) bit in the PCON Register is used to control the Baud Rate of the
Serial Port
•When SMOD is set to ‘1’, it doubles the baud rate of the serial communication by changing the way the Timer 1
overflow rate is interpreted
•When SMOD is set to ‘0’, the baud rate remains at its normal rate
•The 8051 has two power-saving modes:
 Idle Mode: In this mode, the CPU is halted while the timers, serial port, and interrupt system continue to operate
 Power-down Mode: In this mode, the entire microcontroller is shut down except for the external interrupt,
which can wake the system
• Serial control register (SCON)
• The SCON (Serial Control) is an SFR register located at
addresses 98h, and it is bit addressable
• It controls the operation of the serial port
• SCON configures the behaviour of the on-chip serial port, setting
up parameters such as the baud rate of the serial port, activating
send and/or receive data, and setting up some specific control
flags.
Serial data buffer (SBUF)
• The SBUF is an SFR register
• The serial port data buffer internally consists of two independent register
such as transmit buffer and receive buffer at the same location
• The transmit buffer is parallel in serial out register
• The serial data receive buffer is a serial in parallel out register
Timer Control Registers-TCON and TMOD
• TCON and TMOD are the special function registers in
the 8051 microcontroller. These are used to control the
timers and counters.
[Link] (Timer Control Register): The timers’ start
and stop are aided by this register. It additionally
indicates whether the timer is done counting.
[Link] (Timer Mode Register): The timers’ mode is
adjusted using this register. It selects whether the
timers will record events occurring or record time.
• TCON (Timer Control Register)
• The 8051 microcontroller has a unique function register
called the TCON. In order to provide precise output, timers
and counters are controlled by it. The data in the registers
may overflow if these timers and counters are not under
control. Thus, the TCON is utilized to control the timers and
counters. The structure in detail is displayed below.
• Structure of TCON
• The TCON register is an 8-bit register, where each bit has a
specific function:
• Here’s what each bit represents:
Bit Bit Name Description
7 TF1 (Timer 1 Overflow Flag) Set to 1 when Timer 1 overflows else 0

6
TR1 (Timer 1 Run Control Bit) Set to 1 to start Timer 1, and set to 0 to stop Timer 1

5
TF0 (Timer 0 Overflow Flag) Set to 1 when Timer 0 overflows else 0

4
TR0 (Timer 0 Run Control Bit) Set to 1 to start Timer 0, and set to 0 to stop Timer 0

3
IE1 (Interrupt 1 Edge Flag) Set to 1 when an external interrupt 1 occurs else 0

2
IT1 (Interrupt 1 Type Control Bit) Set to 1 to configure external interrupt 1 as edge-triggered, and set to 0 for level-
triggered

1
IE0 (Interrupt 0 Edge Flag) Set to 1 when an external interrupt 0 occurs else 0

0
IT0 (Interrupt 0 Type Control Bit) Set to 1 to configure external interrupt 0 as edge-triggered, and set to 0 for level-
triggered
• TMOD (Timer Mode Register)
• The TMOD (Timer Mode Register) is a special function register
in the 8051 microcontroller
• Timer 0 and Timer 1 are the modes of operation that it is
utilized to set
• Whether a timer or counter needs to be set, it is done so
using this register. The structure in detail is displayed below.
• Structure of TMOD Register
• The eight bits of the TMOD register are split into two sections:
Timer 0 is controlled by the lower four bits, and Timer 1 is
controlled by the upper four bits
• Here’s what each bit represents:

Bit Bit Name Description

7 or 3 Gate (0 or 1) Gate Control Bit

6 or 2 C/Tx Counter/Timer Select Bit

5 or 1 TxM1 Timer Select Bits for Mode1

4 or 0 TxM0 Timer Select Bits for Mode0

Let’s see each bit’s one by one,
[Link] (Gate Control Bit): When set to 1, the timer/counter is enabled only while the
INT pin is high and TR control bit is set. When cleared to 0, the timer is enabled
whenever the TR control bit is set
2.C/T (Counter/Timer Select Bit): When set to 1, the timer operates as a counter
(counts external events). When cleared to 0, it operates as a timer (measuring time)
3.M1 and M0 (Mode Select Bits):

M1 M0 Mode Description

0 0 Mode 0 13-bit Timer mode (8 Bit of THx and 5 Bit of TLx).

0 1 Mode 1 16-bit Timer mode.

8-bit Auto-reload mode (TLx reload with the THx

value each time when TLx overflows). This mode is commonly
1 0 Mode 2 used when you want the timer to repeatedly count to a certain
value and then automatically restart from a predefined value,
without requiring manual intervention

Split Timer mode – Split 16 bit timer into two 8 bit

1 1 Mode 3 timers(THx and TLx).
Control registers
• Special function registers IP, IE, TMOD, TCON, SCON, and PCON contain control
and status information for interrupts, timers/counters and serial port
Instruction Register
• This register decodes the opcode of an instruction to be executed and gives the
information to the timing and control unit to generate necessary signals for the
execution of an instruction
• 8051 clock and instruction cycle:
• In 8051, one instruction cycle consists of twelve clock cycles. Instruction cycles
is sometimes called as Machine cycle
• In 8051, each instruction cycle has 6 states (S1-S6)
• Timing and control unit
• This unit derives all the necessary timing and control signals required for
the internal operation of the circuit
• Oscillator
• This circuit generates the basic timing clock signal for the operation of
the circuit using crystal oscillator
• SFR register bank
• This is a set of special function register, which can be addressed using
their respective addresses which lie in the range of 80H to FFH
 ARM
• ARM was formed in 1990 as Advanced RISC Machines Ltd., a joint venture of
Apple Computer, Acorn Computer Group, and VLSI Technology
• ARM uses RISC architecture
[Link] Features Benefits to embedded system

1 High performance Ensures the system has a fast response

2 Low power consumption Makes the system more energy efficient

3 Low silicon area Reduces the size and also consumes less power

4 High Code density Helps embedded system to have less memory footprint

5 Load/store architecture Used to load data from the memory to the ARM CPU register or store data from
the CPU register to the memory; enables the memory access when required

6 Register bank with large Required to perform most of the operations within the CPU and provides faster
number of working registers context switch in a multitasking applications
 ARM Architecture
• It is a 32bit RISC microcontroller
• A brief introduction about each functional block of
the architecture of ARM7 (the basic architecture of
ARM series of cores) is introduced in the section
presented below
• ALU:
• The 32 bit ALU performs the arithmetic and logic
functions
• The ALU takes inputs from the registers, processes
them according to the instruction, and produces an
output that is either stored back in a register or used
to influence the flow of the program (e.g., by setting
flags that affect conditional instructions)
• Barrel Shifter:
• The barrel shifter is a hardware component used in ARM processors to
perform shift and rotate operations on data quickly
• It can shift a data word left or right by a specified number of bits in a single
clock cycle
• The shifter has different control inputs coming back from the instruction
register
• The Shift field within the instruction controls the operation of the barrel
shifter. This field indicates the kind of shift to be performed (logical left or
right, arithmetic right or rotate right)
• The shift type indicates the needed shift sort of 00, 01, 10, 11 are
corresponding to shift left, shift right, an arithmetic shift right and rotate
right, respectively
• The barrel shifter is especially created with multiplexers
• MAC (Multiply-Accumulate Unit):
• The MAC unit in an ARM processor is responsible for performing multiply-
accumulate operations, which are essential for many signal processing tasks
• In a MAC operation, the result of a multiplication is added to an
accumulator in a single instruction
• This operation is crucial for algorithms such as digital filtering and Fourier
transforms, where multiple multiplications and additions are performed in
sequence
• The presence of a MAC unit enhances the processor's ability to handle such
tasks efficiently
• Address Register:
• An address register holds memory addresses used by the processor to access data or
instructions stored in memory
• These registers are typically involved in operations like loading data from memory into the
processor or storing data from the processor back into memory
• The address register is essential for indexed addressing modes, where the address to be
accessed is computed using a base address plus an offset*

* (Explanation of Base Address Plus an Offset

• Base Address: This is a reference point in memory. It is usually stored in a register (often called a base register).
• Offset: This is a value (either a constant or stored in another register) that specifies how far the desired memory location is from the
base address. The offset can be positive or negative
• Eg: Assume a microprocessor has a base address stored in a register R1 and we want to access a specific element of an array stored
in memory. Each element of the array is 4 bytes long, and we want to access the third element
• R1 (base register): Contains the starting address of the array in memory, say ‘1000’
• Offset: We need to access the third element, which means we need to move 2 elements forward from the base address. Since each
element is 4 bytes, the offset will be 2*4 = 8 bytes
• The actual memory address accessed by the processor will be:
Effective Address=Base Address+Offset=1000+8=1008)
• Register Bank:
• The Register Bank has sixteen general purpose registers (R0-R15) and a current
program status register (CPSR) which are accessible by user applications
• In addition to that, it has twenty numbers of banked registers specifically used for
different operating modes of ARM core. These are invisible to user applications
• The register bank has two read ports to read operand1 and operand2 and one
write port to write back the result of operation to any register specified in the
instruction
• It has an additional bidirectional port to update the program counter with address
register and incrementer
• Address register content is incremented at every sequential byte access by the
incrementer but the program counter is incremented by 4 in ARM state of the
core or is incremented by 2 in Thumb state of the core at every instruction access
• Address register is directly connected to the address bus
• Instruction Decode and Control:
• The instruction decode and control unit in an ARM processor is
responsible for interpreting the machine code instructions fetched from
memory
• Once an instruction is decoded, the control unit generates the
appropriate control signals that guide the other parts of the processor
(like the ALU, register bank, and memory interface) to execute the
instruction
• This unit ensures that each instruction is executed correctly and in the
right sequence, controlling the flow of the program
• The encoded instruction byte of the program saved in the code memory is fetched
through the data bus and first enters into the data-in register of the ARM architecture
from where it is delivered to the instruction decoder. After the instruction is decoded,
appropriate control signals are generated for the data path. The required registers are
activated in the register bank and the operands flow out from two read ports of register
bank to the ALU: operand1 through A-bus and operand2 through B-bus after
preprocessing at barrel shifter. The result of operation at ALU is written back to the result
register through a write port at register bank. For Load/Store instructions, after decoding
the instruction, the data memory address is first calculated at ALU as specified in the
instruction and the pointer register is updated at the register bank. The address in the
pointer register is given to the address register to access the memory and transfer data. If
it is a load multiple or store multiple instruction, the core does not halt before completing
the required number of data transfers unless it is a reset exception
 ARM nomenclature
• ARM processor implementation is described by the product nomenclature as given below
ARM [x][y][z][T][D][M][I][E][J][F]-[S]

The letters or words after “ARM” are used to indicate the features of a processor.
• x – Family or series
• y – Memory Management/Protection Unit
• z – Cache
• T – 16 bit Thumb decoder
• D – JTAG Debugger
• M – Fast Multiplier
• I – Embedded In-circuit Emulator (ICE) Macrocell
• E – Enhanced Instructions for DSP (assumes TDMI)
• J – Jazelle (for accelerated JAVA execution)
• F – Vector Floating-point Unit
• S – Synthesizable Version
• Explanation of the features

• T – Thumb Instruction Set

• ARM Processors support both the 32-bit ARM Instruction Set and 16-bit Thumb Instruction Set
• The original 32-bit ARM Instructions consists of 32-bit opcodes which turns out to be a 4-byte
binary pattern
• 16-bit Thumb Instructions consists of 16-bit opcodes or 2-byte binary pattern to improve the
code density
• D – JTAG Debug
• JTAG is a serial protocol used by ARM to transfer the debug information between the processor
and the test equipment
• M – Fast Multiplier
• Older ARM Processors used a small and simple multiplier unit. This multiplier unit required
more clock cycles to complete a single multiplication
• With the introduction of Fast Multiplier unit, the clock cycles required for multiplication are
significantly reduced and modern ARM Processors are capable of calculating a 32-bit product in
a single cycle
• I – Embedded ICE Macrocell
• ARM Processors have on-chip debug hardware that allows the processor to set
breakpoints and watchpoints
(Breakpoints and watchpoints are features of debuggers that allow you to pause the execution of your code at specific locations or
conditions. Breakpoints are set on lines of code, and watchpoints are set on variables or expressions)

• E – Enhanced Instructions
• ARM Processors with this mode will support the extended DSP Instruction Set for
high performance DSP applications
• With these extended DSP instructions, the DSP performance of the ARM
Processors can be increased without high clock frequencies.
• J – Jazelle
• ARM Processors with Jazelle Technology can be used in accelerated execution of
Java bytecodes
• This helps in high performance Java execution without affecting memory or battery
• F – Vector Floating-point Unit
• The Floating Point Architecture in ARM Processors provide execution of floating point arithmetic
operations
• The Dynamic Range and Precision offered by the Floating Point Architecture in ARM Processors
are used in many real time applications in the industrial and automotive areas

• S – Synthesizable
• The ARM Processor Core is available as source code
• This software core can be compiled into a format that can be easily understood by the EDA Tools
• Using the processor source code, it is possible to modify the architecture of the ARM Processor

• Example: ARM7TDMI
(ARM 7 series + 16 bit Thumb + JTAG Debug + fast Multiplier + enhanced ICE)
 ARM and THUMB mode
Parameters ARM State Thumb state

Current Program Status T=0 T=1

Register (CPSR) T bit

Instruction size 32 bits 16 bits

Number of core 68 30
instructions available

Conditional execution Most of the instructions are supporting Only branch instructions can support Conditional
Conditional execution execution

CPSR Accessibility Full access No direct access to user

Register usage 15 General purpose registers + PC 8 General purpose registers + high registers (r8-
r15) + PC

System use Full use of system Partial use of system

Applications High profile applications Low profile applications

Memory requirement More memory required as size of Less memory required as size of instructions is
instructions is 32 bits 16 bits
• Advantages of ARM Processor
• ARM processors deal with a single processor at a time, which makes it faster and it
also consumes lesser power
• ARM processors also work well in the case of a multiprogramming system
• ARM processors are cheaper than other processors, which makes them usable in
mobile phones
• ARM processors are scalable, and this feature helps it in using a variety of devices

• Disadvantages of ARM Processor

• ARM processors are not capable of very high performance, which limits them to a
variety of applications
• ARM processor execution is a little hard, which requires skilled programmers to use
it
• ARM processor is inefficient in handling Scheduling instructions
 Memory- Types
A] ROM
1] ROM: Its uses, forms and variants
• ROM non-volatility is a most important asset and it is extremely useful to
embed codes and data in a system
• ROM can be understood as a semiconductor memory
designed to hold data permanently or do not change
frequently
• ROM that embeds the software or an application logic circuit is in one of
the three forms: masked ROM, PROM, and EPROM
• When ROM is to be programmed during runtime and it is to hold the
processed result, either an EEPROM or flash memory is used
i] Masked ROM
• The very first ROMs were hard-wired (A computer or electronic device that is
hardwired is built to work in a particular way and you cannot change the way it
performs with new software) devices that contained a pre-programmed set
of data or instructions
• These kind of ROMs are known as masked ROMs, which are inexpensive
• It is a type of ROM that is programmed during the
manufacturing process
• The data is permanently stored on the chip and cannot be
modified or erased
• It is mainly used in applications where the data is fixed and
does not need to be changed, such as in gaming consoles
and CD/DVD players.
ii] EPROM, EEPROM, and OTP ROM
• EPROM is an ultraviolet ray erasable and device programmer programmable read only memory. It can be
erased and reprogrammed
• EPROM has a window on top of the chip that allows UV light to penetrate and erase the data stored in it.
Once erased, the chip can be reprogrammed with new data. It is used in applications where the data needs
to be changed occasionally, such as in development environments
• EEPROM is an electrically erasable and programmable read only memory
• EEPROM can be erased and reprogrammed about ten thousand times. Both erasing and programming take
about 4 to 10 ms (millisecond). In EEPROM, any location can be selectively erased and programmed.
EEPROMs can be erased one byte at a time, rather than erasing the entire chip. Hence, the process of
reprogramming is flexible but slow
• While the memory contents for a ROM are set at design/manufacturing time,
Programmable Read Only memories (PROM) and more recently One-Time
Programmable (OTP) devices can be programmed after manufacturing making them a
lot more flexible. Once programmed, or blown, the contents cannot be changed and
the contents are retained after power is removed.
• The term “blown” is a historical term related to the programming mechanism of
PROMs. Contents were written by using a high voltage to burn out interconnection
fuses. These PROMs were blown on special devices called PROM Programmers
2] Flash memory
• Flash memory is a form of EEPROM in which a sector of bytes can be erased in a
flash (very short duration corresponding to a single clock cycle)
• A sector can be from 256 B to 16 kB
• The advantage over EEPROM is that the erasing of many bytes simultaneously saves
times in each erase cycle that precedes the write cycles
• The disadvantage is that once a sector is erased, each byte writes into it again one by
one, and that takes too long time
• A new version is a boot back flash. A sector is reserved to store once only at the
time of first boot.
• Later on it is protected from any further erase. In other words, it has an OTP sector
3] PROM
• PROM is a programmable read-only memory. It is a type of
non-volatile computer memory. This means that once data
has been written to PROM, it cannot be erased
• PROM is used to store programs or firmware for
microcontrollers and other digital devices.
B] RAM
• It is the internal memory in the computer’s CPU which stores
different types of data and information as per the requirement
• Moreover, we can also call it the main memory, primary memory,
or read/write memory
• RAM stores all the data that the CPU requires during the execution of
a program
• Moreover, it is a volatile memory i.e. it loses data as soon as the
power is cut off
• Besides, as per its name, the data access is in a random manner
• This means that we can access any random location in the memory
without even knowing the address of the previous location
• Since RAM is a volatile memory hence, a backup is present in most of
the systems in the form of an uninterrupted power supply (UPS)
• Moreover, the speed and performance of a system are directly
proportional to the size of RAM
• Types of RAM
i] SRAM
• The word static denotes that the data stays in the memory but only till the
power supply is ON
• For each memory cell, static random-access memory requires many
transistors, generally four to six and no capacitors
• It is most commonly used for designing caches
• SRAM preserves data in memory if power is available, in contrast to dynamic
RAM DRAM, which must be frequently updated
• As a result, SRAM is quicker but costlier, rendering DRAM the more common
kind of memory in computers.
ii]DRAM
• DRAM is often utilized as the primary memory in computers
• DRAM stores the binary information in the form of electric charges applied to
capacitors
• A data byte is retained in every DRAM memory cell’s capacitor, consisting of
transistors and a capacitor in an integrated circuit
• Since transistors constantly leak a tiny amount, capacitors will gradually
deplete, resulting in the loss of data contained in them
• The stored information on the capacitors tends to lose over a period of time
and thus the capacitors must be periodically recharged to retain their usage
• To maintain data, DRAM must be updated every few milliseconds
Types of DRAM: There are mainly 5 types of DRAM.
1] Asynchronous DRAM (ADRAM)
• The timing of the memory device is controlled asynchronously
• A specialized memory controller circuit generates the necessary control signals to control the timing
• The CPU must take into account the delay in the response of the memory.
2] Synchronous DRAM (SDRAM)
• These RAM chips’ access speed is directly synchronized with the CPU’s clock
• For this, the memory chips remain ready for operation when the CPU expects them to be ready
• These memories operate at the CPU-memory bus without imposing wait states
3] Double-Data-Rate SDRAM (DDR SDRAM)
• This faster version of SDRAM performs its operations on both edges of the clock signal; whereas a
standard SDRAM performs its operations on the rising edge of the clock signal
• Since they transfer data on both edges of the clock, the data transfer rate is doubled
• To access the data at a high rate, the memory cells are organized into two groups
• Each group is accessed separately
4] Rambus DRAM (RDRAM)
• The RDRAM provides a very high data transfer rate over a narrow CPU-
memory bus
• It uses various speedup mechanisms, like synchronous memory
interface, caching inside the DRAM chips and very fast signal timing
• The Rambus data bus width is 8 or 9 bits
5] Cache DRAM (CDRAM)
• This memory is a special type of DRAM memory with an on-chip cache
memory (SRAM) that acts as a high-speed buffer for the main DRAM
 Watchdog Timer

• In desktop windows system, if we feel our application is behaving in an abnormal way or if

the system hangs up, we have the “Ctrl+Alt+Del” to come out of the situation
• What if it happens to our embedded system? Do we really have a “Ctrl+Alt+Del” to take
control of this situation? Of course not
• But we have a watchdog timer to monitor the firmware execution and reset the system
processor/ microcontroller when the program execution hangs up
• A watchdog timer, or simply a watchdog, is a hardware timer for monitoring the firmware
execution
• Watchdog timer is a timing device that can be set for a preset time interval, and an event
must occur during that interval else the device will generate the timeout signal
• For example, we anticipate that a set of tasks must finish within 100ms. The watchdog
timer disables and stops in case the tasks finish within 100ms
• The watchdog timer generates interrupts after 100 ms and executes a routine that runs
because the tasks failed to finish in the anticipated interval
• Eg: In mobile phone the display is turned off in case no GUI interaction takes place within a
• Figure illustrates the implementation of a watchdog timer for firmware execution
supervision

• Depending on the internal implementation, the watchdog timer increments or decrements a

free running counter with each clock pulse and generates a reset signal to reset the
processor if the count reaches zero for a down counting watchdog, or the highest count
value for an upcounting watchdog
• Most of the processors implement watchdog as a built-in component and provides status
register to control the watchdog timer (like enabling and disabling watchdog functionality)
and watchdog timer register for writing the count value
• If the processor/controller doesn’t contain a built in watchdog timer, the
same can be implemented using an external watchdog timer IC circuit
• The external watchdog timer uses hardware logic for enabling/disabling,
resetting the watchdog count, etc instead of the firmware based ‘writing’ to
the status and watchdog timer register
• The microprocessor supervisor IC DS1232 integrates a hardware watchdog
timer in it
• In modern systems running on embedded operation systems, the watchdog
can be implemented in such a way that when a watchdog timeout occurs,
an interrupt is generated instead of resetting the processor
 Chip Select (CS)
• The CS signal is crucial for interfacing with external devices like memory, ADCs, or
other peripherals
• The CS signal is used to enable a specific chip in a system with multiple devices
connected to the microcontroller, ensuring that only one device communicates with
the microcontroller at a time
• The CS signal enables or disables a specific device. When CS is active (typically low),
the corresponding device is selected and can communicate with the
microcontroller. When CS is inactive, the device is disabled and does not interfere
with other devices on the bus
• In the 8051 microcontroller, CS is generally managed through the use of general-
purpose I/O pins or external address decoding logic. The microcontroller sends the
appropriate CS signal to select the desired device for communication
• For memory-mapped devices, the 8051 may use address decoding to generate CS
signals. The microcontroller's address lines are compared with predefined address
ranges, and when a match occurs, the corresponding CS signal is activated
Working Principle of Chip Select
• Enabling Devices: The CS signal enables the selected device by allowing
it to respond to the microcontroller’s read/write operations. Without the
CS signal, a device remains inactive, and any signals sent by the
microcontroller are ignored by that device.
• Bus Arbitration: In systems with shared data buses, the CS signal helps
prevent bus contention. Only the device with an active CS signal can
drive the bus, ensuring smooth and error-free data transfer.
• Address Decoding: The 8051 microcontroller may use external address
decoding logic to generate Chip Select signals. When the microcontroller
places an address on its address bus, the decoder interprets the address
and activates the appropriate CS line for the corresponding device.
Timing Considerations
• Proper Timing: The timing of the CS signal is critical. It must be asserted* (set
to active) before any communication with the device begins and must remain
active for the duration of the data transfer. If the CS signal is de-asserted too
early, the device may stop responding or could cause incomplete data transfers.
• Setup and Hold Time: The CS signal should meet the setup and hold time
requirements of the connected device. The microcontroller must ensure that
the CS signal is stable before starting the read/write operation, and it should
remain active for a sufficient period after the operation is complete

*{To assert a signal means to bring it to its activated state. For example,
asserting a HALT signal (active high) would mean to pull it to a logic high level
(usually VCC ) and asserting a RESET signal (active low) would mean to pull it to a
logic low level (usually GND )}
Active Low Signal
• Logic Level: Most CS signals are active low, meaning they are active when the
signal is at a low voltage level (0V). This is often denoted as . When the CS
line is pulled low, the corresponding device is selected, while a high level (logic
1) disables the device.
• Inverted Logic: Some systems may use active-high CS signals, but this is less
common. In such cases, the logic of the CS signal is inverted, and the device is
selected when the CS line is high
Multi-Device Systems
• Multiple Chip Select Lines: In systems with multiple peripherals, each
device typically has its own unique CS line. The 8051 microcontroller can
manage multiple CS lines through its GPIO pins or via external decoders,
ensuring that only one device is selected at a time.
• Shared Buses: When multiple devices share the same data and address
buses, the CS signal is crucial in controlling which device is allowed to
communicate with the microcontroller. By carefully managing the CS
lines, the microcontroller can ensure that data is correctly routed to the
intended device
 Debug Port
• Although the original 8051 did not include a dedicated debug port in the
way that modern microcontrollers do, various methods and tools have been
developed over time to facilitate debugging of 8051-based systems
• Developers have used several techniques and external tools to achieve
similar functionality, enabling them to test, debug, and program the
microcontroller during development
Common Debugging Methods for 8051 Microcontroller
1] In-Circuit Emulators (ICE)
• ICE are the primary tools historically used for debugging 8051
microcontrollers. An ICE replaces the actual microcontroller in the circuit,
allowing full control over the system's operation. The ICE provides the ability
to set breakpoints, step through code, and monitor the state of registers and
memory
• ICE tools mimic the behavior of the 8051, providing developers with detailed
insights into the microcontroller’s operations. They allow for real-time
debugging by halting execution, inspecting variables, and modifying memory
contents
• Although powerful, ICE tools can be expensive and cumbersome to use. They
require replacing the microcontroller with an emulator, which may not be
practical in all development environments.
2] Monitor Programs
• Monitor programs are special firmware loaded into the 8051 that allow the
microcontroller to communicate with a host computer over a serial or
parallel port. These programs provide basic debugging capabilities, such as
memory inspection, register access, and stepping through code.
• A monitor program resides in the microcontroller's memory and interacts
with the development environment on the PC. Developers can use
commands to control the microcontroller, set breakpoints, and examine the
internal state.
• Monitor programs are particularly useful in development environments
where full-featured debugging tools like ICE are not available. They offer a
low-cost alternative for basic debugging tasks.
• The functionality of monitor programs is limited compared to modern
debugging tools. They often require the microcontroller to run in a special
mode, which may not reflect the actual operational conditions of the
application
3] On-Chip Debugging (OCD) in Modern Derivatives
• While the original 8051 microcontroller lacked on-chip debugging capabilities,
many modern derivatives of the 8051 architecture include built-in debugging
features. These chips often provide an on-chip debug interface (OCD) that allows
for real-time debugging without the need for external emulators.
• Modern 8051 variants may include features like breakpoints, watchpoints, single-
step execution, and direct memory access (DMA) for debugging purposes. These
features are accessed through dedicated debugging ports, often implemented as
JTAG or similar interfaces.
• On-chip debugging is used in modern 8051 microcontroller derivatives for
sophisticated debugging, enabling developers to interact with the microcontroller
in real-time, set complex breakpoints, and monitor peripheral activity.
• Debugging tools compatible with these modern 8051 variants include
development kits and IDEs that support the specific debugging protocol of the
microcontroller
• Physical Interfaces and Connectivity
• Debug Headers: In systems where external debugging tools are used,
specific headers or connectors may be included on the PCB to facilitate
connection to debugging equipment like ICE or serial cables. These
headers provide access to the necessary signals, such as reset, power,
ground, and communication lines.
• Probes and Debuggers: External probes or debugging tools interface
with these headers, allowing developers to control and monitor the
8051 microcontroller. These tools are often specific to the debugging
method being used, such as an ICE or serial debugger.
Software Tools and Debugging Environment
• Integrated Development Environments (IDEs): IDEs like Keil µVision or SDCC
(Small Device C Compiler) are commonly used for 8051 development. These
environments support code writing, compilation, and debugging, often
integrating with external tools like ICE or simulators.
• Simulators: Before hardware is available, developers often use simulators to
debug 8051 code. Simulators replicate the behavior of the 8051
microcontroller on a PC, allowing developers to test and debug their code in a
virtual environment.
• Custom Debugging Code: Developers may also write custom code to aid in
debugging, such as routines that output variable values to the serial port or
LEDs to indicate the microcontroller’s state. This approach is particularly
useful when access to sophisticated debugging tools is limited.
Applications of Debug Ports in 8051-Based Systems
• Embedded System Development: Debugging is a critical part of embedded
system development with the 8051 microcontroller. It allows developers to
verify that the system behaves as expected, identify and fix bugs, and optimize
performance.
• Production Testing: Debug ports and debugging methods are used in
production environments to test and validate 8051-based systems before they
are deployed. This ensures that each unit operates correctly and meets quality
standards.
• Educational Purposes: The 8051 microcontroller is widely used in educational
settings, where debugging tools and techniques help students learn about
microcontroller programming, system design, and troubleshooting
 Communication Interfaces
• The 8051 microcontroller supports various communication interfaces
• These interfaces allow the microcontroller to interact with external devices,
such as sensors, other microcontrollers, memory devices, and human-
machine interfaces (HMIs)
• Communication interfaces in the 8051 microcontroller can be broadly
classified into two categories: serial communication and parallel
communication
• Each type of communication is used in different scenarios depending on the
requirements of the system
A] Serial Communication Interfaces
• Serial communication involves transmitting data one bit at a time over a
single data line
• This method is efficient for long-distance communication and is widely used
in embedded systems
• The 8051 microcontroller supports several serial communication interfaces
as follows:
1] Universal Asynchronous Receiver/Transmitter (UART)
• The UART interface in the 8051 microcontroller is one of the most commonly used
serial communication protocols. It allows the microcontroller to communicate with
other devices, such as PCs, other microcontrollers, or UART-compatible
peripherals, over a serial link.
• The built-in UART operates in full-duplex mode, meaning it can transmit and
receive data simultaneously. The baud rate, which determines the speed of
communication, is programmable, allowing for flexibility in communication speed.
• The UART interface in the 8051 microcontroller is accessed through the SCON
(Serial Control) register, which configures the mode of operation, and the SBUF
(Serial Buffer) register, which holds the data to be transmitted or received. The
microcontroller's Timer 1 is typically used to generate the baud rate.
• UART is used for serial communication between the 8051 microcontroller and a PC
(for debugging or user input/output), between two microcontrollers, or with other
serial peripherals such as GPS modules, GSM modems, and Bluetooth devices.
2] Serial Peripheral Interface (SPI)
• Although the original 8051 microcontroller does not have built-in SPI
hardware, SPI communication can be implemented using software or in
modern variants that include SPI hardware modules.
• SPI is a synchronous serial communication protocol that uses separate lines
for data (MISO and MOSI), a clock signal (SCLK), and a chip select signal (SS).
It supports full-duplex communication, making it faster than asynchronous
protocols like UART.
• In an SPI interface, one device acts as the master, controlling the clock and
chip select lines, while other devices act as slaves. Data is exchanged
simultaneously between the master and the selected slave device.
• SPI is commonly used in systems requiring fast data transfer, such as
communication with ADCs, DACs, flash memory, and sensors
3] Inter-Integrated Circuit (I2C)
• Like SPI, the original 8051 microcontroller does not have built-in I2C
hardware, but I2C communication can be implemented using software or
supported by modern derivatives.
• I2C is a synchronous, multi-master, multi-slave communication protocol that
uses two lines: SDA (Serial Data) and SCL (Serial Clock). It supports
addressing, allowing multiple devices to share the same bus.
• In an I2C network, the master device generates the clock signal and initiates
communication with a specific slave device by sending its address. Data is
transferred between the master and the selected slave.
• I2C is widely used in systems where multiple devices need to communicate
over the same bus, such as sensors, EEPROMs, and real-time clocks
B] Parallel Communication Interfaces
• Parallel communication involves transmitting multiple bits simultaneously over
multiple data lines. This method is faster than serial communication for short
distances and is used in applications requiring high data throughput.
1] General Purpose Input/Output (GPIO)
• The 8051 microcontroller has a number of GPIO pins that can be configured as input
or output pins. These pins are used for simple parallel communication with other
devices
• Each port on the 8051 microcontroller (P0, P1, P2, P3) can be configured for different
functions, including parallel communication. The microcontroller can read from or
write to these ports simultaneously, allowing for parallel data transfer
• Data can be sent to or received from external devices by writing to or reading from
the port registers (P0, P1, P2, P3). The direction of data flow (input or output) is
determined by the way the pins are configured
• GPIO-based parallel communication is used for interfacing with external peripherals
like LCD displays, keypads, LEDs, or any other device that requires multiple data lines.
2] External Memory Interface
• The 8051 microcontroller supports interfacing with external memory devices
through a parallel bus, allowing it to address and access external RAM or ROM.
• The 8051 microcontroller has 16 address lines (A0-A15) and 8 data lines (D0-
D7) that can be used to connect to external memory devices. The ALE (Address
Latch Enable), PSEN (Program Store Enable), and RD/WR (Read/Write) control
signals manage data transfer between the microcontroller and the memory.
• When accessing external memory, the lower 8 bits of the address are first
latched using the ALE signal. The microcontroller then uses the PSEN or
RD/WR signals to read from or write to the memory device.
• The external memory interface is used in systems that require more memory
than the 8051’s internal RAM or ROM can provide. This is common in
applications with large datasets or extensive program code.
Integrated Communication Interfaces in Modern 8051 Derivatives
• Modern derivatives of the 8051 microcontroller have integrated communication
peripherals that extend the functionality of the original 8051. These may include:
• CAN (Controller Area Network) Interface: Used in automotive and industrial
applications, the CAN interface allows the microcontroller to communicate over a
robust, multi-master bus designed for high-speed and reliable data transmission
in noisy environments.
• USB (Universal Serial Bus) Interface: Some modern 8051 microcontroller variants
include a USB interface, enabling communication with PCs and other USB devices.
This is useful for data exchange, device configuration, and firmware updates.
• Ethernet Interface: Ethernet-enabled 8051 microcontroller derivatives support
networking capabilities, allowing the microcontroller to connect to local area
networks (LANs) for data communication in applications like industrial
automation and IoT
Programming and Software Support
• Serial Communication Libraries: Many development environments for the
8051, such as Keil µVision, provide libraries and drivers for serial
communication protocols like UART, SPI, and I2C. These libraries simplify the
process of setting up and managing communication between the
microcontroller and external devices.
• Embedded C Code: Developers often write custom code to manage
communication interfaces, particularly for protocols not natively supported
by the 8051. For instance, bit-banging techniques can be used to implement
SPI or I2C communication in software.
• Interrupts and Polling: Communication interfaces often use interrupts to
handle data transfer events. For example, the UART can trigger an interrupt
when data is received, allowing the microcontroller to process the data
without constantly polling the communication lines.
Applications of Communication Interfaces in 8051-Based Systems
• Data Logging: The UART interface can be used to transmit data from sensors
or other inputs to a PC or storage device for logging and analysis.
• Peripheral Control: SPI and I2C interfaces are commonly used to connect
the 8051 to peripherals like displays, memory devices, and sensors, enabling
it to control or monitor these devices.
• Networked Systems: Modern 8051 derivatives with Ethernet or CAN
interfaces are used in networked applications, such as IoT devices,
automotive systems, and industrial automation, where multiple
microcontrollers or devices need to communicate over a network.
 Power Supply Unit (PSU)
• The PSU is a crucial component in any microcontroller-based system, including those built
around the 8051 microcontroller
• The PSU provides the necessary voltage and current to power the microcontroller and its
peripheral components
• Understanding the power requirements and how to properly design or select a power
supply for the 8051 is essential for ensuring reliable operation.
1. Power Requirements of the 8051 Microcontroller
• The 8051 microcontroller has specific power requirements that must be met to ensure
proper operation:
• Operating Voltage: The standard 8051 microcontroller operates at a voltage range of 4.0 to
5.5V, with 5V being the typical operating voltage. Some modern variants of the 8051 may
operate at lower voltages, such as 3.3V, to accommodate power-sensitive applications.
• Current Consumption: The current drawn by the 8051 microcontroller depends on several
factors, including the clock frequency, the activity of internal peripherals, and the load on
the GPIO pins. Typically, the current consumption ranges from a few milliamps to tens of
milliamps.
2. Design Considerations for the Power Supply Unit: When designing or selecting a PSU for the 8051 microcontroller,
several factors need to be considered:
• Voltage Regulation
• Importance: The PSU must provide a stable output voltage within the specified range for the 8051
microcontroller. Voltage fluctuations can cause unreliable operation, including resets, data corruption, or even
damage to the microcontroller.
• Voltage Regulators: Linear voltage regulators (such as the 7805 for 5V systems) or low-dropout (LDO) regulators
are commonly used to ensure a stable supply voltage. Switching regulators can be used for higher efficiency,
especially in battery-powered applications.
• Current Capacity
• Overview: The PSU must supply enough current to meet the needs of the 8051 microcontroller and any
connected peripherals, such as sensors, displays, or communication modules.
• Calculation: The total current requirement is the sum of the current drawn by the microcontroller and all other
components in the system. It's important to select or design a PSU that provides a current rating higher than
this total to ensure reliable operation.
• Noise and Filtering
• Importance: Electrical noise on the power supply lines can interfere with the operation of the 8051
microcontroller, particularly in sensitive analog circuits or high-frequency digital circuits.
• Filtering Techniques: To minimize noise, decoupling capacitors (typically 0.1µF ceramic capacitors) are placed
close to the power pins of the microcontroller. These capacitors help filter out high-frequency noise.
Additionally, larger bulk capacitors (e.g., 10µF or 100µF electrolytic capacitors) may be used to smooth out
voltage fluctuations.
• Power Supply Sequencing
• Overview: In systems with multiple voltage rails (e.g., 3.3V and 5V), the order in
which these voltages are applied can be important to prevent damage to the
microcontroller and other components.
• Implementation: Power supply sequencing circuits or power management ICs can
be used to ensure that the correct voltage is applied in the correct order.
• Battery Operation
• Considerations: For battery-powered systems, the PSU design must account for
battery characteristics, including voltage range, capacity, and discharge rate.
Efficient power management is crucial to maximize battery life.
• Regulation: In battery-powered designs, switching regulators are often preferred for
their high efficiency compared to linear regulators. LDO regulators may still be used
for specific low-current circuits where noise is a concern.
3. Types of Power Supply Units for 8051-Based Systems
• Linear Power Supplies
• Overview: Linear power supplies use linear voltage regulators to step down the input voltage to the required output voltage.
They are simple to design and provide a clean, low-noise output, making them ideal for noise-sensitive applications.
• Drawbacks: Linear regulators are less efficient, especially when the difference between input and output voltage is large, as the
excess energy is dissipated as heat.
• Switching Power Supplies
• Overview: Switching power supplies, including buck, boost, and buck-boost converters, use high-frequency switching techniques
to convert the input voltage to the desired output voltage with higher efficiency.
• Advantages: These supplies are more efficient than linear regulators, making them ideal for battery-powered applications where
energy efficiency is critical.
• Considerations: Switching power supplies generate more electrical noise due to the high-frequency switching, so proper filtering
and layout techniques are important to minimize interference.
• USB-Powered Systems
• Overview: In modern embedded systems, the 8051 microcontroller can be powered directly from a USB port, which provides a
regulated 5V supply.
• Considerations: USB-powered systems must consider the current limitations of the USB standard (typically 500mA for USB 2.0 or
900mA for USB 3.0). The PSU design should ensure that the total current consumption of the system does not exceed this limit.
• Battery Power
• Overview: Battery-powered systems use batteries as the primary power source, often combined with a voltage regulator to
maintain a stable output voltage.
• Types of Batteries: Common battery options include alkaline, lithium-ion, and nickel-metal hydride (NiMH) batteries, each with
its own voltage and capacity characteristics.
• Power Management: Efficient power management techniques, such as sleep modes and power gating, are essential to extend
battery life in portable 8051-based devices.
Power Supply Protection Mechanisms
• Overvoltage Protection (OVP)
• Purpose: To protect the 8051 microcontroller from damage due to excessive input
voltage, overvoltage protection circuits can be implemented using zener diodes, TVS
diodes, or crowbar circuits.
• Implementation: These components clamp the voltage to a safe level or disconnect the
power supply in case of an overvoltage event.
• Overcurrent Protection (OCP)
• Purpose: Overcurrent protection prevents excessive current from flowing through the
microcontroller, which could cause overheating or damage.
• Implementation: Fuses, PTC (Positive Temperature Coefficient) resettable fuses, or
current-limiting circuits can be used to protect against overcurrent conditions.
• Reverse Polarity Protection
• Purpose: Reverse polarity protection prevents damage if the power supply is connected
with reversed polarity.
• Implementation: A simple diode in series with the power supply input can block current
in the event of reverse polarity. Alternatively, MOSFET-based circuits can provide more
efficient reverse polarity protection.