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8085 Microprocessor Instruction Set Guide

The document outlines the instruction set of the 8085 microprocessor, categorizing instructions into groups such as data movement, modification, control, and arithmetic operations. It details various operations associated with each instruction group, including data transfer, arithmetic and logical operations, and branching conditions. Additionally, it provides a coding scheme for registers and operations, illustrating how instructions are structured and executed within the microprocessor framework.

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3 views8 pages

8085 Microprocessor Instruction Set Guide

The document outlines the instruction set of the 8085 microprocessor, categorizing instructions into groups such as data movement, modification, control, and arithmetic operations. It details various operations associated with each instruction group, including data transfer, arithmetic and logical operations, and branching conditions. Additionally, it provides a coding scheme for registers and operations, illustrating how instructions are structured and executed within the microprocessor framework.

Uploaded by

nadarujeevan
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd

8085 Microprocessor Instruction Set

INSTRUCTION SET

MOVEMENT MODIFICATION CONTROL


INSTRUCTIONS INSTRUCTIONS INSTRUCTIONS

GROUP-0 GROUP – 1 GROUP – 2 GROUP – 3B I/O &


DATA DATA ARITHMETIC GROUP -3A MACHINE
TRANSFER TRANSFER & LOGIC BRANCH CONTROL

MVI,INR,DCR,LDA, JNZ,JNC,JC, HLT,ENABLE,


AND,ADD,
STA,RAR,CMC, JZ etc., DISABLE,
CMA,STC,DAA, MOV OR,XOR
PROGRAM INTR
etc.,
DAD,LDAX,SHLD, CONTROL PROCESS
INX,RIM ETC., CONTROL
8085 Microprocessor Instruction Set
BYTE ORGANIZATION
GROUP - 0
0 0 R R R I0 I0 I0

GROUP - 1

0 1 R R R S S S

GROUP - 2

1 0 A1 A1 A1 S S S

GROUP - 3

1 1 Cb Cb Cb B0 B0 B0
MP & MC APPLICATIONS
Lecture 4 – 8085 Microprocessor Instruction Set
Code For Receiving And Sending Registers/Pairs
ADDRESS ADDRESS
REGISTERS REGISTERS
CODE CODE
B 000
B–C 00
C 001
D 010
D–E 01
E 011
H 100
H–L 10
L 101
M 110
SP 11
A 111
MP & MC APPLICATIONS
Lecture 4 – 8085 Microprocessor Instruction Set
Information Operations (I0 I0 I0)
ADDRESS OPERATION
I0 I0 I0
0 0 0 NOT USED
0 0 1 IMMEDIATE OPERATION REGISTER PAIR
0 1 0 LOAD / STORE
0 1 1 INCREMENT/ DECREMENT REGISTER PAIR
1 0 0 INCREMENT SINGLE REGISTER
1 0 1 DECREMENT SINGLE REGISTER

IMMEDIATE OPERATION ON SINGLE


1 1 0
REGISTER
1 1 1 REGISTER SHIFTING
MP & MC APPLICATIONS
Lecture 4 – 8085 Microprocessor Instruction Set
Arithmetic And Logical Operations (A1 A1 A1)
ADDRESS
OPERATION
A1 A1 A1
0 0 0 ADD
0 0 1 ADD WITH CARRY (ADC)
0 1 0 SUBTRACT (SUB)
0 1 1 SUBTRACT WITH BORROW (SBB)
1 0 0 LOGICAL AND
1 0 1 EXCLUSIVE OR (X-OR)
1 1 0 LOGICAL OR (OR)
1 1 1 COMPARE
MP & MC APPLICATIONS
Lecture 4 – 8085 Microprocessor Instruction Set
Conditions Of Branch ( Cb Cb Cb)
ADDRESS
OPERATION
Cb Cb Cb
0 0 0 IF NOT ZERO (JNZ)
0 0 1 IF ZERO (JZ)
0 1 0 IF NO CARRY(JNC)
0 1 1 IF CARRY (JC)
1 0 0 IF ODD PARITY (JPO)
1 0 1 IF EVEN PARITY (JPE)
1 1 0 WAS IT POSITIVE (JP)
1 1 1 WAS IT NEGATIVE (JM)
Mr. Dickson Nkongo, MSc.: SJUCET – EECE Dept. MP & MC APPLICATIONS
Lecture 4 – 8085 Microprocessor Instruction Set
Branch Operations (BO BO BO)
ADDRESS
OPERATION
BO BO BO
0 0 0 CONDITIONAL RETURN
0 0 1 SIMPLE RETURN
0 1 0 CONDITIONAL JUMP
0 1 1 UNCONDITIONAL JUMP
1 0 0 CONDITIONAL CALL
1 0 1 SIMPLE CALL
1 1 0 SPECIAL A/L OPERATIONS
1 1 1 SPECIAL UNCONDITIONAL JUMPS
MP & MC APPLICATIONS
Lecture 4 – 8085 Microprocessor Instruction Set
Mr. Dickson Nkongo, MSc.: SJUCET – CE De

MVI B, BYTE
0 0 R R R I0 I0 I0
0 0 0 0 0 1 1 0
MOV B,C
0 1 R R R S S S

0 1 0 0 0 0 0 1

ADD B
1 0 A1 A1 A1 S S S
1 0 0 0 0 0 0 0

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