Assembly Programming
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The Microprocessor
Microprocessor is an electronic circuit that functions as the central processing
nit (CPU) of a computer, providing computational control.
controls memory and I/O through a series of connections called buses.
he buses select an I/O or memory device, transfer data between the I/O
evice or memory and the MP control the I/O and memory system.
Memory and I/O are controlled through instructions that are stored in the memory
and executed by the MP.
Microprocessor is a device, which is capable of
Receiving Input
Performing Computations
Storing data and instructions
Display the results
Controlling all the devices that perform the above 4 functions.
can be also defined as a programmable device that takes in numbers,
erforms on them arithmetic or logical operations according to the progra
tored in memory and then produces other numbers as a result.
nternally, the microprocessor is made up of 3 main units.
The Arithmetic/Logic Unit (ALU)
The Control Unit.
An array of registers for holding data while it is being manipulated.
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System Bus: Wires connecting memory & I/O to microprocessor
Address Bus: Unidirectional, Identifying peripheral or memory location
Data Bus: Bidirectional, Transferring data
Control Bus: Has Synchronization signals, Timing signals, and Control signals
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A bus is a common group of wires that interconnect components in a
computer system. They transfer address, data or control information
between the MP and its memory and I/O systems.
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ALU:
In addition to the arithmetic & logic circuits, the ALU includes the accumulator, which is
part of every arithmetic & logic operation.
Also, the ALU includes a temporary register used for holding data temporarily during
the execution of the operation.
This temporary register is not accessible by the programmer
Control unit:
is circuitry that directs operations within a computer's processor.
It lets the computer's logic unit, memory, as well as both input and output devices know
how to respond to instructions received from a program.
A control unit works by receiving input information that it converts into control signals,
which are then sent to the central processor.
The computer's processor then tells the attached hardware what operations carry out.
The functions a control unit performs depend on the type of CPU, due to the variance
of architecture between different manufacturers.
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Addressing Modes
Most assembly language instructions require operands to be processed.
An operand address provides the location, where the data to be
processed is stored.
Some instructions do not require an operand, whereas some other
instructions may require one, two or three operands.
When an instruction requires two operands, the first operand is
generally the destination, which contains data in a register or memory
location and the second operand is the source.
Source contains either the data to be delivered (immediate addressing)
or the address (in register or memory) of the data.
Generally, the source data remains unaltered after the operation.
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A computer instruction is often divided into two parts
An opcode (Operation Code) that specifies the operation for that
instruction
An address that specifies the registers and/or locations in
memory to use for that operation
In the Basic Computer, since the memory contains
4096 (= 212) words, we needs 12 bit to specify which
memory address this instruction will use
In the Basic Computer, bit 15 of the instruction
specifies the addressing mode (0: direct addressing, 1:
indirect addressing)
Since the memory words, and hence the instructions,
are 16 bits long, that leaves 3 bits for the instruction’s
opcode
Instruction Format
15 14 12 11 0
I Opcode Address
Addressing
mode
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Instruction codes
The address field of an instruction can represent either
Direct address: the address in memory of the data to use (the address of the
operand), or
Indirect address: the address in memory of the address in memory of the data
to use
Direct addressing Indirect addressing
22 0 ADD 457 35 1 ADD 300
300 1350
457 Operand
1350 Operand
+ +
AC AC
Effective Address (EA)
The address, that can be directly used without modification to access an
operand for a computation-type instruction, or as the target address for a
branch-type instruction
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Instruction codes
A processor has many registers to hold instructions,
addresses, data, etc
Registers?
The processor has a register, the Program Counter (PC) that
holds the memory address of the next instruction
Since the memory in the Basic Computer only has 4096 locations, the PC
only needs 12 bits
In a direct or indirect addressing, the processor needs to keep
track of what locations in memory it is addressing: The
Address Register (AR) is used for this
The AR is a 12 bit register in the Basic Computer
When an operand is found, using either direct or indirect
addressing, it is placed in the Data Register (DR). The
processor then uses this value as data for its operation
The Basic Computer has a single general purpose register –
the Accumulator (AC)
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Instruction codes
The significance of a general purpose register is that it can be
used for loading operands and storing results
e.g. load AC with the contents of a specific memory location; store the
contents of AC into a specified memory location
Often a processor will need a scratch register to store
intermediate results or other temporary data; in the Basic
Computer this is the Temporary Register (TR)
The Basic Computer uses a very simple model of input/output
(I/O) operations
Input devices are considered to send 8 bits of character data to the processor
The processor can send 8 bits of character data to output devices
The Input Register (INPR) holds an 8 bit character gotten from
an input device
The Output Register (OUTR) holds an 8 bit character to be send
to an output device
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Registers
Registers in the Basic Computer
11 0
PC
Memory
11 0
4096 x 16
AR
15 0
IR CPU
15 0 15 0
TR DR
7 0 7 0 15 0
OUTR INPR AC
List of Registers
DR 16 Data Register Holds memory operand
AR 12 Address Register Holds address for memory
AC 16 Accumulator Processor register
IR 16 Instruction Register Holds instruction code
PC 12 Program Counter Holds address of instruction
TR 16 Temporary Register Holds temporary data
INPR 8 Input Register Holds input character
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The different ways in which a source operand is denoted in
an instruction is known as addressing modes.
The three basic modes of addressing in 8086 programming :
Register addressing
Immediate addressing
Memory addressing
Register Addressing
In this addressing mode, a register contains the operand.
Depending upon the instruction, the register may be the first operand, the second operand or
both
For example,
MOV DX, TAX_RATE ; Register in first operand
MOV COUNT, CX ; Register in second operand
MOV EAX, EBX ; Both the operands are in registers
As processing data between registers does not involve memory, it provides fastest
processing of data.
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ImmediateAddressing
An immediate operand has a constant value or an expression.
When an instruction with two operands uses immediate addressing, the
first operand may be a register or memory location, and the second
operand is an immediate constant. The first operand defines the length of
the data.
For example:
BYTE_VALUE DB 150 ;Abyte value is defined
WORD_VALUE DW 300 ;Aword value is defined
ADD BYTE_VALUE, 65 ;An immediate operand 65 is added
MOV AX, 45H ; Immediate constant 45H is transferred toAX
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Addressing Modes
Memory Addressing
When operands are specified in memory addressing mode, direct access to main
memory, usually to the data segment, is required.
To locate the exact location of data in memory, we need the segment start address,
which is typically found in the DS register and an offset value.
This offset value is also called effective address.
In direct addressing mode, the offset value is specified directly as part of the instruction,
usually indicated by the variable name.
The assembler calculates the offset value and maintains a symbol table, which stores
the offset values of all the variables used in the program.
In direct memory addressing, one of the operands refers to a memory location and the
other operand references a register.
For example,
ADD BYTE_VALUE, DL ; Adds the register in the memory location
MOV BX, WORD_VALUE ; Operand from the memory is added to register
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The 8086/8088 contains eight general-purpose registers, four segment
registers, an instruction pointer register and a flag register.
The following figure shows the register map of the 8086/8088.
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8086 CPU has 8 general purpose registers;
AX - the accumulator register (divided into AH / AL).
BX - the base address register (divided into BH / BL).
CX - the count register (divided into CH / CL).
DX - the data register (divided into DH / DL).
SI - source index register
DI - destination index register
BP - base pointer
SP - stack pointer.
Four general purpose registers (AX, BX, CX, DX) are made of two separate 8 bit
registers, for example if AX= 0011000000111001, then AH=00110000 and
AL=00111001. Therefore, when you modify any of the 8 bit registers 16 bit register is
also updated, and vice-versa. The same is for other three registers, "H" is for high and
"L" is for low part.
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CS (Code Segment)
Points at the segment containing the current program
DS (Data Segment)
Generally points at segment where variables are defined.
SS (Stack Segment)
Points at the segment containing the stack
ES (Extra Segment)
Extra segment register, it's up to a coder to define its usage.
IP - the instruction pointer
register always works together with CS segment register and it points to currently executing
instruction.
Flags Register - determines the current state of the processor.
is modified automatically by CPU after mathematical operations, this allows to determine the type
of the result, and to determine conditions to transfer control to other parts of the program.
Generally you cannot access these registers directly
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AX - the accumulator register input/output operations a, ax, eax, rax.
BX - the base address register Holds address of data b, bx, ebx, rbx..
CX - the count register counts used in loop cx, ecx, rcx
DX - the data register holds data for output d, dx, edx, rdx.
SI - source index register points the source operand
DI - destination index register points the destination operand
BP - base pointer base of the top of the stack
SP - stack pointer points current top of stack.
CS (Code Segment) holds address of code segment
DS (Data Segment) holds address of data segment
SS (Stack Segment) holds address of stack segment
ES (Extra Segment) holds address of data segment
IP (instruction pointer)holds the next instruction
Flag registers holds current status of the program
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X=extended to 16 bits, E=extended to 32 bits, R=rich register to 64 bits
o Data Movement Instructions
o The fundamental data movement operation is MOV dest, source, which copies a byte or a
word from the source location to the destination.
o In general, either the source or the destination must be a register (you can't copy directly
from one memory location to another with MOV);
o The only exception is that an immediate value may be moved straight to memory (however,
there is no way to put an immediate value into a segment register in one operation).
o Instructions to transfer data
o MOV: Used to copy the byte or word from the provided source to the
provided destination.
Mov ah,2 service routine 1=input a character with echo
2=output/print a single character ‘a’
8=input a character with out echo
9=print a collection of characters ‘abcd’
4ch=exit
o PUSH: Used to put a word at the top of the stack.
o POP: Used to get a word from the top of the stack to the provided
location.
o PUSHA: Used to put all the registers into the stack.
o POPA: Used to get words from the stack to all registers.
o XCHG: Used to exchange the data from two locations.
o XLAT: Used to translate a byte in AL using a table in the memory.
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The INC Instruction
The INC instruction is used for incrementing an operand by one.
It works on a single operand that can be either in a register or in memory.
Syntax:
INC destination
The operand destination could be an 8-bit, 16-bit or 32-bit operand.
Example:
INC EBX ; Increments 32-bit register
INC DL ; Increments 8-bit register
INC [count] ; Increments the count variable
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The DEC Instruction
The DEC instruction is used for decrementing an operand by
one.
It works on a sing le operand that can be either in a register or
in memory.
Syntax:
DEC destination
The operand destination could be an 8-bit, 16-bit or 32-bit
operand.
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The ADD and SUB Instructions
The ADD and SUB instructions are used for performing simple addition/subtraction of binary
data in byte, word and double-word size, i.e., for adding or subtracting 8-bit, 16-bit or 32-bit
operands, respectively.
Syntax:
ADD/SUB destination, source
The ADD/SUB instruction can take place between:
Register to register
Memory to register
Register to memory
Register to constant data
Memory to constant data
However, like other instructions, memory-to-memory operations are not possible using
ADD/SUB
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The MUL/IMUL Instruction
There are two instructions for multiplying binary data. The
MUL (Multiply) instruction handles unsigned data and the
IMUL (Integer Multiply) handles signed data.
Syntax:
MUL/IMUL multiplier
Multiplicand in both cases will be in an accumulator,
depending upon the size of the multiplicand and the multiplier
and the generated product is also stored in two registers
depending upon the size of the operands.
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The DIV/IDIV Instructions
The division operation generates two elements a quotient and a
remainder.
In case of multiplication, overflow does not occur because double-
length registers are used to keep the product. However, in case of
division, overflow may occur. The processor generates an interrupt
if overflow occurs.
The DIV (Divide) instruction is used on unsigned data and the IDIV
(Integer Divide) is used on signed data.
Syntax:
DIV/IDIV divisor
The dividend is in an accumulator. Both the instructions can
work with 8-bit, 16-bit or 32-bit operands.
The operation affects all six status flags.
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O devices such as keyboards and displays establish
ommunication of computer with outside world.
evices can be interfaced in two ways
I/O mapped I/O and
Memory mapped I/O.
n I/O mapped I/O, device is identified with a unique
evice number and data are transferred thru IN/O
nstruction.
emory mapped I/O each device is identified with 16 bit address.
O devices are considered to be a part of memory and memory
lated instruction is used for data transfer.
n I/O interface must be able to
Determine whether or not it is being interfaced
Determine whether it has to send data to CPU or receive data from
CPU
Send ready signal informing CPU that transfer is over
Send interrupt Requests to CPU and receive interrupt 29
acknowledgement and send an interrupt type. [2011]
An Interface can be divided into two parts.
interface
A part that interfaces to the I/O device and
A part that interfaces to the system bus.
There must be drivers and receivers to maintain
signal quality,
logic for translating the interface control signals to proper handshakin
signals,
logic for decoding address that appear on the bus.
Handshaking signals are used to determine in which direction
ransfer has to take place whether from CPU or to CPU.
It should determine whether it is a READ or WRITE operation.
Interrupt signals also must be handled here.
Address decoder determine whether it is I/O mapped I/O or
Memory mapped I/O from one of the bits. If the decoder finds that
an interface is referenced it sends signal to the appropriate device
nterfaces can be categorized according to the way I/O devices
ransfer data either in serial or parallel form.
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Memory I/O devices are mapped into the system memory
map along with RAM and ROM.
o access a hardware device, simply read or write
o those 'special' addresses using the norm
memory access instructions.
he advantage to this method is that ever
nstruction which can access memory can be used
o manipulate an I/O device.
he disadvantage to this method is that the enti
ddress bus must be fully decoded for every
device.
For example, a machine with a 32-bit address bus would
require logic gates to resolve the state of all 32 addres
lines to properly decode the specific address of any
device. This increases the cost of adding hardware to the
machine.
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I/O devices are mapped into a separate
address space. This is usually
accomplished by having a different set of
signal lines to indicate a memory access
versus a port access.
The advantage to this system is that less
logic is needed to decode a discrete
address and therefore less cost to add
hardware devices to a machine.
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