DIRECT MEMORY ACCESS (DMA)
DIRECT MEMORY ACCESS (DMA)
Direct memory access is a feature of computer
systems that allows certain hardware subsystems
to access main system memory (Random-access
memory), independent of the central processing
unit (CPU).
WHAT IS DMA AND WHY IT IS USED?
Direct Memory Access (DMA) transfers the block of data
between the memory and peripheral devices of the system,
without the participation of the processor.
Direct memory access (DMA) is a mode of data transfer
between the memory and I/O devices. This happens without
the involvement of the processor.
WHAT IS DMA CONTROLLER?
The unit that controls the activity of accessing memory
directly is called a DMA controller.
The DMA controller can be a separate unit that is shared
by various I/O devices, or it can also be a part of the I/O
device interface.
THE DMA CONTROLLER TRANSFERS
THE DATA IN THREE MODES:
1. Burst Mode: Here, once the DMA controller gains the charge
of the system bus, then it releases the system bus only after
completion of data transfer. Till then the CPU has to wait for
the system buses.
2. Cycle Stealing Mode: In this mode, the DMA controller
forces the CPU to stop its operation and relinquish the control
over the bus for a short term to DMA controller. After the
transfer of every byte, the DMA controller releases the bus
and then again requests for the system bus. In this way, the DMA
controller steals the clock cycle for transferring every byte.
3. Transparent Mode: Here, the DMA controller takes the
charge of system bus only if the processor does not require
the system bus.
DMA CONTROLLER AND ITS WORKING
DMA controller is a hardware unit that allows I/O devices to
access memory directly without the participation of the
processor. Here, we will discuss the working of the DMA
controller. Below we have the diagram of DMA controller that
explains its working:
DMA CONTROLLER AND ITS WORKING
(CONT.)
DMA CONTROLLER AND ITS WORKING
(CONT.)
1. Whenever an I/O device wants to transfer the data to or from
memory, it sends the DMA request (DRQ) to the DMA controller. DMA
controller accepts this DRQ and asks the CPU to hold for a few clock
cycles by sending it the Hold request (HLD).
2. CPU receives the Hold request (HLD) from DMA controller and
relinquishes the bus and sends the Hold acknowledgement (HLDA)
to DMA controller.
3. After receiving the Hold acknowledgement (HLDA), DMA controller
acknowledges I/O device (DACK) that the data transfer can be
performed and DMA controller takes the charge of the system bus
and transfers the data to or from memory.
4. When the data transfer is accomplished, the DMA raise an interrupt
to let know the processor that the task of data transfer is finished
and the processor can take control over the bus again and start
processing where it has left.
DIRECT MEMORY ACCESS DIAGRAM
After exploring the working of DMA controller, let us discuss the block diagram
of the DMA controller. Below we have a block diagram of DMA controller.
DIRECT MEMORY ACCESS DIAGRAM
(CONT.)
Whenever a processor is requested to read or write a block of data, i.e. transfer a
block of data, it instructs the DMA controller by sending the following information.
1. The first information is whether the data has to be read from memory or the
data has to be written to the memory. It passes this information via read or
write control lines that is between the processor and DMA controllers control
logic unit.
2. The processor also provides the starting address of/ for the data block in the
memory, from where the data block in memory has to be read or where the data
block has to be written in memory. DMA controller stores this in its address
register. It is also called the starting address register.
3. The processor also sends the word count, i.e. how many words are to be read
or written. It stores this information in the data count or the word count
register.
4. The most important is the address of I/O device that wants to read or write
data. This information is stored in the data register.
DIRECT MEMORY ACCESS ADVANTAGES AND DISADVANTAGES
Advantages:
Transferring the data without the involvement of the processor will
speed up the read-write task.
DMA reduces the clock cycle requires to read or write a block of
data.
Implementing DMA also reduces the overhead of the processor.
Disadvantages:
As it is a hardware unit, it would cost to implement a DMA controller
in the system.
Cache coherence problem can occur while using DMA controller.