Chapter 11
Internal memory
Outline
• Semiconductor main memory
– Dynamic Random Access Memory (DRAM)
– Static RAM (SRAM)
– Read Only memory (ROM)
• Error Correction
Semiconductor main memory
• The basic element of a semiconductor
memory is the memory cell
• Memory cell properties:
– exhibit two stable (or semistable) states, which
can be used to represent binary 1 and 0.
– capable of being written into (at least once), to set
the state.
– capable of being read to sense the state.
Memory Cell Operation
Semiconductor Memory Types
Random-access memory (RAM)
• Word is directly accessed through wired-in addressing
logic
• Can read data from the memory and to write new
data into the memory easily and rapidly.
• Reading and writing are accomplished through the
use of electrical signals.
• Volatile - must be provided with a constant power
supply.
– If the power is interrupted, then the data are lost.
• Can be used only as temporary storage.
Dynamic RAM (DRAM)
• Made with cells that store data as charge on
capacitors.
• The presence or absence of charge in a capacitor is
interpreted as a binary 1 or 0
• Because capacitors have a natural tendency to
discharge, dynamic RAMs require periodic charge
refreshing to maintain data storage
• The term dynamic refers to this tendency of the
stored charge to leak away, even with power
continuously applied.
Dynamic RAM Structure
DRAM Operation
• Address line active when bit read or written
– Transistor switch closed (current flows)
• Write
– Voltage to bit line
• High for 1 low for 0
– Then signal address line
• Transfers charge to capacitor
• Read
– Address line selected
• transistor turns on
– Charge from capacitor fed via bit line to sense amplifier
• Compares with reference value to determine 0 or 1
– Capacitor charge must be restored
Static RAM (SRAM)
• Digital device that uses the same logic
elements used in the processor
• Binary values are stored using traditional flip-
flop logic-gate configurations
• Hold its data as long as power is supplied to it
Stating RAM Structure
Static RAM Operation
• Transistor arrangement gives stable logic state
• State 1
– C1 high, C2 low
– T1 T4 off, T2 T3 on
• State 0
– C2 high, C1 low
– T2 T3 off, T1 T4 on
• Address line transistors T5 T6 is switch
• Write – apply value to B & compliment to B
• Read – value is on line B
SRAM v DRAM
• Both volatile
– Power needed to preserve data
• Dynamic cell
– Simpler to build, smaller
– More dense
– Less expensive
– Needs refresh
– Use for main memory
• Static
– Faster
– Use for cache memory
ROM (1)
• Read-only memory
• Contain a permanent pattern of data that
cannot be changed
• Nonvolatile - no power source is required to
maintain the bit values in memory
• Can read, cannot write
ROM (2)
• Advantage – program is permanently in main
memory no need to load from secondary
storage.
• Applications
– Microprogramming
– Library subroutines for frequently wanted
functions
– System programs
– Function tables
ROM (3)
• Created like any other integrated circuit chip,
– data wired into the chip as part of the fabrication
process
• Drawbacks:
– Data insertion step includes a relatively large fixed
cost, whether one or thousands of copies of a
particular ROM are fabricated.
– No room for error. If one bit is wrong, the whole
batch of ROMs must be thrown out
Types of ROM (1)
• Written during manufacture
– Very expensive for small runs
• Programmable (once)
– PROM
– Suitable when only a small number of ROMs with a
particular memory content is needed
– Less expensive alternative
– Writing process is performed electrically
• by a supplier or customer at after the original chip fabrication
– Require special equipment for writing or “programming”
process
– Flexible and convenience
Types of ROM (2)
• Read “mostly” memory
• For applications in which read operations are frequent
than write operations and nonvolatile storage is
required
– Erasable Programmable (EPROM)
• Erased by UV
– Electrically Erasable (EEPROM)
• Takes much longer to write than read
– Flash memory
• Erase whole memory electrically
Error Correction (1)
• A semiconductor memory system is subject to
errors
– Hard Failure
• Permanent physical defect
• Memory cell or cells affected cannot reliably store data
but become stuck at 0 or 1 or switch erratically
between 0 and 1
– Soft Error
• A random nondestructive event that alters the contents
of memory cells without damaging the memory.
• Can be caused by power supply problems or alpha
particles
Error Correction (2)
• Both hard and soft errors are clearly
undesirable
• Most modern main memory systems include
logic for both detecting and correcting errors.
– Hamming error correcting code
Error-Correcting Code Function