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Dr.
Faculty: Dr. Bhat Geetalaxmi Jairam
Professor, ISE, NIE, Mysuru
Digital Design
s s or - Introduction
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Digital Logic x mi
t ala
Gee
h at
r.•B Is concerned with the interconnection among digital
D
components and modules.
• Term used to denote the design and analysis of
digital systems.
• Ex: Digital computer
s s or
• Why do we study fe
ro digital logic design?
, P
r a m
Jai
i
axm t al
• Digital
Ge e circuits handle digital signals
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D Digital electronics is a branch of electronics
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which deals with digital systems and signals
• In order to understand the concept of digital
system working, it is important to study
fundamentals of Digital Logic
s s or
• Logic gate / Gate: Pro fe
m,
A digital circuit i a
rhaving one or more input signals but only
iJ a
one outputa m
x signal is called a gate.
al
e et
• at G
hLogic gates are the fundamental building blocks of digital
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Dr.
system.
• By connecting the different gates in different ways, we can
build circuits that perform arithmetic and other functions
associated with the human brain (ALU).
• The most basic gates are:
NOT gate (Inverter)
OR gate
AND gate
s s or
fe ro
• Gates are often P
, called Logic circuits.
r a m
ai
miJ
l a x
• Operation
e eta of a logic gates can be easily
at G
Bhunderstood by the help of “Truth Table”.
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• A truth table lists all possible combinations of
inputs and corresponding output.
• Hardware description languages(HDL) are an
alternative way of describing logic circuits.
• This uses a set of textual codes that is
machine(Computer) readable.
r
TheroBasic
fe s s o Gates
• The three logicram ,P
circuits, the inverter, the OR gate and
i
i Ja can be used to produce any digital
the ANDxmgate,
system t ala
Gee
at Inverter (NOT Gate)
•BhThe
Dr. - The inverter performs the Boolean NOT operation.
When the input is LOW, the output is HIGH; when the
input is HIGH, the output is LOW.
- The NOT operation (complement) is shown with an
overbar. Thus, the Boolean expression for an inverter is
Vo = Vi
s s or
• The figure shows ro fe the pinout diagram of a
, P
7404 hex irainverter. The IC contains six
m
i Ja
inverter. a x m You can connect any or all
e t al
inverters
t Ge to other TTL devices.
Bha
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OR Gates s s or
ro fe
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• An OR gateJahas a m
r i two or more input signals but only
mi
one output al a x signal.
e et
G called an OR gate because the output voltage is
• hItat is
r. B
D high if any or all of the input voltages are high.
• For instance, the output of a 2-input OR gate is high if
either or both inputs are high.
• In Boolean equation form Y = A OR B i.e. Y = A + B
Logic symbol Truth Table
s s or
Three Inputs OR gate: ro fe
m,P
• The inputs are i r aA, B, and C. When all inputs are low, Y
i Ja
is [Link] A
x m or B or C is high, Y will be high.
l
e e
• hTheG
at truth table summarizes all input possibilities.
r. B
D • In equation form, the three input OR gate is
represented as: Y = A+B+C.
s s or
ro fe
, P
r a m
J ai
mi
a x
e t al
Ge
h at
B
Dr.
s s or
fe ro
Write the truth , P
table for the below given logic
r a m
J ai
a x mi circuit.
e t al
Ge
h at Truth table
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Dr.
A B A’ B’ Y=A’+B’
0 0 1 1 1
0 1 1 0 1
1 0 0 1 1
1 1 0 0 0
AND Gates fe s s or
ro
• The AND gate ahas m, P a high output only when all inputs
ai r
are high. mi J
l a x
e t a Truth table
Ge Logic symbol
h at
r. B
D
• The AND gate has a high output only when A and B are
high.
• In other words, the AND gate is an all-or-nothing gate;
a high output occurs only when all inputs are high.
• In Boolean equation form, Y =A AND B, i.e. Y=A.B or Y=AB
s s or
Three Inputs AND gate: ro fe
m ,P
• The inputs are i r aA, B, and C. When all inputs are low, Y
i Ja
is low. Ifl a even
x m one input is low, Y is in the low state.
e eta
• The
at G only way to get a high output is to raise all inputs
Bh
Dr. to the high state ( +5 V)
• In equation form, the three input AND gate is
represented as: Y=A.B.C=ABC
s s or
ro fe
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r a m
J ai
mi
a x
e t al
Ge
h at
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Dr.
r
Write the truth table o f e for the below
s s o given logic
Pr
i r am
, circuit.
i Ja
a x m
e t al
Ge
h at
r. B
D
r
What is the Boolean o f e s s o equation for the logic
Pr
icircuits
r am
, given below ?
i Ja
a x m
e t al
Ge
at Y1 = A.B
Bh
Dr. Y2 = C.D
Y= Y1+Y2 = AB+CD
• This circuit is called an AND-OR network.
• An equation in this form is referred to as a sum-of-
products equation.
• AND-OR networks always produce sum-of-products
equations.
r
What is the Boolean o f e s s o equation for the logic
Pr
icircuits
r am
, given below ?
i Ja
a x m
e t al
Ge
h at Y1= (A+B)
B
Dr. Y2=(C+D)
Y=Y1 . Y2 = (A+B). (C+D)
• This circuit is called an OR-AND network.
• An equation in this form is referred to as a product-of-
sums equation.
• OR-AND networks always produce product-of-sums
equations.
UNIVERSAL LOGIC s s or GATES-NOR, NAND
of e Pr
,
• A universal gate i r am is a gate which can implement any
i Ja
m
Booleanlaxfunction without need to use any other gate
e ta
type.
t Ge
h a
B
Dr.• The NAND and NOR gates are universal gates.
• In practice, this is advantageous since NAND and NOR
gates are economical and easier to fabricate and are the
basic gates used in all IC digital logic families.
NOR gates:
• The logic circuit shown above is called a NOT-OR gate
because the output is Y=A+B
s s or
• Read this as "Y equals ro fe NOT A OR B" or
m,P
a
"Y equals ithe Ja complement of A OR B."
i r
a x m
• Because e t al the circuit is an OR gate followed by
Ge
at
r. B an inverter, the only way to get a high output
h
D
is to have both inputs low.
s s or
• NOR Gate Symbol ro fe
m,P IEEE rectangular symbol
i r a
i Ja
a x m
e t al
Ge
h at
r. B
D
Pin configuration of IC 7402
s or
Bubbled AND Gatero fe s
m,P
ai ra
i J
a x m
e t al
Ge
h at
B
Dr.
Equivalent symbol
AND gate with inverted inputs
DE MORGANS First Theorem
A+B = A . B
The complement of a sum equals the product of the
complements
Universality of NOR gatessor
ro fe
– Figure showsmhow , P all other logic gates can be
i r a
obtained i a
Jfrom NOR gates.
m a x
l
e eta
at G
Bh
Dr.
(a) NOT from NOR (b) OR from NOR (c) AND from
NOR
NAND Gates s s or
ro fe
, P
r a m
J ai
mi
a x
e t al
Ge
t logic circuit shown above is called a NOT- AND
•BhaThe
Dr. gate because the output is Y=AB
• Read this as "Y equals NOT A AND B" or "Y equals
the complement of A AND B."
• Because the circuit is an AND gate followed by an
inverter, the only way to get a low output is for
both inputs to be high.
s s or
ro fe
, P
r a m
J ai
mi
a x
e t al
Ge
h at
B
Dr.
NAND-Gate Symbol IEEE rectangular symbol
The indicator "&" inside the box means "the output is high only when
all inputs are high."
s s or
• Pin configuration roof
fe IC 7400
m,P
i r a
i Ja
a x m
e t al
Ge
h at
r. B
D
s or
• Bubbled OR Gate ro fe s
m,P
i r a
i Ja
a x m
e t al
Ge
h at
r. B OR gate with inverted inputs Equivalent symbol
D
• DE MORGANS Second Theorem
A.B= A+B
The complement of a Product equals the sum of the
complements.
s s or
• Universality of NAND fe ro gate
, P
a m
– Figure showsJ ai r how all other logic gates can be
mi
a x
obtained from NAND gates.
tal ee
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Bh
Dr.
(a) NOT from NAND (b) AND from NAND (c) OR from
NAND
Equivalent Gates: s s or
ro fe
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r a m
• A NAND gate J aiis equivalent to an inverted-input OR
mi
la x
gate.
ee t a
at G
Bh
Dr.
• An AND gate is equivalent to an inverted-input NOR
gate.
s s or
ro fe
• A NOR gate ismequivalent
, P to an inverted-input
i r a
AND gate.
mi Ja
l a x
e eta
at G
Bh
Dr.
• An OR gate is equivalent to an inverted-input
NAND gate.
s s or
ro fe
, P
r a m
J ai
mi
a x
e t al
Ge
h at
B
Dr.
s s or
Standard
a m, Pro TTL
fe
gates
ai r
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tax
al
e
Type Ge Quad – 2 input Triple 3-input Dual 4-input Single 8-input
h at
r. B
D NAND 7400 7410 7420 7430
NOR 7403 7427 7425
AND 7408 7411 7421
OR 7432
s s or
fe
rofollowing circuits are logically
1. Check whether the , P
a m
equivalent? i Jair
a x m
ee tal
at G
Bh
Dr.
2. Write the truth-table for the above NAND-NAND circuit
or
Positiveroand Negative Logic
fe s s
m,P
ai ra
i J
a x m
• Use t l binary 0 for low voltage and a binary 1 for
aof
e e
G
athigh voltage is called Positive Logic.
h
.B
Dr
• Use of binary 1 for low and binary 0 for high
voltage is called Negative Logic.
Exercises s s or
fe
ro
P
• Realize Y = ABir+amC, using only NAND and NOR gate.
i Ja
• Construct
l a x mthe Truth table for following logic circuits.
et a
e
h at G
B
Dr.
s or
• Draw the logic circuit ro fe whose Boolean equation
s
m,P
is (1) Y = JA+B ai r a +C
mi
a x
e(2)
e t al Y = (ABC) D
at G
Dr. Bh (3) Y = ABC + ABC + ABC + ABC
• Construct the truth table for the 3-input NOR
Gate shown in figure
or
Combinational Logic o f e Circuits
s s
, Pr
r a m
• Discuss Boolean Jai algebra and several simplification
m i
techniques. a x
e t al
Ge
–at Boolean laws
h
B – Karnaugh map - geometric approach
Dr.
– Quine-McClusky - preferred when a large number of variables
are in consideration.
• There are two fundamental approaches in logic design:
the sum-of-products method and the product-of-sums
method.
• Either method produces a logic circuit corresponding to a
given truth table.
s s or
• The sum-of-products fe ro solution results in an AND-OR
, P
a m
r network, while the product-of-sums
or NAND-NAND iJ ai
solution a m
xresults in an OR-AND or NOR-NOR network.
tal
Gee
at
h
B
Dr.• Either can be used, although a designer usually
selects the simpler circuit because it costs less and is
more reliable.
BOOLEAN LAWS AND s s or
THEOREMS
of e Pr
,
Basic laws: Jai r am
mi
x
• The commutative laws are:
tala
ee
at G
Bh
Dr. A+B = B+A
AB = BA
• The associative laws are:
A+(B+C) = (A+B)+C
A(BC) = (AB)C
s s or
fe ro
• Distributive laws: a m, P
ai r
J
A(Blax+miC) = AB + AC
et a
e
h at G
B
Dr.
s s or
OR Operations fe
ro
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Four Boolean relations r a m are:
ai
miJ
• A + 0 = lA a x
e eta
• Aat +GA = A
Bh
Dr.• A + 1 = 1
• A+A=I
AND Operations
Four AND relations are:
• A· 1 = A
• A ·A = A
• A·0=0
• A. A = 0
s or
Double Inversion ro fe s
m,P
• The double-inversion
Jai r a rule is A = A
mi
la x
e t a
Ge
at
Dr.
De
Bh Morgan's Theorems
• A+B=AB
• AB=A+B
Duality Theorem s s or
fe
ro
P
m,
• The duality iratheorem is one of those elegant
i Ja
theorems
axmproved in advanced mathematics.
e t al
Ge
at
h
B
Dr.• Duality theorem says. Starting with a Boolean
relation, you can derive another Boolean relation by
1. Changing each OR sign to an AND sign
2. Changing each AND sign to an OR sign
3. Complementing any O or 1 appearing in the
expression
s s or
fe
• A+0=A , Pro A.1=A
r a m
J ai
mi
a x
e t al
• The Ge duality theorem is useful because it
h at
r. B sometimes produces a new Boolean relation.
D
Ex: A(B+C) = AB + AC
A+BC = (A+B).(A+C)
Dual and Self-dual fe s s or
Pro
• The dual of a switching m, function is one generated if:
i r a
i Ja
(i) ‘+’ a x mis replaced with ‘ . ’
e t al
Ge (ii) ‘ . ‘ is replaced with ‘ + ’
h at
r. B
D (iii) ‘ 1 ‘ or ‘ 0 ’ if appear are complemented
Consider the switching function:
F(A,B) = A B + A B
Its dual will be FD(A,B) = (A+B) . (A+B)
s s or
ro fe
, P
r a m
• The dual iofJaia self-dual function is the function
a x m
itself.e t al
Ge
h at
Dr.•B Consider the following switching function:
• F(A,B,C) = A.B+B.C+C.A
its dual function is
FD(A,B,C) = (A+B).(B+C).(C+A)
Exclusive OR and Exclusive NOR or
s s
ro fe
Ex-OR m,P
i r a
i J a
• A B =axAm B + A B is known as Exclusive OR or EX-
e t al
OR Geoperation.
h at
.•B
D A symbol is used to denote an EX-OR
r
operation.
Ex-NOR
• A B = A B + A B is known as Exclusive NOR or
EX-NOR operation.
• A symbol is used to denote an EX-OR operation.
• Note: Ex-OR and Ex-NOR functions are dual of
each other
Exclusive OR and Exclusive NOR or
s s
ro fe
• Note: Ex-ORraand P
m, Ex-NOR functions are dual of
J ai
each other la x mi
t a
Gee
h at
r. B
D
Ex-NOR
Covering and Combination s s or
ro fe
,P
• The covering i r a rule, where one term covers the
m
i Ja
conditiont al a x m of the other term so that the other
e e
hterm
at G becomes redundant, can be represented
r. B
D in dual form as
(i) A + AB = A (ii) A(A +B) = A
Proof:
A + AB = A · 1 + AB A(A + B) = A · A + AB
= A(1 + B) = A + AB
=A·1=A = A (from i)
s or
The combining rules ro feare,
s
m,P
(i) AB + AB =A Jai r a
mi
a x
Proof:eet=al A(B+B)
at G
Dr.
Bh = A (1)
=A
And in its dual form
(ii) (A + B)(A + B) = A
Proof: = AA + AB+AB+BB
= A + A(B+B)+0
=A+A=A
s s or
ro fe
, P
r a m
J ai
mi
a x
e t al
Ge
h at
B
Dr.