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D and JK Flip-Flop to SR Conversion Guide

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0% found this document useful (0 votes)
3 views10 pages

D and JK Flip-Flop to SR Conversion Guide

Uploaded by

shuvampal23
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd

Sequential

Circuits
Presented by :
Dinesh Chell - 11500221049
Purnendu Palui - 11500221051
Shuvam Pal - 11500221052
Step 1: For conversion of D to SR Flip-Flop at first we

Convers have to make combine truth table for D flip-flop and


SR flip-flop.

ion of a
D Flip-
Flop to
SR Flip-
Flop
From above truth table we can understand what are the
different inputs we need to get the outputs.
Step 2: Our next step will be to obtain the logical expression for the
input of the given D flip-flop in terms of the inputs of the desired flip-
flop, S and R, and the present-state, Qn.
This can be done by following any logical simplification technique like
that of the K-map.
Step 3: Now as per the Boolean
expression of D with S R from Karnaugh
map we can easily build SR Flip-Flop
using D Flip-Flop.
Latch:
Latch is an electronic device, which
changes its output immediately
based on the applied input. It is used
to store either 1 or 0 at any specified
time. It consists of two inputs namely
“SET” and RESET and two outputs,
which are complement to each other.
These are sensitive to the input
voltage applied and does not depend
on the clock pulse. Flip flops that do
not use clock pulse are referred to as
latch.
Difference FLIP-FLOP LATCH

between
Flip-flop is a bistable device i.e., it has
Latch is also a bistable device whose
1 two stable states that are represented
states are also represented as 0 and 1.
as 0 and 1.

Flip-Flop 2
It checks the inputs but changes the
output only at times defined by the
It checks the inputs continuously and
responds to the changes in inputs

and Latch 3
clock signal or any other control signal.

It is an edge triggered device.


immediately.

It is a level triggered device.

Gates like NOR, NOT, AND, NAND are


4 These are also made up of gates.
building blocks of flip flops.

They are classified into asynchronous or


5 There is no such classification in latches.
synchronous flipflops.

These can be used for the designing of


It forms the building blocks of many
6 sequential circuits but are not generally
sequential circuits like counters.
preferred.

7 A Flip-flop always have a clock signal Latch doesn’t have a clock signal

8 Flip-flop can be built from Latches Latches can’t be build from gates

ex: D Flip-flop, JK Flip-flop ex: D Flip-flop, JK Flip-flop


Step 1: S and R will be the external inputs to J and

Convers K. J and K will be the outputs of the combinational


circuit. Thus, the values of J and K have to be
obtained in terms of S, R and Qp.
ion of a
JK Flip-
Flop to
SR Flip-
Flop
From above truth table we can understand what are the
different inputs we need to get the outputs.
Step 2: Now, we simplify the logical expressions for the
inputs of the given flip-flop (J and K) in terms of the inputs
of the desired flip-flop (S and R) and the flip-flop's present-
state, Qn.
This can be done by following any logical simplification
technique like that of the K-map.
Step 3: Now as per the Boolean
expression of J K with S R from Karnaugh
map we can easily build SR Flip-Flop
using JK Flip-Flop.

Logic Diagram
We would like to conclude
by thanking Mrs. Rashmita
Mishra, for giving us this
wonderful topic to present
and all my fellow mates for
being attentive.

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