Design of Logic Circuits
using BiCMOS
BiCMOS inverter - 1
Vin T1 T2 Q1 Q2 Vout
0 On Off On Off Vdd-Vce =
Vdd-Vbe
1 Off On Off On Vce
Drawbacks
• Whenever Vin=1, there is a direct rail connecting from Vdd to Gnd. This
increases the static power dissipation.
• There is no discharge path from either of the BJTs Q1 & Q2 whenever
it is being turned off. This will reduce the speed of the circuit.
Modified BiCMOS inverter -2
A T1 T2 Q1 Q2 Vout
0 On Off On Off Vdd-Vce =
Vdd-vbe
1 Off On Off On Vce
Advantages
• There is no direct rail path from Vdd to Ground when A = logic 1.
Disadvantages
• There is no discharge path from either of the BJTs Q1 & Q2 whenever
it is being turned off. This will reduce the speed of the circuit.
BiCMOS inverter - 3
Vin Q4 Q5 Q3 Q6 Q1 Q2 Vout
0 On Off Off On Off On Vdd –Vce =
Vdd-Vbe
1 Off On On Off On Off Vce
Advantages
• There is no direct rail path from Vdd to Ground when Vin = logic 1.
• There is discharge path available from either of the BJTs Q1 & Q2
whenever it is being turned off. Thus increases the speed of the circuit.
• Whenever Q1 is turned off, Q6 provides the discharge path from the
base of Q1 to ground.
• Whenever Q2 is turned off, Q5 provides the discharge path from the
base of Q2 to ground.
BiCMOS NAND Gate
A B M1 M2 M3 M4 M5 M6 M7 Q1 Q2 Vout
0 0 On On Off Off Off Off On On Off Vdd -Vce
0 1 On Off Off On Off On On On Off Vdd -Vce
1 0 Off On On Off On Off On On Off Vdd -Vce
1 1 Off Off On On On On Off Off On Vce
BiCMOS NOR Gate
A B MP MP M1 M1 MN MN M2 T1 T2 Vout
A B A B A B
0 0 On On Off Off Off Off On On Off Vdd -Vce
0 1 On Off Off On Off On Off Off On Vce
1 0 Off On On Off On Off Off Off On Vce
1 1 Off Off On On On On Off Off On Vce