Basic MOS Device
Physics
Content
• Structure of MOS transistors
• MOS Symbols
• MOSFET as a Switch
• MOSFET Structure
• MOS I/V characteristics
• Threshold Voltage
• Derivation of I/V Characteristics
• MOS Transconductance
• Second-Order Effects
• Body Effect
• Channel-Length Modulation
• Subthreshold Conduction
• Voltage Limitations
CONFIDENTIAL 2
Content
• MOS Device Models
• MOS Device Layout
• MOS Device Capacitances
• MOS Small-Signal Model
• MOS SPICE models
• NMOS Versus PMOS Device
• Long-Channel Versus Short-Channel Devices
• FinFETs
• Bahavior of a MOS Device as a Capacitor
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General Considerations
MOS Symbols
• MOSFET consists of four terminals: source (S), drain (D), gate (G) and bulk
(B)
• Fig. 2.5(b) shows the usual symbols in analog circuits due to the visual
distinction between S and D
• Fig 2.5 (c) depicted the symbols "switch" customary in digital circuits
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General Considerations
MOSFET as a Switch
• MOS transistor “connects” the source and the drain together if the VG
is “high” and isolates the source and the drain if VG is “low”
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General Considerations
MOSFET Structure
• The useful action of the device occurs in the substrate region under the gate
oxide
• .
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General Considerations
MOSFET Structure
• Since in typical MOS operation, the S/D junction diodes must be reverse-
biased, we assume that the substrate of NMOS transistors is connected to the
most negative supply in the system
• NMOS and PMOS devices must be fabricated on the same wafer
• one device type can be placed in a “local substrate"
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MOS I/V characteristics
Threshold Voltage
CONFIDENTIAL 8
MOS I/V characteristics
Threshold Voltage
• VTH of an NFET is usually defined as the gate voltage for which the interface
is “as much n-type as the substrate is p-type”
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MOS I/V characteristics
Threshold Voltage
• Threshold voltage is typically adjusted by implantation of dopants into the
channel area during device fabrication, in essence altering the doping level of
the substrate near the oxide interface
• Assume for now that the device turns on abruptly for VGS ≥ VTH
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MOS I/V characteristics
Derivation of I/V Characteristics
• If the mobile charge density along the direction of current is Qd coulombs per
meter and the velocity of the charge is v meters per second, then
CONFIDENTIAL 11
MOS I/V characteristics
Derivation of I/V Characteristics
• Charge density in the inversion layer
• VD = 0
• VD > 0
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MOS I/V characteristics
Derivation of I/V Characteristics
• If VDS < VGS − VTH, we have that the current is given by
CONFIDENTIAL 13
MOS I/V characteristics
Derivation of I/V Characteristics
• If VDS < 2(VGS − VTH), we have
• The linear relationship implies that the path from the source to the drain can
be represented by a linear resistor equal to
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MOS I/V characteristics
Derivation of I/V Characteristics
• If VDS ≥ VGS − VTH, we have
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MOS I/V characteristics
MOS Transconductance
• If VDS ≥ VGS − VTH, we have
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Second-Order Effects
Body Effect
CONFIDENTIAL 17
Second-Order Effects
Body Effect
• For body effect to manifest itself, the bulk potential, Vsub, need not change:
if the source voltage varies with respect to Vsub, the same phenomenon
occurs.
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Second-Order Effects
Channel-Length Modulation
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Second-Order Effects
Channel-Length Modulation
• With channel-length modulation, some of the expressions derived for gm
must be modified. Equations (2.18) and (2.19) are respectively rewritten as
• while Eq. (2.20) remains unchanged
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Second-Order Effects
Voltage Limitations
• At high gate-source voltages, the gate oxide breaks down irreversibly,
damaging the transistor
• In short-channel devices, an excessively large drain-source voltage widens
the depletion region around the drain so much that it touches that around
the source, creating a very large drain current
• “punchthrough”
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Second-Order Effects
Subthreshold Conduction
• This effect can be formulated for VDS greater than roughly 100 mV as
where I0 is proportional to W/L, ξ > 1 is a nonideality factor, and VT = kT/q
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Second-Order Effects
Subthreshold Conduction
• The overdrive voltage where the transistor goes from strong inversion to
weak inversion is a transition point at which the corresponding
transconductances would become equal for the same drain current:
• and hence
• For ξ ≈ 1.5, this amounts to about 80 mV
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MOS Device Models
MOS Device Layout
• The layout of a MOSFET is determined by both the electrical properties
required of the device in the circuit and the “design rules” imposed by the
technology
• W/L is chosen to set the transconductance or other circuit parameters
• the minimum L is dictated by the process
• For ξ ≈ 1.5, this amounts to about 80 mV
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MOS Device Models
MOS Device Layout
• Terminals must be tied to metal wires that serve as interconnects
with low resistance and capacitance
• One or more “contact windows” must be opened in each region, filled
with metal, and connected to the upper metal wires
• Gate poly extends beyond the channel area by some amount to
ensure reliable definition of the “edge” of the transistor
• The source and drain junctions play an important role in the
performance
• To minimize the capacitance of S and D, the total area of each
junction must be minimized
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MOS Device Models
MOS Device Capacitance
• In many analog circuits, must also be taken into account
so as to predict the high-frequency behavior as well:
• I/V relationships
• Body effect
• Channel-length modulation
• Capacitances associated with the devices
• A capacitance exists between every two of the four
terminals of a MOSFET
• The value of each of these capacitances may depend on the
bias conditions of the transistor
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Reference
Razavi, Behzad. Design of analog CMOS integrated circuits. 2 ed. Los
Angeles: McGraw Hill, 2017.
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Basic MOS Device
Physics
Julia Gomes
[Link]@[Link]
Jonatas Kinas
[Link] [Link]@[Link]