F-14 “Tomcat”
Microprocessor Chip Set
Ray Holt
©Copyright 1998-2014 Ray M. Holt ALL RIGHTS RESERVED
Available Documents
• [Link]
First revealed in 1998 (30 year secret)
Design notebook (excerpts)
This slide show
Original design paper – 1971
(approved by IEEE Computer Design Magazine in 1970)
“Analysis” paper – 1998
Wall Street Journal article
Electronic Business article
Smithsonian Museum Air & Space Magazine
“From Dust to the Nano Age” Leo Sorge
This Talk
• My Career Experiences after Cal Poly
• My path to Cal Poly and to the F-14
• Engineering of the Microprocessor Chip Set
• Q&A
Career Experiences
1968 – 70
Garrett-AiResearch Corp
Aircraft & Space Systems
Design Engineer
F-14 Central Air Data Computer
Career Experiences
1971 – 73
American MicroSystems
Integrated Circuit Manufacturer
Senior Logic Design Engineer
Calculators chips
Microprocessors chips
(AMI 7200 and 7300)
Career Experiences
1974 – 80
Microcomputer Associates, Inc. 1974-78
Honeywell/Synertek Corp 1979-80
System manufacturer & Publisher
Co-Founder, Vice-President
Microcomputer Digest
Jolt, Super Jolt, SYM system cards
First computer-controlled Pinball “Lucky Dice”
First Handheld chess
Radio Shack prototype
1974 -1976
Microcomputer Digest
1974 JOLT
1975 Super JOLT
1976 Super Jolt, RAM,
Audio Card
1975 SYM-1
1975 SYM-1
Bonnie Sullivan, programmer for SYM-1: “I worked on the software for the
SYM-1 project, and I can add some details.
The software was written by Nelson Edwards and students in Walla Walla.
They hand-assembled the 6502 code.
There was an option to have the SYM-1 with Microsoft Basic. Bill Gates
himself came to see us and provided the Basic. He was arrogant, baby-
faced, and he wrote buggy code, then refused to believe that it didn't work.
I think he assembled it with macros in a PDP-10 assembler. We would
provide him with hardware specs, he would customize Basic, send us the
code, we would burn an EPROM, and it wouldn't work. "That's impossible!",
he would say, despite the fact that he didn't have the hardware, so he
hadn't tested it.
1982 US NAVY Robart I
Career Experiences
1981 – 83
Digital Optics Corp
Optical / Laser Scanner Manufacturer
VP Engineering & Manufacturing
3-D Laser Scanner
“Indiana Jones and the Last Crusade”
“Return of the Jedi”
Product won Academy Award for Special Effects
Career Experiences
1983 - Present
Cornerstone Computers
Owner
2nd Software Distributor
Custom Systems (programming and system integration.)
Medical, dental, manufacturers, video stores
Business consultant & Trainer
Website developer & Host
Education Curriculum Developer & Teacher
1981 Software
Distribution
Technology Education in
Rural Mississippi
• Robotics
• Web Page Design
• Intro to Logic Design
• Intro to Computers
• PowerPoint
80 students
4 locations in MS
Ages 10 -17
Engineering & Robotics
Competitions
2013
13th in World
Competition.
Highest
Ranked 1st
Year Team.
How Did I Get Cal Poly?
• Born & Raised in Compton CA
• Encouraged not to enter engineering
• All F’s my 1st year of community
college
• Worked on a garbage dump
• Decided I had better go back to college
• Attended the University of Idaho
Forestry to Cal Poly
• University of Idaho
Forestry Major & R.O.T.C. Army Ranger Unit
Junior ready to graduate
Took Physics of Electricity at Dean's request
Forestry to Cal Poly
• Cal Poly Pomona
Electronic Engineering Major
Tubes to transitors
Junior year: took Switching Theory as elective
Cal Poly to F-14
• Garrett AiResearch Engineering
Hired to design amplifiers for aircraft audio
Only one in department with computer class
Special project: Mechanical – Electronic Computer
Microcomputer History
1990's
• Embedded processors
• Pentiums 100Mhz – 3Ghz+
• 486’s 30Mhz – 100Mhz
• 386 10Mhz – 50Mhz
• Windows
• MS Office (Word, PowerPoint, etc.)
Microcomputer History
1980’s
• 286’s 4Mhz – 20Mhz
• IBM PC introduced (1981)
Time “Man of the Year”
• DOS Operating System
• Wordstar Word Processor
• Lotus 1-2-3 Spreadsheet
Microcomputer History
1970’s
• 1977 - Radio Shack TRS-80
• 1977 - Commodore Pet
• 1977 - Apple I / KIM / SYM
• 1975 - Intel 8080 CPU
• 1975 - Microsoft Basic/Altair/Jolt/SYM
• 1973 - CP/M Operating System
• 1972 - Intel 4004 CPU
Microcomputer History
1968
• Apollo 7 & 8 Launched
• Intel Founded
• IBM 8” Floppy Drive
• Bill Gates turned 13
• F-14 Microprocessor design started
The Big Challenge
Make A New
Integrated Circuit
Computer
From A
Electromechanical
Computer
F4 Phantom CADC
Companies Involved
Prime Contractor:
Grumman Aircraft
SubContractor:
Garrett AiResearch
Integrated Circuits:
American MicroSystems
The Team
2 – Computer Logic Designers
3 – High-level Programmers
4 – Analog Designers
1 – Applied Mathematician
1 – Test / Mfg Engineer
3 – Electronic Technicians
2 – Draftsmen
4 – Managers
5 – Integrated Circuit Engineers
(American MicroSystems)
Design Time Frame
Started: June 1968
Completed: June 1970
1st Flight: Dec 21, 1970
1st Flight
December 21, 1970
F-14 “Tom Cat” CADC
Dual Redundant
• 2 - computers
• 2 - power supplies
• 4 - quartz sensors
• 2 - sets A/D and D/A
Computer (CADC)
Design Constraints
• Size: 40 sq inches for microprocessor
• Power: 10 watts
• Cost: $3,000-$5,000
• Temperature: -55 to +125 deg C
• Provide data for control & firing of 6 Phoenix
/ Sidewinder missiles at the same time
• Others: Acceleration, mechanical shock,
reliability, project schedule
F-14 In-Flight
• Three minute YouTube Video
[Link]
• Observe the various positions of the wings. They are
100% computer controlled.
• Observe the dynamic flow of air across the plane.
The computer is constantly correcting for stability.
• When there is a cloud formation around the plane it is
breaking the sound barrier (the Danger Zone)
What Is A C.A.D.C.?
A Flight Computer to:
• compute and display
– altitude
– air speed
– vertical speed
– mach number
– temperature
A Flight Computer to:
• compute and control
– wing speed, position, and rate
– maneuver flap position
– glove vane position
– angle of attack correction
A Flight Computer to:
• provide other critical flight information
– real-time data to other systems
(weapons and communications)
– in-flight self-diagnostics
– redundant switchover to dual system
State-of-the-Art
in 1968?
The Technology
TTL Bipolar - high power
MOS logic modules - too many packages
LSI - new, not proven
CADC Block Diagram
Microprocessor
Self Test Functions
• In-Flight Diagnostics
– 100% of all connections/data paths
– 100% of all ROM bits
– 100% non-arithmetic circuits
– 98% all arithmetic unit single failures
– dual redundant system
– pilot notification
Required
Arithmetic Calculations
6th Order Polynomials
F(x) = a6x6+a5x5 +a4x4 +a3x3 +a2x2 +a1x1+a0
x = input from sensors or stored values
We implemented using Horner’s Rule
F(x) = (- - - ((a0 x + a1) x + a2) x + - - -
Microprocessor
Data Structure
Number System
• fractional fixed point computation
• two’s complement arithmetic
• 20 bit data length
(based on flight requirements)
Microprocessor
Technology
• high level of integration - P Channel MOS
• minimum package and lead count
• lowest possible power
• mil spec temp range -55C to +125C
Microprocessor
Design Decisions
• serial instruction and data transfer
• distributive instruction command
• ‘pipeline’ instruction and arithmetic
• ROM master/slave instructions
• ROM built-in counter and conditional jump
Microprocessor
F-14 System Diagram
Microprocessor
System Timing
• 375Khz Clock, 2.66 us bit time
• One word = 20 bit times or 53.3 us
• Operation time - two words
• 512 Op times - computational Cycle
• 18.3 Cycles per second
• 9370 Op times per second for each
computational unit
Microprocessor
Functional Units
• Parallel Multiplier Unit (PMU)
• Parallel Divider Unit (PDU)
• Special Logic Function (CPU)
• Data Steering Unit (SLU)
• Random Access Memory (RAM)
• Read-Only Memory Unit (ROM)
Computational
Requirements
Req/Sec Max/CU
• Multiply (20-bit) 5490 9370
• Divide (20-bit) 1922 9370
• Add/Sub (20-bit) 293 9370
• Limits Comparisons 1373 9370
• Square Roots 73 *
• Logical And/Or 26 *
• IF Transfers 72 9370
• Discrete inputs/output 842 9370
• A/D and D/A I/O 695 9370
Microprocessor Chip Set
PMU Functions
• 20-bit parallel multiplier
• three internal storage registers
• ‘pipelined’ overlap I/O and operation
• Booth’s multiply algorithm
• 53.3 μs multiply / 53.3 μs transfer
• continuous operation
P
M
U
Microprocessor Chip Set
PDU Functions
• 20-bit parallel divider
• three internal storage registers
• ‘pipelined’ overlap I/O and operation
• Non-restoring division algorithm
• 53.3 μs divide / 53.3 μs transfer
• continuous operation
P
D
U
Microprocessor Chip Set
CPU Functions
• logical and arithmetic operations
• Gray code conversions
• three internal storage registers
• ‘pipelined’ overlap I/O and operation
• 53.3 μs multiply / 53.3 μs transfer
• 4-bit instruction word
C
P
U
Microprocessor Chip Set
SLU Functions
• three channel digital data multiplexer
• 16 inputs - 3 channels out
• four inputs combined for arithmetic
operations
• 53.3 μs operation / 53.3 μs command
• 15-bit instruction word
S
L
U
Microprocessor Chip Set
RAM Functions
• sixteen 20-bit static registers
• random access read-write storage
• 53.3 μs I/O time
• 5-bit instruction word
R
A
M
Microprocessor Chip Set
ROM Functions
• 2560-bit random access/sequential access
fixed memory - 128 words x 20-bits
• can parallel eight ROM’s for 1024 words
• program counter - cleared / +- increment /
hold / external
• data out / parity out
• 20-bit instruction word
R
O
M
Microprocessor
Technology Spec’s
CHIP DEVICES SIZE PKG # USED TOTAL
PMU 1063 150 x 153 24 pin 1 1063
PDU 1241 141 x 151 24 pin 1 1241
CPU 743 120 x 130 24 pin 1 743
SLU 771 128 x 133 24 pin 3 2313
RAM 2330 115 x 130 14 pin 3 6990
ROM 3268 143 x 150 14 pin 19 62092
TOTAL 28 74442
ROM
PMU
RAM
PDU
SLU
CPU
Microprocessor
Instruction Set
• PMU - continuous - co-processor
• PDU - continuous - co-processor
• CPU - 16 instructions
• SLU - 48 instructions
• RAM - 32 instructions
• Executive ROM - 37 instructions
TOTAL = 133 instructions
Microprocessor
Equations - Angle of Attack
Microprocessor
Numeric Scaling - Angle of Attack
Microprocessor
Equation Flow - Angle of Attack
Microprocessor
Program Flow - Angle of Attack
Microprocessor
Typical Binary Coding Sheet
Microprocessor
Initial Programming Aids
• No assembler
• No compiler
• No simulator
• No debugger
• No hardware prototype
Microprocessor
Testing/Computer Aids
• Failure analysis simulation
(circuit logic level simulation)
• Programming simulation
(chip level with timing)
• Card deck for ROM masking
• Program flow chart
• Flight test software changes
• Hardware prototype for real testing
Simulator/Debugger Output Values Report
ROM Binary Programming Report
Program Flowchart Report from Plotter
Hardware Prototype of F-14 CADC
Dual Quartz Sensors
Simulated Pilot Display from CADC
General Design
Accomplishments
1st microprocessor chip set
1st aerospace microprocessor
1st fly-by-wire flight computer
1st military microprocessor
1st production microprocessor
1st fully integrated chip set microprocessor
1st 20-bit microprocessor
Specific Design
Accomplishments
1st microprocessor with built-in programmed
self-test and redundancy
1st microprocessor in a digital signal (DSP)
application
1st with execution pipeline
1st with parallel processing
1st integrated math co-processors
1st Read-Only Memory (ROM) with a built-in
counter
1st Time with F-14
Nov 2012
F-14 “Tomcat”
1970 - 2006