CSE 231
Digital Logic Design
Tanzilur Rahman (Tnr)
Assistant Professor
North South University
Information…..
Lecture Room: NAC 511
Lecture Time: ST 09:40 – 11:10 , ST 11.20 – 12.50
Lab Room: Digital Microprocessor Laboratory, 5th Floor of SAC
Building
Office: SAC 1022
Office Hours: Check my routine
Email: [Link]@[Link]
Phone: 02 55668200 Ext. 6182
Course Web
Visit [Link]
Digital Logic Design
Let me ask you few questions first…..
Did you take course on electrical circuits ??
Did you take course on electronics (Analog) ??
Do you know about signals (Analog/digital) ??
Digital Logic Design where do you find it?
Take the most familiar system example next…..
Digital Logic Design where does it fit?
Design to EEE 435
fabrication
Digital Systems Design CSE 332
(Ex. Computer/Mobile
Processor)
Digital Logic CSE 231
Circuits
(ALU, Memory)
Logical components EEE111
using transistors
Course Description:
This course provides an introduction to logic design and
basic tools for the design of digital logic systems. A basic
idea of number systems will be provided, followed by a
discussion on combinational logic: logic gates, Boolean
algebra, minimization techniques, arithmetic circuits
(adders, subtractors), basic digital …………………………
please read more from the outline
Course Objective:
After the completion of the course, the students will be able
to:
Apply the principles of Boolean algebra to logic functions.
Use K-maps to realize two-level minimal/optimal
combinational circuits
Understand the operation of latches, flip-flops, counters
and registers.
Analyze and design sequential circuits built with various
flip-flops.
Appreciate the ease and versatility of design using
programmable logic.
Class Structure:
1. Class Records : Students will have access to the class recording (of previous
semesters) from the beginning. Students are strongly encouraged to check the
recording before attending the respective class
2. Class Lecture : The class activity will be divided into three parts.
1. Explanation on a specific topic,
2. Answering Question,
3. On class Assignments and Discussion.
Class performance will be recorded and will be valuable for grading. Class will not
be recorded.
3. Laboratory : You must pass in your lab to attain a passable grade in theory. 20%
marks from your lab will be directly added to your theory
Class Structure:
4. Class performance : Responding to queues and doing the classwork is
important
5. Assignments : You will be given some design assignments. You will use
pen and papers and tools to solve those problems.
6. Projects : You will have to submit a project at the end of the semester.
You will work on the project as a group.
7. Exams: There will be one midterm, one final exam and zero make-ups .
Textbook:
Digital Design
By Morris Mano and Michae D. Ciletti, 5th Edition
Digital Design: Principles and Practices,
By J F Wakerly, 4thed, Prentice Hall, 2005
Digital Logic Techniques,
By T J Stonham, 3rded, Chapman & Hall, 1996
Or any good textbook on Digital Logic Design
Distribution of Points:
*Digital Laboratory ----------------------------------------- 20 %
Attendance---------------- ------------------------------------ 0 %
Project/Assignment ---------------------------------------- 15 %
Quizzes -------------------------------------------------- 10 %
Term Examination ----------------------------------------- 20%
Final Examination --------------------------------------------- 25%
Performance-------------------------------------------------------15%
*Must obtain 60% marks in CSE231L
Lecture Topics:
Topics Effort in (Min.)Hr
Numerical representation of numbers 2 hours/wk
Boolean algebra 2.5 hours/wk
Combinational logic design 3.5 hours/wk
Combinational circuits 4 hours/wk
Synchronous sequential logic 6 hours/wk
Sequential circuits: Registers
and counters 4 hours/wk
Memory design (RAM, ROM) &
Programmable logic: 3.5 hours/wk
Class Performance
What will be used for the evaluation Class Performance?
a. Regularity (note that there is no attendance score)
b. Responding to the queries
c. Classworks (from slide/book)
d. Class Refelections
e. Unannounced Quizzes
f. Notebook Check
g. Feedback from TA, Lab Instructors
** Collecting the book (Hardcopy/Softcopy) is mandatory. It will be checked.
Exam Policy
1) Students must keep the Webcam and Microphone active during any kinds of assessments (Viva,
Quiz, Mid, Final, Lab Assessments)
2) The webcam must be set up with a full focus on the front face
3) Once the exam starts the headphone must be removed.
4) Students must ensure they remain connected throughout the exam time
5) Given Time is fixed and not extended.
6) I accept submissions through email once Canvas is locked. The penalty for a late submission is
3/per min. It will start as soon as Canvas is locked.
7) If plagiarism is detected in any question and similarities are detected among multiple copies all
copies will receive
a. zero for all questions (Quizzes and Midterm)
b. F (Final)
5) If you are accused of cheating / plagiarism you may request for a Viva. However, if enough evidence is received
you may not get that opportunity.
Class Policy:
1. You must keep the following items ready during the class.
a. Microphone
b. Stable internet Connections
2. If you miss your attendance, it is not given.
3. Typing into chat box for any query or giving attendance is not
allowed. Using the Mic is mandatory.
Project
There will be a group project
Group must be formed on the first Lab class
The project will have two phases
Each contains Report Submission, Demo, Viva
Project Title will announced soon
Digital Laboratory
Will be conducted by the Lab Instructor (TBA)
Lists of experiments and outline will be provided in
the first lab.
Will be graded separately
Minimum 60% score in Lab is mandatory to pass this
course