Chapter 4
Timer/Counter and Interrupt programming:
11/30/20 1
Interrupts
11/30/20 2
Interrupt
Program
time t
Interrupt
Interrupt
Program
time t
Interrupt Execution
Interrupt
Program Program
Interrupt Service Routine
time t
Interrupt Vectors
• Code that deals with interrupts:
Interrupt Handler or Interrupt Service
Routines (ISRs) Interrupt Flag Interrupt
vector address
Reset - 0000H
INT0 (Ext.
int. 0) IE0 0003H
• Possible code: Interrupt number Timer 0 TF0 000BH
INT1 (Ext.
IE1 0013H
int. 1)
void ISR(void) interrupt 1 Timer 1 TF1 001BH
{ Serial TI/RI 0023H
++interruptcnt;
}
8051 Interrupts
General 8051:
3x timer interrupts, Interrupts
2x external interrupts
1x serial port interrupt
reset Timer External Serial
IE register
• Interrupt Enable Register, used to enable/disable interrupt sources.
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
EA - - ES ET1 EX1 ET0 EX0
• Bit 7 EA: Enables All Bit
• Bit 6,5 – Reserved Here,
• Bit 4 – ES: Enables Serial Interrupt Bit
1 = Enable
• Bit 3 – ET1: Enables Timer1 Interrupt Bit 0 = Disable
• Bit 2 – EX1: Enables External1 Interrupt Bit
• Bit 1 – ET0: Enables Timer0 Interrupt Bit
• Bit 0 – EX0: Enables External0 Interrupt Bit
Interrupt priority after Reset
Priority Interrupt source Intr. bit / flag
1 External Interrupt 0 INT0
2 Timer Interrupt 0 TF0
3 External Interrupt 1 INT1
4 Timer Interrupt 1 TF1
5 Serial interrupt (TI/RI)
IP Register
• Interrupt priority register to to assign priority to interrupts.
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
- - - PS PT1 PX1 PT0 PX0
• Bit 7,6,5 – Reserved bits.
• Bit 4 – PS: Priority Bit for Serial Interrupt 1 = Assigns high priority
• Bit 3 – PT1: Priority Bit for Timer1 Interrupt 0 = Assigns low priority
• Bit 2 – PX1: Priority Bit for External Interrupt 1
• Bit 1 – PT0: Priority Bit for Timer0 Interrupt
• Bit 0 – PX0: Priority Bit for External0 Interrupt
Interrupt Structure
IE Reg IP Reg High
Interrupt Sources 0
0
INT
INT00
IT 0 IE0 Priority
1
External 1 Interrupt
Interrupts
TF
TF00
Timer 00 Interrupt
Interrupts INT
INT11 IT 1 IE1
1 Polling
1 Sequence
TF
TF11
Serial
Communi RI
cation TI Individual Low Priority
Interrupts Enable Global Enable Interrupt
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