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Hardwired Control Logic Design Steps

This document outlines the 5 steps to design a hardwired control logic for addition and subtraction of binary fixed point numbers. The steps are: 1) stating the problem, 2) specifying the initial equipment, 3) formulating the algorithm, 4) specifying the data processor part, and 5) designing the control logic. The control logic design involves drawing a state diagram and deriving the D flip flop input functions from the state diagram to control the addition/subtraction process.

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0% found this document useful (0 votes)
8 views17 pages

Hardwired Control Logic Design Steps

This document outlines the 5 steps to design a hardwired control logic for addition and subtraction of binary fixed point numbers. The steps are: 1) stating the problem, 2) specifying the initial equipment, 3) formulating the algorithm, 4) specifying the data processor part, and 5) designing the control logic. The control logic design involves drawing a state diagram and deriving the D flip flop input functions from the state diagram to control the addition/subtraction process.

Uploaded by

mspillaio
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd

Module 6

CONTROL LOGIC DESIGN


Prepared by
Teena George
CSE Dept.
ASIET
Hardwired Control – Addition & subtraction of binary fixed
point numbers using one flip flop per state method

• Design is carried out in 5 steps


1. Problem is stated
2. Initial equipment configuration
3. Algorithm formulation
4. Data processor part is specified
5. Control logic is designed
5 steps towards Hardwired Control
• STEP 1 : Problem Statement
– Addition & subtraction of binary fixed point numbers using
one flip flop per state method
• STEP 2 : Initial Equipment
Initial Equipment
B
Bs

Qa
Control
Qs
Logic
ALU
E
x

A
As
Algorithm
±a ± ±b

+a + +b +a - +b
+a + -b +a - -b
-a + +b -a - +b
-a + -b -a - -b
Subtraction to addition

Invert sign of B, complement of Bs


Perform addition operation
5 steps towards Hardwired Control
• STEP 3 : Algorithm
Data Processor Part
B
Bs
Qa x
s2
s2 s1
y s1 Qs s0
ALU s0
E
cin Control cin
Logic L
L S
w
w
As A E y
z

z
5 steps towards Hardwired Control
• STEP 4 : Data processor part is specified

a) Data processor registers and ALU b) Control Block Diagram


Control Logic
5 steps towards Hardwired Control
• STEP 5 : Control logic is designed
State Diagram
Qa=qs=0

To
T3
Qs=1 Qa=1
T7 T1
S=0

E=1 T2

T6 S=1

T4
E=0
T5
D Flip Flop input functions
Qa=qs=0

To
T3
Qs=1 Qa=1
T7 T1
S=0

E=1 T2
DT0=qa’qs’T0+t3+ET5+T7
DT1=qsT0
T6 S=1 DT2=T1+qaT0
DT3=S’T2
T4
E=0 DT4=ST2
T5 DT5=T4
DT6=E’T5
DT7=T6
5 steps towards Hardwired Control
• STEP 5 : Control logic is designed
SUMMARY…

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