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CMOS Inverter DC Transfer Characteristics

The document discusses the DC transfer characteristics of CMOS gates and pass transistors. It shows the CMOS inverter transfer function and how the output voltage changes with different input voltage ranges. It also explains noise margin and how it is defined for low and high logic levels. Threshold voltage is discussed as the dividing line between logic levels. Finally, it describes how pass transistors made of nMOS and pMOS can be combined to create a CMOS switch that strongly passes both 0s and 1s.

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wajid ali
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105 views6 pages

CMOS Inverter DC Transfer Characteristics

The document discusses the DC transfer characteristics of CMOS gates and pass transistors. It shows the CMOS inverter transfer function and how the output voltage changes with different input voltage ranges. It also explains noise margin and how it is defined for low and high logic levels. Threshold voltage is discussed as the dividing line between logic levels. Finally, it describes how pass transistors made of nMOS and pMOS can be combined to create a CMOS switch that strongly passes both 0s and 1s.

Uploaded by

wajid ali
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd

DC Transfer Characteristics of CMOS Gates

and Pass Transistors


To get the transfer function look for same current for same input in the two
MOSFETS of inverter.
Vin=approx 2/3 VDD =0.6
Vin=VDD Vin=0.4V <0.5 Vin=0.5VDD
25
25.0
140 12

120 10
20
20.0

100 8
15
15.0
80
6

10.0 10
60
4

40 5
5.0 2

20
0 0
0.0
0 0.0 0.2 0.4 0.6 0.8 1.0
0.0 0.2 0.4 0.6 0.8 1.0 0.0 0.2 0.4 0.6 0.8 1.0
0.0 0.2 0.4 0.6 0.8 1.0

Vin=0V

140

120

100

80

60

40

20

0
0.0 0.2 0.4 0.6 0.8 1.0
CMOS inverter transfer function is shown.
Also called DC transfer function. Input voltages change slowly.

condition pMOS nMOS OUTPUT


A 0 ≤ 𝑉𝑖𝑛 < 𝑉𝑡𝑛 linear cutoff 𝑉𝑜𝑢𝑡 = 𝑉𝐷𝐷
B 𝑉𝑡𝑛 < 𝑉𝑖𝑛 < 𝑉𝐷𝐷 /2 linear saturated 𝑉𝑜𝑢𝑡 > 𝑉𝐷𝐷 /2
C 𝑉𝑖𝑛 = 𝑉𝐷𝐷 /2 saturated saturated 𝑉𝑜𝑢𝑡 drops sharply

D 𝑉𝐷𝐷 /2< 𝑉𝑖𝑛 ≤ 𝑉𝐷𝐷 − saturated linear 𝑉𝑜𝑢𝑡 > 𝑉𝐷𝐷 /2


𝑉𝑡𝑝

E 𝑉𝑖𝑛 ≥ 𝑉𝐷𝐷 − 𝑉𝑡𝑝 cutoff linear 𝑉𝑜𝑢𝑡 = 0


NOISE MARGIN
It tells us what range of input signal
will give the desired output.
𝑁𝑀𝐿 : LOW noise margin
defined as
𝑁𝑀𝐿 = 𝑉𝐼𝐿 − 𝑉𝑂𝐿
𝑉𝐼𝐿 =maximum LOW input voltage
𝑉𝑂𝐿 =maximum LOW output
voltage
𝑁𝑀𝐻 : HIGH noise margin
defined as
𝑁𝑀𝐻 = 𝑉𝑂𝐻 − 𝑉𝐼𝐻
𝑉𝑂𝐻 =minimum HIGH output
voltage
𝑉𝑂𝐿 =maximum LOW input voltage
The dividing line between the low and high
logic levels is called the threshold voltage. This
depends on the relations between individual
transistors. Their strength.
Obtained by equation the saturation currents.
1
𝑉𝐷𝐷 + 𝑉𝑡𝑝 + 𝑉𝑡𝑛 𝑟
𝑉𝑖𝑛𝑣 =
1
1+
𝑟
For short-channels (velocity saturated)
1
𝑉𝐷𝐷 + 𝑉𝑡𝑝 + 𝑉𝑡𝑛
𝑉𝑖𝑛𝑣 = 𝑟
1
1+
𝑟
Pass Transistors

Pass Gate or Transmission


Gate:

nMOS: passes 0 strongly


but 1 weakly
pMOS: passes 1 strongly
but 0 weakly

By combing them we obtain


a CMOS switch that passes
both strongly.

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