Course Outline:
• Introduction to MOSFET: fabrication and Modeling.
• MOS Inverter : Static and switching characteristics, MOS
Capacitor, Resistively of various layers.
• Symbolic and Physical Layout system : MOS Layout Stick/
Layout diagrams, Issues of scaling.
• Combinational MOS Logic Circuits : Pass Transistor / TGs,
primitive Logic gates, Complex logic gates.
• Sequential MOS Logic Design : Latches and Flip-Flops.
• Dynamic Logic Circuit : Clocking Issues.
• CMOS Subsystem Design : case Studies.
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TEXT BOOKS:
1. Kang & Leblebigi “CMOS Digital IC Circuit Analysis &
Design”- McGraw Hill, 2003.
References:
• Rabaey, “Digital Integrated Circuits Design”, Pearson
Education, Second Edition, 2003.
• D A Pucknell and K Eshraghian “Basic VLSI Design” –
Prentice-Hall, 2006.
• Weste and Eshraghian, “Principles of CMOS VLSI design”
Addison-Wesley, 2002.
• Additional reading from selected journals / papers.
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Many disciplines have contributed to the
current state of art in VLSI design:
• Solid-state physics.
• Materials science.
• Lithography and fab.
• Device modeling.
• Architecture.
• Algorithms.
• CAD tools.
• Circuit design & layout.
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Lets get started…
• We will review (learn for first time?) MOS
physics.
• Why MOSFET’s?
– CMOS circuits dissipate power only when switching
(they do use power when not switching, but is much
less than other circuits).
– This allows for more circuits to be placed on one die.
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VLSI Design Flow
Definitions and Terminology:
• Abstraction; refinement.
• Synthesis; analysis; optimization.
• Extraction ; generation.
Design process traverses iteratively among three
domains shown in Gajski Y chart.
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Abstraction
Extraction
Refinement
Generation
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SIMPLIFIED VLSI DESIGN FLOW VIEW IN
THREE DOMAINS
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VLSI Chip Design Styles
• Gate Array Technology, FPGA.
• Standard Cell Design Technology.
• Full Custom Mask Design.
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FULL CUSTOM DESIGN
• Complete fabrication process.
• Manual design.
• Total flexibility, only limited by layout
rules.
• Very High Development Cost – Smallest
Die area.
Features:
• Long design and fabrication time.
• Efficient use of silicon area.
• Cheap only at highest quantities.
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CAD Technology
• High level Synthesis.
• Logic Synthesis.
• Circuit Optimization.
• Layout.
• Simulation.
• DRC.
• Formal Verification.
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Next Topic: Fabrication of MOSFET
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