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X86 Microprocessor Programming Guide

The document discusses the x86 instruction set architecture. It describes how the x86 ISA has been implemented by both Intel and AMD processors internally in different ways while maintaining backwards compatibility. It then provides details on the evolution of Intel x86 microprocessors from 8086 to Pentium III, describing changes in address bus size, added features, and more. It also describes the 8086 register file including general purpose registers like AX, BX, CX, and DX as well as segment and pointer registers and their uses.
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0% found this document useful (0 votes)
6 views53 pages

X86 Microprocessor Programming Guide

The document discusses the x86 instruction set architecture. It describes how the x86 ISA has been implemented by both Intel and AMD processors internally in different ways while maintaining backwards compatibility. It then provides details on the evolution of Intel x86 microprocessors from 8086 to Pentium III, describing changes in address bus size, added features, and more. It also describes the 8086 register file including general purpose registers like AX, BX, CX, and DX as well as segment and pointer registers and their uses.
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPT, PDF, TXT or read online on Scribd

CS601: Microprocessor &

Interfacing : UNIT 2
X86 Programming model
• Instruction Set Architecture (ISA) : the definition of the
registers and instructions that define the programmer’s view
of a processor
• Can have different implementations of the same ISA
– Intel and AMD processors both execute the x86 ISA, but internally are
very different!!
– Intel has several different implementations of the x86 ISA!
• New versions of an ISA extend the previous version by adding
instructions, registers – but never invalidate the old ISA

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Intel x86 Microprocessors
8086 - 20 bit Addr. Bus - 1MB of Memory
80286 - 24 Addr. Bus - Added Protection Mode
80386 - 32 bit regs/busses - Virtual 86 Mode
80486 - RISC Core - L1 Cache - FPU
Pentium - Superscalar - Dual Pipeline - Split L1 Cache
Pentium Pro - L2 Cache - Branch Pred. - Speculative Exec.
Pentium MMX - 57 Instructions - Integrated DSP (MMX)
Pentium II - 100 MHz Bus - L2 Cache - MMX
Celeron - 66 MHz Bus - True L2 Cache Integration
Pentium III - 100 MHz Bus - 70 Internet Streaming SIMD Ext.

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8086 Register File
7 0 7 0

Accumulator AH AL AX
Base BH BL BX
Counter CH CL CX
Data DH DL DX
15 0
Code Segment CS
Data Segment DS
Stack Segment SS
Extra Segment ES
15 0
Instruction Pointer }
IP
Stack Pointer
Base Pointer
SP
BP }
Source Index
Destination Index
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SI
DI
Arvind Shrivastava
} 4
8086 Register File Contd..
Instruction Pointer Register
15 0

• IP Contains Address of NEXT Instruction to be


Fetched
– Automatically Incremented
– Programmer can control with jump and
branch

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AX, BX, CX, DX
• General Purpose Registers
7 0 7 0

Accumulator AH AL AX
Base BH BL BX
Counter CH CL CX
Data DH DL DX

• Can Be Used Separately as 1-byte Registers


AX = AH:AL
• Temporary Storage to Avoid Memory Access
– Faster Execution
– Avoids Memory Access
• Some Special uses for Certain Instructions
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AX, BX, CX, DX - Some Specialized Uses
• AX, Accumulator
– Main Register for Performing Arithmetic
– mult/div must use AH, AL
– “accumulator” Means Register with Simple ALU
• BX, Base
– Point to Translation Table in Memory
– Holds Memory Offsets; Function Calls
• CX, Counter
– Index Counter for Loop Control
• DX, Data
– After Integer Division Execution - Holds Remainder

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CS, DS, ES, SS - Segment Registers
Contains “Base Value” for Memory Address

CS, Code Segment


Used to “point” to Instructions
Determines a Memory Address (along with IP)
Segmented Address written as CS:IP

DS, Data Segment


Used to “point” to Data
Determines Memory Address (along with other registers)
ES, Extra Segment allows 2 Data Address Registers

SS, Stack Segment


Used to “point” to Data in Stack Structure (LIFO)
Used with SP or BP
SS:SP or SS:BP are valid Segmented Addresses

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IP, SP, BP, SI, DI - Offset Registers
Contains “Index Value” for Memory Address

IP, Instruction Pointer


Used to “point” to Instructions
Determines a Memory Address (along with CS)
Segmented Address written as CS:IP

SI, Source Index; DI, Destination Index


Used to “point” to Data
Determines Memory Address (along with other registers)
DS, ES commonly used

SP, Stack Pointer; BP, Base Pointer


Used to “point” to Data in Stack Structure (LIFO)
Used with SS
SS:SP or SS:BP are valid Segmented Addresses

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INSTRUCTION SET OF 8086
Classified into 7 categories
1] Data Transfer
2] Arithmetic
3] Logical
4] Control
5]Processor Control Instructions
6] String Manipulation
7] Interrupt Control

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Data Transfer Instructions
Note: Data Transfer Instructions do not affect any flags
1] MOV dest, src
Note that source and destination can not be memory
location. Also source and destination must be same
type.
2] PUSH Src: Copies word on stack.
3] POP dest: Copies word from stack into dest. Reg.
4] INacc, port : Copies 8 or 16 bit data from port to
accumulator. a) Fixed Port b) Variable Port
5] OUTport,acc

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Data Transfer Instructions Contd…
6] LESReg, Mem: Load register and extra segment
register with words from memory.
7] LDSReg,Mem: Load register and data segment
register with words from memory.
8] LEAReg,Src: load Effective address. (Offset is loaded
in specified register)
9] LAHF: Copy lower byte of flag register into AH
register.
10] SAHF: Copy AH register to lower byte of flag
register

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Data Transfer Instructions Contd…
11] XCHG dest, src: Exchange contains of source
and destination.
12] XLAT: Translate a byte in AL. This instruction
replaces the byte in AL with byte pointed by
[Link] point desired byte in look up table
instruction adds contains of BX with AL ( BX+
AL). Goes to this location and loads into AL.

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Arithmetic Instructions
1]ADD dest,src
2] ADC dest,src: Add with carry
3] AAA : ASCII adjust after addition. We can add
two ASCII numbers directly and use AAA after
addition so as to get result directly in BCD.
(Works with AL only)
4] DAA : Decimal adjust accumulator. ( Works
with AL only)
5] SUB dest, src
6] SBB dest, src: Subtract with borrow.
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Arithmetic Instructions Contd …
7] AAS: ASCII adjust for subtraction ( Same as AAA
and works with AL only)
8] DAS : Decimal adjust after Subtraction. (Works
with AL only)
9] MUL src
10 ] IMULsrc: Multiplication of signed byte.
11] AAM: BCD adjust after multiply. ( Works with
AL only)
12]DIV src
If any one attempts to divide by 0 , then ?
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Arithmetic Instructions Contd …
13] IDIV: Division of signed numbers
14]AAD: BCD to Binary convert before Division.
15] DEC dest
16] INCdest
17] CWD: Convert signed word to signed double
word.
18] CBW : Convert signed byte to signed word.
( CBW and CWD works only with AL,AX and DX
registers.)
• 19] NEG dest: Forms Twos complement.
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Logical Instructions
1] AND dest,src
2] NOT dest: Invert each bit in destination
3] OR dest, src
4] XOR dest, src
5] RCL dest, count : Rotate left through Carry If rotate once
count is directly specified in the instruction. For more no. of
rotations count is specified in CL register.
6] RCR dest, count : Rotate right through carry
7] ROL dest, count : Rotate left (into carry as well as into LSB)
8] ROR dest, count : Rotate left (into carry as wellas into MSB)

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Logical Instructions Contd…
9] SAL/ SHL dest, count : Shift left and put 0in LSB.
10] SAR dest,count : Shift right New MSB = Old MSB
11]SHR dest,count : Shift right .MSB is filled with 0’s.
12] TEST dest,src: AND logically,updates flags but
source and destare unchanged.
13] CMP dest,src
CF, ZF and SF are used Ex .CMP CX,BX
CF ZF SF
CX = BX 0 1 0
CX > BX 0 0 0
CX < BX 1 0 1

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Control transfer Instructions
1]CALL : Call a procedure - Two types of calls
i) Near Call ( Intrasegment)
ii) Far Call ( Intersegment)
2] RET : Return execution from procedure
3] JMP : Unconditional Jump to specified destination.
Two types near and Far
4] JA / JNBE: Jump if above / Jump if not below
• The terms above and below are used when we
refer to the magnitude of Unsigned number . Used
normally after CMP.
5]JAE / JNB / JNC
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Control Transfer Inst. Contd…
6] JB / JC / JNAE
7] JBE / JNA
8] JE/ JZ
9]JCXZ: Jump if CX is Zero.
10] JG / JNLE: Jump if Greater /Jump if not less than or
equal. The term greater than or less than is used in
connection with two signed numbers.
• 11] JGE / JNL:
• 12] JL / JNGE :
• 13] JLE / JNG :
• 14]JNE / JNZ :
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Control Transfer Inst. Contd…
15] JNO : Jump if no overflow
16] JNS :Jump if no sign
17] JS
18] JO
19] JNP / JPO
20] JP / JPE
In all above conditional instructions the
destination of jump is in the range of -128 to +
127 bytes from the address after jump.

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Control Transfer Inst. Contd…
21] LOOP: Loop to the specified label if CX not equal
to Zero. The count is loaded in CX reg. Every time
LOOP is executed then CX is automatically
decremented . ( Used in delay programs.)
22] LOOPE/ LOOPZ: Loop while CX not equal to zero
and ZF = 1.
23] LOOPNE / LOOPNZ: Loop while CX not equal to
zero and ZF = 0.
In all above LOOP instructions the destination of
jump is in the range of -128 to + 127 bytes from
the address after LOOP.
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Processor Control
1] CLC: Clear Carry flag.
2] STC : Set carry Flag
3] CMC : Complement Carry Flag
4] CLD: Clear Direction Flag.
5] STD: Set Direction Flag
6] CLI : Clear Interrupt Flag.
7] STI : Set Interrupt Flag.
8] HLT: Halt Processing.

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Processor Control Contd…

9] NOP : No Operation
10] ESC: Escape, Executed by Co-processors and
actions are performed according to 6 bit
coding in the instruction.
11] LOCK : Assert bus lock Signal, This is prefix
instruction.
12] WAIT :Wait for test or Interrupt Signal.
Assert wait states.

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String Control
1] MOVS/ MOVSB/ MOVSW : Dest string name, src
string name. This inst moves data byte or word
from location in DS to location in ES.
2] REP / REPE / REPZ / REPNE / REPNZ: Repeat
string instructions until specified conditions exsist.
This is prefix instruction.
3] CMPS / CMPSB / CMPSW: Compare string bytes
or string words.
4] SCAS / SCASB / SCASW: Scan a string byte or
string word. Compares byte in AL or word in AX.
String address is to be loaded in DI.
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String Control Contd…
5] STOS / STOSB / STOSW: Store byte or word in
a string. Copies a byte or word in AL or AX to
memory location pointed by DI.
6] LODS / LODSB /LODSW : Load a byte or word
in AL or AX Copies byte or word from memory
location pointed by SI into AL or AX register.

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Interrupt Control

• 1]INT type
• 2] INTO Interrupt on overflow
• 3] IRET Interrupt return

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Assembler Directives

1] ASSUME : Used to tell assembler the name of


logical segment. Ex. ASSUME CS: Code here
2] END
3] DB
4] DW
5] DD Define Double Word
6] DQ Define Quad Word
7] DT Define Ten Bytes
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Assembler Directive Contd..
8] PROC Procedure : PROC DELAY NEAR
9] ENDP
10] ENDS
11] EQU
12] EVEN: Align on even memory address.
13] ORG
14] OFFSET: Ex MOV BX,Offset of Data Here
15] PTR Pointer
16] LABEL : Ex AGAIN LABEL FAR
17] EXTRN: Tells the assembler that the names or labels
following this directive is in some other assembly module.

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Assembler Directive Contd..
18] PUBLIC : Links modules together
19] INCLUDE : Include source code from file.
20] NAME : To give specific name to module.
21] GROUP : Grouping of logical segments.
22] SEGMENT
23] SHORT : Operator that tells assembler about
short displacement.
24] TYPE : Type of variable whether byte or
word.
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Data Transfer
• IN AL,0C8H ;Input a byte from port 0C8H to
;AL
• IN AX, 34H ;Input a word from port 34H to
• AXA_TO_D EQU 4AH
• IN AX, A_TO_D ;Input a word from port ;4AH to AX
• MOV DX, 0FF78H ;Initialize DX point to port
• IN AL, DX ;Input a byte from a 8 bit port
;0FF78H to AL
• IN AX, DX ;Input a word from 16 bit port to
;0FF78H to AX.

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Arithmetic Instruction
• EXAMPLE:
• ADD AL,74H ;Add immediate number 74H
;to content of AL
• ADC CL,BL ;Add contents of BL plus
;carry status to contents of CL. ;Results in CL
• ADD DX, BX ;Add contents of BX to
;contents of DX
• ADD DX, [SI] ;Add word from memory at
;offset [SI] in DS to contents of DX

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Logical instruction
• OR op1, op2
• OR AH, CL ;CL ORed with AH, result in AH.
;CX = 00111110 10100101
• OR CX,FF00h ;OR CX with immediate FF00h
;result in CX = 1111111110100101
;Upper byte are all 1’s lower bytes
;are unchanged
• ;DX =F038h
• NOT DX ;after the instruction DX = 0FC7h
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Control transfer Instruction
• ;Direct within-segment - near
• CALL MULTO ;MULTO is the name ofthe
;procedure.

• ;Indirect within-segment -near


• CALL BX ; BX contains the offset of the first
instruction of the procedure .Replaces
contents of word of IP with contents o register
BX.

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Control transfer contd..

• ;Direct to another segment- far


• CALL SMART ;SMART is the name of the
;Procedure
• SMART PROC FAR ; Procedure must be
;declared as an far
• RET Instruction – Return execution from
procedure to calling program

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Program to multiply two 16bit binary no. & give 32 bit result
;ABSTRACT This program multiplies two 16bit words in
the memory locations called MULTIPLICAND and
MULTIPLIER. Result is stored in memory location ,
PRODUCT.
;REGISTERS : Uses CS, DS, AX, DX
DATA_HERE SEGMENT
MULTIPLICAND DW 204AH ; first word here
MULTIPLIER DW 3B2AH ; second word here
PRDUCT DW 2 DUP(0) ; Result of multiplication here
DATA_HERE ENDS

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Program Contd..
CODE_HERE SEGMENT
ASSUME CS:CODE_HERE, DS:DATA_HERE
START:MOV AX, DATA_HERE ;Initialize DS
MOV DS, AX ; register
MOV AX, MULTIPLICAND ; Get one word
MUL MULTIPLIER ; Multiply by 2nd word
MOV PRODUCT, AX ;Store low word of result
MOV PRODUCT+2, DX ; Store high word of result
INT 3 ; wait for command from user
CODE_HERE ENDS
END START
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JUMP, FLAGS and conditional Jumps
• 8086 fetches next instruction from some new
location
• JMP always causes a jump to occur
• Loads a new no. into IP register
• Sometimes CS is also loaded with new no.
• Direct or indirect jump, destination address
• Program should be relocatable

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Backward Jump
;ABSTRACT : This program illustrates a backward jump
;REGISTERS : Uses CS, AL
; PORTS : None
CODE SEGMENT
ASSUME CS:CODE
BACK: ADD AL, 03H
NOP
NOP
JMP BACK
CODE ENDS
END
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Forward Jump
;ABSTRACT : Program illustrates forward jump
;REGISTERS : Uses CS, AX
;PORS : None
CODE SEGMENT
ASSUME CS: CODE
JMP THERE
NOP
NOP
THERE: MOV AX, 0000H
NOP
ENDS
END
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8086 conditional flags
- Six conditional Flags: Carry Flag (CF), parity flag (PF),
auxiliary carry flag (AF), zero flag(ZF), sign flag(SF),
overflow flag(OF).
- Carry Flag is affected by ADD, SUB, AND , CMP
instructions

- CMP BX, CX
Condition CF ZF
CX > BX 1 0
CX<BX 0 0
CX=BX 0 1

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Conditional flags contd..
• AF: DAA, DAS instructions
• ZF: INC, DEC, CMP inst.
• OF:ADD

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Conditional Jump
• All conditional jump instructions are short-
type jumps.
• Destination address must be in the range -128
to +127
• Destination label must be in the same code
segment

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Conditional jump contd..
JE /JZ ZF = 1 Jump if Equal or Jump if Zero (=)
JNE/JNZ ZF = 0 Jump if Not Equal or Jump if Not
Zero
Signed Comparisons
JG ZF = 0 and SF = 0 Jump if Greater than ( > )
JGE SF = 0 Jump if Greater than or Equal ( >= )
JL SF = 1 Jump if Less than ( < )
JLE ZF = 1 or SF = 1 Jump if Less than or Equal ( <=)

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Conditional jump contd..
Unsigned Comparisons
JA ZF = 0 and CF = 0 Jump if Above ( > )
JAE CF = 0 Jump if Above or Equal ( >= )
JB CF = 1 Jump if Below ( < )
JBE ZF = 1 or CF = 1 Jump if Below or Equal ( <= )
Miscellaneous
JO OF = 1 Jump if Overflow, ditto for CF, SF &
PF
JNO OF = 0 Jump if No Overflow, ditto for CF, SF
& PF
JCXZ CX = 0 Jump if CX = 0
JECXZ ECX = 0 Jump if ECX = 0
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IF-THEN
If <condition> THEN CMP AX,BX
action JE THERE
…… ADD AX, 0020H
THERE: MOV CL, 20H
CMP AX, BX
JNE FIX
JMP THERE
FIX: ADD AX, 0020H
THERE: MOV CL, 07H
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IF-THEN-ELSE
READ TEMPERATURE
IF TEMPERATURE < 30 THEN
LIGHT YELLOW LAMP
ELSE
LIGHT GREEN LAMP
READ pH SENSOR

IF TEMPERATURE ≥ 30 THEN
LIGHT GREENLAMP
ELSE
LIGHT YELLOWLAMP
READ
SENSOR

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IF-THEN-ELSE contd…
;ABSTRACT : this program reads the temp, if temp < 30, a
yellow lamp is lit, if temp is ≥ 30, a green lamp is lit
;REGISTERS : CS, AL, DX
;PORTS : FFF8H – temp I/P, FFFAH – Control O/P

CODE SEGMENT
ASSUME CS: CORE
; intialize port FFFAH as O/P and FFF8H as I/P
MOV DX, 0FFFEH ; point DX to port control regs
MOV AL, 99H ; Load control word to initialize ports
OUT DX, AL ; send control word to port control regs

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IF-THEN-ELSE contd…
MOV DX, 0FFF8H ; point DX at I/P port
IN AL, DX ; read temp from sensor on I/P port
CMP AL, 30
JB YELLOW
JMP GREEN
YELLOW : MOV AL, 01H ; load code to light yellow
MOV DX, 0FFFAH ; point DX at O/P port
OUT DX, AL ; send code to light yellow lamp
JMP EXIT ; go to exit mainline instructions

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IF-THEN-ELSE contd…
GREEN: MOV AL, 02H ; load code to light green
MOV DX, 0FFFAH ; point DX at O/P port
OUT DX, AL ; send code to light green lamp
EXIT : MOV DX, 0FFFCH ; next mainline inst
IN AL, DX ; read pH sensor
CODE ENDS
END

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IF-THEN-ELSE contd…
ALGO (B)…..

CMP AL, 30 ; compare temp with 30


JAE GREEN ; if temp ≥ 30 then light green
JMP YELLOW ; ELSE light YELLOW
GREEN : MOV AL, 02H ; load code to light green
lamp
MOV DX, 0FFFAH ; point DX at O/P port
OUT DX, AL ; send code to light green
JMP EXIT ; go to next mainline instruction

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IF-THEN-ELSE contd…
YELLOW: MOV AL, 01H ; Load code to light
yellow
MOV DX, 0FFFAH ; point DX at O/P port
OUT DX, AL ; send code to light yellow
EXIT : MOV DX, 0FFFCH ; next mainline instruction
IN AL, DX ; Read pH sensor
CODE ENDS
END

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Think about

1. How high level language statements are


translated to 8086 instructions
2. How logical operations can be used to set and
clear bits
3. Execution/Implementation of IF-THEN, IF-
THEN-ELSE,REPEAT-UNTIL,LOOP,WHILE in
assembly language.

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