First Design
Key board
R L S
Second Design
A
Key board Third Design
B C D
A
C D
1 1 0
1 2 3
1 0 1
4 5 6
0 1 1
7 8 9
1 1 1
1 1 1
1 0 1
Contents:
Introduction
Block Diagram and Pin Description of the 8051
Registers
Memory mapping in 8051
Stack in the 8051
I/O Port Programming
Timer
Interrupt
Why do we need to learn
Microprocessors/controller
s?
The microprocessor is the core of
computer systems.
Nowadays many communication,
digital entertainment, portable
devices, are controlled by them.
A designer should know what types
of components he needs, ways to
reduce production costs and product
reliable.
Different aspects of a
microprocessor/controller
Hardware :Interface to the real world
Software :order how to deal with inputs
The necessary tools for a
microprocessor/controller
CPU: Central Processing Unit
I/O: Input /Output
Bus: Address bus & Data bus
Memory: RAM & ROM
Timer
Interrupt
Serial Port
Parallel Port
Microprocessors:
General-purpose microprocessor
CPU for Computers
No RAM, ROM, I/O on CPU chip itself
Example ： Intel’s x86, Motorola’s 680x0
Many chips on mother’s board
Data Bus
CPU
General-
Serial
Purpose RAM ROM I/O Timer COM
Micro- Port
Port
processor
Address Bus
General-Purpose Microprocessor System
Microcontroller :
A smaller computer
On-chip RAM, ROM, I/O ports...
Example ： Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and
PIC 16X
CPU RAM ROM
A single chip
Serial
I/O Timer COM
Port
Port
Microcontroller
Microprocessor vs. Microcontroller
Microcontroller
Microprocessor • CPU, RAM, ROM, I/O and
CPU is stand-alone, RAM, timer are all on a single chip
ROM, I/O, timer are • fix amount of on-chip ROM,
separate RAM, I/O ports
designer can decide on the
• for applications in which cost,
amount of ROM, RAM and power and space are critical
I/O ports. • single-purpose
expansive
versatility
general-purpose
Block Diagram
External interrupts
On-chip Timer/Counter
Interrupt ROM for
On-chip Timer 1 Counter
Control program
code RAM Timer 0 Inputs
CPU
Bus Serial
4 I/O Ports
OSC Control Port
P0 P1 P2 P3 TxD RxD
Address/Data
Pin Description of the 8051
P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0
P1.2 3 38 P
) 0.1(AD1)
P1.3 4 8051 37 P0.2(AD2
P
P1.4 5 36 ) 0.3(AD3)
P1.5 6 (8031) 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10 31 EA/VPP
(TXD)P3.1 11 30 ALE/PROG
(INT0)P3.2 12 29 PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14
(T1)P3.5 15 26 )P2.5(A13
(WR)P3.6 16 25 P
) 2.4(A12
(RD)P3.7 17 24 )P2.3(A11
XTAL2 18 23 P ) 2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)
Figure (b). Power-On RESET Circuit
Vcc
+
10 uF
31
EA/VPP
30 pF X1
19
11.0592 MHz
8.2 K
X2
18
30 pF
9 RST
Port 0 with Pull-Up Resistors
Vcc
10 K
P0.0
DS5000 P0.1
Port 0
P0.2
8751 P0.3
8951 P0.4
P0.5
P0.6
P0.7
Registers
A
R0
DPTR DPH DPL
R1
R2 PC PC
R3
R4 Some 8051 16-bit Register
R5
R6
R7
Some 8-bitt Registers of
the 8051
Stack in the 8051
7FH
The register used to access Scratch pad RAM
the stack is called SP
(stack pointer) register. 30H
2FH
Bit-Addressable RAM
The stack pointer in the 20H
8051 is only 8 bits wide,1FH Register Bank 3
which means that it can 18H
17H
take value 00 to FFH. 10H Register Bank 2
When 8051 powered up, 0FH08H
Stack) Register Bank 1)
the SP register contains 07H Register Bank 0
value 07. 00H
Timer:
:
Interrupt :
Numerical Bases Used
in Programming
Hexadecimal
Binary
BCD
Hexadecimal Basis
Hexadecimal Digits:
1 2 3 4 5 6 7 8 9 A B C D E
F
A=10
B=11
C=12
D=13
E=14
Decimal, Binary, BCD, &
Hexadecimal Numbers
(43)10=
(0100 0011)BCD=
( 0010 1011 )2 =
( 2 B )16
Register Addressing Mode
MOV Rn, A ;n=0,..,7
ADD A, Rn
MOV DPL, R6
MOV DPTR, A
MOV Rm, Rn
Direct Addressing Mode
Although the entire of 128 bytes of RAM can be
accessed using direct addressing mode, it is most often
used to access RAM loc. 30 – 7FH.
MOV R0, 40H
MOV 56H, A
MOV A, 4 ; ≡ MOV A, R4
MOV 6, 2 ; copy R2 to R6
; MOV R6,R2 is invalid !
Immediate Addressing Mode
MOV A,#65H
MOV R6,#65H
MOV DPTR,#2343H
MOV P1,#65H
SETB bit ; bit=1
CLR bit ; bit=0
SETB C ; CY=1
SETB P0.0 ;bit 0 from port 0 =1
SETB P3.7 ;bit 7 from port 3 =1
SETB ACC.2 ;bit 2 from ACCUMULATOR =1
SETB 05 ;set high D5 of RAM loc. 20h
Note:
CLR instruction is as same as SETB
i.e.:
CLR C ;CY=0
But following instruction is only for CLR:
CLR A ;A=0
DEC byte ;byte=byte-1
INC byte ;byte=byte+1
INC R7
DEC A
DEC 40H ; [40]=[40]-1
LOOP and JUMP Instructions
Conditional Jumps :
JZ Jump if A=0
JNZ Jump if A/=0
DJNZ Decrement and jump if A/=0
CJNE A,byte Jump if A/=byte
CJNE reg,#data Jump if byte/=#data
JC Jump if CY=1
JNC Jump if CY=0
JB Jump if bit=1
JNB Jump if bit=0
JBC Jump if bit=1 and clear bit
Call instruction
SETB P0.0
.
.
CALL UP
.
.
.
UP:CLR P0.0
.
.
RET