Digital Controller Systems

Controller Design Using Emulation

Daniel Abebe
October 31, 2025
AASTU
Department of Electromechanical Engineering

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Digital Control System
 Design Using Emulation

• Controller design is done as if the system is continuous.

• After selecting a sample period, a discrete equivalent is computed.
• The discrete controller is then simulated and tested.
• Elements of design by emulation:
• Continuous control design
• Techniques of computing discrete equivalents

r(t) e(t) e(k) u(k) u(t) y(t)

ADC C(k) DAC P lant
+
−

ym (t)
F eedback

Figure 1: Digital Control Architecture

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ADC Conversion and Sampling
 Analog-to-Digital (A/D) Conversion

• A/D converter converts a physical variable (e.g., voltage) into a

stream of numbers.
• The sample period T is the fixed period at which sampled values
arrive.
• Then the sampled signal is quantized,(Quantizing transforms a
continuous signal into a set of discrete states.)
• Quantization level Q is given by: Figure 2: Analog
to Digital
F SR
Q= Conversion
2n
where F SR is the Full Scale Range and n is the number of bits.
• Quantization error varies between 0 and ± 21 Q.

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 Mathematical Representation of Sampling

• The sampling operation is represented by impulse modulation:

∞
X
∗
c (t) = c(kT )δ(t − kT )
k=−∞

• The Laplace transform of the sampled signal:

∞
X
∗
C (s) = c(kT )e−kT s
k=0

• If we define eT s = z or s = 1
T ln z, then:
∞
X
C ∗ |s=(1/T ) ln z = c(kT )z −k
k=0

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 Sampling Theorem

• Sampling Theorem: If ωs = 2π T is greater than 2ω, where ω is the

highest-frequency component in r(t), then r(t) can be reconstructed completely
from r∗ (t).
• The frequency spectrum of the sampled signal:
∞
∗ 1 X
C (jω) = C(jω + jωs k)
T
k=−∞

• Aliasing occurs when a high-frequency component takes on the identity of a lower

frequency in the sampled signal.

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 Properties of C ∗ (jω)

• Property 1: C ∗ (jω) is periodic in ω, with period ωs :

C ∗ (jω + jωs k) = X ∗ (s)

• Property 2: If C(s) has a pole at s = s1 , then C ∗ (s) has poles at s = s1 + jωs k,

m ∈ Z.

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 Sampling Frequency for Control Systems

• The sample rate T1 depends on the closed-loop bandwidth of the system.

• A reasonable choice of T results in at least 6 samples in the closed-loop rise time.

Relation between sampling frequency and system natural frequency.

• Sampling frequency:
2π
ωs =
T
• Natural frequency:
1.8 1.8
ωn = =
tr 10T
• Therefore:
ωs
ωn ≈
35
• Sample rate ωs should be 35 times faster than ωn .
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 Effect of Sampling

• The most important impact of implementing a control system digitally is the delay
associated with the hold.
• A delay in any feedback system degrades the stability and damping of the system.
• The continuous value u(t) consists of steps that lag u(kT ) by T .
• The delay can be approximated by the method of Pade:
Ts
1− 2
Gd (s) = Ts
1+ 2

• Delay introduces instability.

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 Numerical Differentiation

1. Forward Difference (Explicit Euler)

de e[k + 1] − e[k]
≈
dt t=kT T

• Uses future sample (e[k + 1])

• Transfer function: s → z−1
T
• Pros: Simple to implement
• Cons: Can be unstable (predictive)

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Digital Controller Design Via
Emulation
 Numerical Differentiation

2. Backward Difference (Implicit Euler)

de e[k] − e[k − 1]
≈
dt t=kT T

• Uses past sample (e[k − 1])

• Transfer function: s → z−1
Tz
• Pros: Always stable
• Cons: Introduces phase lag

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 Numerical Differentiation

3. Central Difference

de e[k + 1] − e[k − 1]
≈
dt t=kT 2T

• Averages past and future samples

• Transfer function: s → z 2 −1
2T z
• Pros: 2nd-order accurate (error ∼ O(T 2 ))
• Cons: Non-causal (requires future samples)

Implementation Note
• Backward difference is most common in real-time systems (causal)
• Noise amplification can occur - consider filtering derivatives

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 t
Numerical Integration Rules forI Discretization
= e(t)dt
0

ng only the discrete values e(0), e(1), · · ·, e(tk−1 ), e(tk ). We assume that we have an approx
n for the integral from zero to the time tk−1 and we call it uk−1 . The problem is to obta
m information given above.

e e e

k−1 k k−1 k k−1 k

(a) (b) Integration
Figure 3: Numerical (c)

ure 2.1: Plot of a function approximation to the area under the curve over a single time int

e area under
Controller e between
Design Using Emulation time tk−1 and tk in Figure 2.1 (a) can be approximated
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trape
 Numerical Integration

1. Forward Rectangular (Euler’s Method)

•
• Forward: Uses the current sample value to approximate the integral.
Z kT
e(t) dt ≈ T · e((k − 1)T )
(k−1)T

• s-to-z Mapping:

z−1
s→
T
• Properties:
• Simple but can be unstable for large T
• Overestimates integral for rising signals

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 Numerical Integration

2. Backward Rectangular Rule

• Backward: Uses the next sample value (backward-looking).
Z kT
e(t) dt ≈ T · e(kT )
(k−1)T

• s-to-z Mapping:

z−1
s→
Tz
• Properties:
• Always stable but introduces phase lag
• Underestimates integral for rising signals

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 Numerical Integration

3. Trapezoidal (Tustin/Bilinear) Rule

• Approach: Averages current and next samples.
Z kT
T
e(t) dt ≈ [e((k − 1)T ) + e(kT )]
(k−1)T 2

• s-to-z Mapping:

2 z−1
s→
T z+1
• Properties:
• Preserves stability but warps frequencies
• Most accurate for smooth signals

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 Comparison of Integration Methods

• The effect of each method is to approximate the Laplace transfer function H(s)
by substituting s with a discrete approximation.

Summary of approximations
Method Approximation
Forward rule s ← z−1
T
Backward rule s ← z−1
Tz
Trapezoid rule s ← T2 z−1
z+1

Excercise
Test the case for
a
C(s) =
s+a

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 Stability and Prewarping

• Mapping s = jω (stability
boundary) for different rules:
1. Forward rectangular rule:
z−1
s= , z = 1 + T jω
T
2. Backward rectangular rule:
z−1 1
s= , z=
Tz 1 − T jω
3. Bilinear rule:
 
2 z−1 2 + T jω
s= , z=
T z+1 2 − T jω

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 Stability of Mapping

• Forward rectangular rule may map a stable C(s) into an unstable C(z).
• Backward rectangular rule always maintains stability but poorly maps frequency
response at high frequencies.
• Bilinear/Tustin rule maps stability exactly:
• jω-axis in s-plane maps to the unit circle in z-plane.
• Frequency compression/warping occurs.

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 Frequency Warping in Bilinear Transform

Frequency Wrappig: is compresses high frequencies when converting an analog

frequency to a digital one.
For bilinear/Tustin rule the relation between analog and digital frequency is::

H(z) = H(s)
z−1
s= T2 z+1

For z = ejωz T :


H ejωz T = H(s)
ejωz T −1
s= T2
ejωz T +1

= H(s)   = H(s)
ejωz T /2 −e−jωz T /2
s= T2 s=j T2 tan( ωz2T )
ejωz T /2 +e−jωz T /2

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 Frequency Relationship

Therefore, the frequency relationship is:

 
2 ωz T
ωs = tan
T 2
 
2 −1 ωs T
ωz = tan
T 2
Frequency Prewarping Concept Near ωz = 0, ωs ≈ ωz , but frequencies do not
match elsewhere.

If C(s) is designed for a certain bandwidth, that bandwidth will be warped in C(z).
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 Pre-warping Design Method

pre-warping: is a process used to compensate, where the original analog filter’s

specifications are adjusted to account for the warping effect.

1. Desired controller bandwidth: ωz1

2. Pre-warp design specification:
 
2 ωz 1 T
ωs1 = tan
T 2

3. Design C(s) for bandwidth ωs1

4. Convert C(s) → C(z) via bilinear transform
5. Resulting bandwidth: ωz1

Note: ωz1 can be any critical frequency (not necessarily bandwidth).

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 Alternative: Modified Bilinear Transform

Force the warped frequency axis to match at a desired frequency:

z−1
s=α
z+1

H(z) = H(s) s=α z−1

z+1

H(ejωz T ) = H(s)
s=jα tan( ωz2T )

Then:
 
ωz T
ωs = α tan
2

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 Alternative: Modified Bilinear Transform: Cont.

Choosing α for Frequency Matching

Let:
ω1
α=
tan(ω1 T /2)

At frequency ωz = ω1 :
ω1
ωs = tan(ω1 T /2) = ω1
tan(ω1 T /2)

Perfect match!
But we can only match at one frequency.

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 Zero-Pole Matching Equivalents

• A simple method to obtain a discrete equivalent to a continuous transfer function

is zero-pole matching.

Rules for zero-pole matching

1. Map poles of C(s) at s = a to z = eaT .
2. Map finite zeros of C(s) at s = a to z = eaT .
3. Map zeros at s = ∞ to z = −1 or z = ∞ (depending on delay requirements).
4. Match the gain of C(s) at s = 0 to Czp (z) at z = 1.

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 Zero-Order Hold Equivalent

• The hold operation extrapolates impulses to a piecewise constant signal:

C(t) = C(kT ), kT ≤ t < kT + T
• The transfer function of the zero-order hold:
1 − e−T s
C(s) = C(s)
s
• The zero-order hold equivalent to C(s) is given by:
 
−1 C(s)
C(z) = (1 − z )Z
s

Figure 4: Sample Hold Circuit

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 Matlab Implementation

MATLAB Commands
• Bi-Linear Transformation

SY SD = c2d(SY S, T s,′ tustin′ )

• Pole Zero Matching

SY SD = c2d(SY S, T s,′ matched′ )

• Zero Order Hold

SY SD = c2d(SY S, T s,′ zoh′ )

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 Example 1: Design by Emulation

• Emulation techniques approximate an open-loop system D(s) with D(z).

• When D(z) is placed in a feedback loop, the performance is affected by the T /2
second delay in the ZOH.
• Example system:

1
G(s) =
s(10s + 1)
• Design specifications:
• Mp < 16%.
• ts < 10 seconds to 1%.
• ess for ramp input < 0.01, slope of ramp = 0.01.
• Sampling time to give ≥ 10 samples in rise time.

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 Recap of Time Domain Specifications

• Key parameters:
• Rise time, tr
• Settling time, ts
• Percent overshoot, Mp
• Steady-state error, ess
• Guidelines for second-order systems:
• Natural frequency: ωn ≥ 1.8/tr
• Real part of the pole: |Re{si }| = σ = ζωn ≥ 4.6/ts
• Maximum overshoot: ζ ≈ 0.6(1 − Mp )

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 Step 1: Design D(s)

• Choose D(s) to cancel plant pole approximately:

10s + 1
D(s) =
s+1
• Pole locations:

ωn ≈ 1, tr ≈ 1.8 sec

• Sampling time:

tr
T = = 0.18 ⇒ T = 0.2
10

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 Step 2: Convert D(s) to D(z)

• Use pole-zero matching:

• Zero at z = e−0.17 .
• Pole at z = e−T .
• DC-gain of 1.
• Transfer function:
(z − 0.9802)
D(z) = 9.15
(z − 0.8187)
• For T = 1 sec:
(z − 0.9048)
D(z) = 6.64
(z − 0.3679)

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 Controller Implementation

• Given the transfer function:

1 − 0.9802z −1
D(z) = 9.15
1 − 0.8187z −1
• Convert to a difference equation:

(1 − 0.8187z −1 )U (z) = 9.15(1 − 0.9802z −1 )E(z)

• The corresponding difference equation is:

u(k) = 0.8187u(k − 1) + 9.15(e(k) − 0.9802e(k − 1))

• This equation can be directly implemented in a computer.

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Digital to Analog Conversion/Data
Reconstruction
 Digital-to-Analog Conversion (DAC)

• Converts digital control signals (from a microcontroller/computer) into analog

signals for actuators.
• Achieved by sample-hold circuit, holding the samples until the next sampled value.

Figure 5: Sample Hold Circuit

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 Zero-Order Hold (ZOH)

• The hold operation extrapolates impulses to a piecewise constant signal:

Gh (t) = G(kT ), kT ≤ t < kT + T

• The transfer function of the zero-order hold:

1 − e−T s
Gh (s) =
s
• If the sampling frequency is sufficiently high, the amplitude characteristics of the
continuous-time signal are preserved.

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 PID Control via Emulation

PID controller Continuous vs Digital

• PID controller in continuous time:
 Z t 
1
u(t) = K e(t) + e(τ ) dτ + TD ė(t)
TI 0
• Convert to discrete-time using forward rectangular rule:
    
T TD 2TD TD
u[k] = u[k − 1] + K 1+ + e[k] − 1 + e[k − 1] + e[k − 2]
TI T T T

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