Assignment1

1. Minimise the expression f(w,x,y,z)=xyz’+x’yz+xyz+x’yz’ using Boolean Algebra

2. Convert the number (294.675)10 to hexadecimal.
3. Carry out the following operation (110010-100111) using 1’s complement
notation
4. Implement with Two –level NOR gate circuit F (w, x, y, z) = Σ (5, 6, 9, 10)
5. Express the following in its canonical form. f(A,B,C)= AB+ A'C+ AB'C.
6. What is the binary number system?
7. State the De Morgan's Theorem?
8. Define Digital System?
9. What is Boolean Algebra and write its laws?
10. What are Standard and Canonical forms? Explain with suitable example.
11. What are the various logic gates, give the representation along with the truth
table?
12. Derive the product of maxterms for f(a,b,c,d)=a.b.c+ b′.d+c.d′.
13. Obtain the simplified expression in SOP form of
F(a,b,c,d,e)=∑(1,2,4,7,12,14,15,24,27,29,30,31)using K-maps.
14. Derive and Implement Exclusive OR function involving three variables using
a) only NAND function b) only NOR Function
15. Obtain the simplified expression in product of sums and sum of products.
F(A,B,C,D) = π(0,1,2,3,4,10,11)
16. Which gates can be used as inverters in addition to the NOT gate and how?
Explain and justify your answer
17. Explain the operation of the different types of logic gates with their truth
table.
18. Simplify the following Boolean expressions, using four-variable maps:
A’B’C’D’ + BC’D + A’C’D + A’BCD + ACD’
19. Universal Logic Gates
20. Number System
21. X-OR operation using AOI logic
22. Don’t care conditions
23. Floating point number representation
24. Dataflow Vs Gate-level Modelling
25. Blocking Statement
26. Gate level Modelling
27. Structural Modelling
28. Behavioral Modelling
29. Data flow Modelling
Assignment 2

1. Design a EXOR gate using NAND logic?

2. Convert the binary number 11011 to its equivalent Gray.
3. What is meant by a bit?
4. What is the best Example of Digital system?
5. How many types of number system are there?
6. Write down the Characteristics of Digital ICs?
7. What are the advantages and disadvantages of the K-Map Method?
8. Write the definition of the Duality Theorem?
9. Subtract 43 from 32 using 2’s complement.
10. Convert (153.513)10 to octal number
11. Design a 3 to 8 line decoder using two 2 to 4 line decoder with enable input.
12. Simplify the following Boolean Expression using KMAP and implement it
using NAND Gates only f(w,x,y,z) = Σm(0,2,4,5,6,7,8,10,13,15)
13. Simplify the following Boolean Expression using KMAP and implement it
using NOR Gates only f(w,x,y,z) = Σm(0,2,4,5,6,7,8,10,13,15)
14. Simplify the following function to (1) Sum-of-Products (2) Product-of Sums
F(A,B,C,D)=ACD’+C’D+AB’+ABCD
15. Implement the following Boolean function using two Level form using OR-
AND-INVERT f(w,x,y,z) = Σm(0,4,8,9,10,11,12,14)
16. Implement the following Boolean function using two Level form using AND-
OR-INVERT f(w,x,y,z) = Σm(0,4,8,9,10,11,12,14)
17. Simplify the function f(ABCD) = Σm(0,1,2,3,8,9,10) and d(ABCD)= Σm(6,11)
using KMAP and implement by using i) only NAND and ii) only NOR
18. Obtain the simplified expression in sum of products for the following
Boolean function. F(A,B,C,D) = ∑(2,3,12,13,14,15)
19. Design a 3-Bit Gray to Binary Code Converter.
20. Differentiate between a MUX and DEMUX.
21. Minterms and Maxterms
22. SOP and POS expressions
23. 4:1 Multiplexer
24. 1:4 Demultiplexer
25. Magnitude Comparator
26. Computer aided design technology.
27. FPGA
28. FPGA Design flow
29. RTL Synthesis
30. STA
Assignment 3

1. Design an 8:1 Mux using two 4:1 MUX and a 2:1 MUX? Use Block diagrams
2. What is Demultiplexer? Draw the circuit diagram of 1:4 Demultiplexer?
3. Write the difference between Latch and Flip-Flop?
4. Why is multiplexer called a data selector and demultiplexer as distributor?
5. Draw state diagram demonstrating Melay FSM model?
6. Draw state diagram demonstrating Moore FSM model?
7. Draw the Circuit diagram of 4 bit Johnson Counter and Write its state table?
8. Explain how Moore FSM is different from Melay FSM model?
9. Write the difference between synchronous and Asynchronous Sequential
logic?
10. Implement the function f(a,b,c)=π(0,1,3,4) using NAND-NAND two level gate
structure.
11. Design a 4 Bit Binary Adder-Subtractor Circuit?
12. Design Following Multiplier Circuits i. 2×2 Multiplier , ii. 3×2 Multiplier
13. What is the limitation of ripple carry adder? Suggest a design to overcome
the limitation of this adder?
14. Design a circuit for 2-bit binary multiplier.
15. Implement 4*16 decoder using two 3*8 decoders.
16. What is Shift register? Explain the principle of different shift Register
available? With neat Circuit diagram and Timing diagram explain the
operation of Serial in Serial Out Shift Register in detail.
17. What is Shift register? With neat Circuit diagram and Timing wave form
explain the operation of Parallel in and Serial out shift register?
18. Explain how Asynchronous counter is different from Synchronous counter?
Design a 3-Bit Asynchronous UP Counter and explain the operation in detail
with its Timing diagram?
19. What is a master slave flip-flop? Draw and explain the logic diagram of
master slave D flip-flop using NAND gates.
20. Write a Verilog code to implement a Full adder circuit using 2 Half Adder?
Draw the Schematic diagram of the Design?
21. Full Adder implementation using Decoder
22. 4 bit Parallel Adder
23. 3 bit Binary to Gray Code Converter
24. Encoder Vs Decoder
25. Full adder using half adder
26. Combinational Logic Circuits
27. Mater Slave JK Flip Flop
28. D Filp Flop
Assignment 4

1. Draw the Circuit diagram of 4 bit Ring Counter and Write its state table?
2. Write the Excitation table of D Flip-Flop and T Flip-Flop?
3. Write the Excitation table of S-R and J-K Flip-Flop?
4. Why both “S” and “R” inputs and a SR latch should never be “1”
simultaneously.
5. What is called as characteristic equation? Write the characteristic equation
for S-R and D Flip-flop?
6. What will happen if the frequency of the clock signal connected to a F/F is
increased to a very high value or decrease to a very low value.
7. What do you understand by a sequential circuit?
8. The output frequency of a mod-12 counter is 6kHz. Find its input frequency?
9. Write the names of primitive gates used in Gate level modelling?
10. What is Procedural assignment in Behavioural modelling?
11. What is Encoder? Design a 4:2 Encoder? Write the limitation of Encoder?
Design a Circuit that will resolve the limitation of Basic encoder circuits?
12. What is a Multiplexer? Design a Full Subtractor Circuit using 4:1
Multiplexers?
13. Implement the Function f(ABCD) = Σm(0,1,2,3,8,9,10,12, 14,15) using a 8:1
Multiplexer?
14. Design a BCD Adder Circuit and explain the operation?
15. What is Decoder? Draw the Circuit diagram of 2:4 Decoder? Design a Full
Adder Circuit using a suitable Decoder?
16. Design a Sequence detector that will detect three or more consecutive 1’s
coming through input line using Moore FSM model? Choose D-Flip-flop for
your design.
17. What is FSM Model? Differentiate between Mealy and Moore FSM model?
Design a Melay based FSM to detect the pattern “1101” coming through
input line?
18. Design a state diagram for a 3-bit down counter. Derive its state table and
draw its logic circuit diagram.
19. Design a state diagram for a 3-bit up counter. Derive its state table and draw
its logic circuit diagram.
20. Draw the Circuit diagram of J-K Flip-flop? Write the Verilog code to
implement the design?
21. Draw the Circuit Diagram of 4 Bit Ripple carry adder? Write a Verilog code for
the design using structural programming? Write the Test bench code for the
Main module for Verification.
22. Ring Counter
23. 3 Bit Ripple Counter
24. BCD Counter
25. Johnson’s Counter
26. Ripple Counter
27. Asynchronous Counter
28. Shift Register
29. Racing and toggling action in flip-flops
30. Race-around condition
Assignment 5

1. If A=101101 and B=110110, out1=A&B, out2=A&&B. then what is the data

stored in out1 and out2?
2. If A=101101 and B=110110, out1=A^B, out2=A|B. then what is the data stored
in out1 and out2?
3. Write Dataflow modelling Verilog program for Full Subtractor?
4. Write the difference between Continuous assignment and Procedural
assignment in Verilog modelling?
5. Define Fan-in and Fan-out?
6. Write the input files required and output files generated from synthesis
process?
7. Write the Name of different path that is used for Delay calculation in STA?
8. What is synthesis process in FPGA Design?
9. Define Rise Time?
10. What are the applications of Buffer?
11. What is static timing Analysis?
12. Design a 4:2 Priority encoder? Write the behavioural Verilog modelling for
the design?
13. Design a synchronous up-counting decade counter using negative
edgetriggered T flip flop.
14. What are the different types of shift register? The content of a 4-bit shift
register is 1010. If the register is shifted 8 times to the right with a serial input
11010010. Explain its operation by showing the content of the register after
each shift.
15. Design a Synchronous Sequential circuit using following State Diagram. Use
D-Flip flop for the FSM design.
16. Design a Synchronous Sequential circuit using following State Diagram. Use
T-Flip-flop for the FSM design?
17. What is [Link].? Draw the FPGA Design flow diagram and Explain each and
every steps of the flow diagram? Illustrate example in different steps
wherever necessary?
18. What is HDL programming? Explain different types of Verilog Modelling?
Demonstrate each modelling with suitable Verilog Program?
19. Explain Serial In Serial Out and Parallel in parallel out Shift Register with
neat diagram.
20. Wrie a Verilog Program and Test Bench Code for full Substractor.
21. Wrie a Verilog Program and Test Bench Code for 4 bit counter.
22. Parallel in Parallel Out Shift Register
23. Serial in Serial Out Shift Register
24. Lockout Problem
25. MOD -10 ripple counter