Computer Organization and Architecture

Designing for Performance

11th Edition

Chapter 11
Computer Arithmetic

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Arithmetic & Logic Unit (ALU)
• Part of the computer that actually performs arithmetic
and logical operations on data
• All of the other elements of the computer system are
there mainly to bring data into the ALU for it to process
and then to take the results back out
• Based on the use of simple digital logic devices that can
store binary digits and perform simple Boolean logic
operations

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Figure 11.1
ALU Inputs and Outputs

Control
Signals Flags

ALU
Operand Result
Registers Registers

Figure 11.1 ALU Inputs and Outputs

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Integer Representation
• In the binary number system arbitrary numbers can be
represented with:
– The digits zero and one
– The minus sign (for negative numbers)
– The period, or radix point (for numbers with a fractional
component)

• For purposes of computer storage and processing we do

not have the benefit of special symbols for the minus sign
and radix point

• Only binary digits (0,1) may be used to represent

numbers
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Sign-Magnitude Representation
There are several alternative • All of these alternatives involve treating the
conventions used to represent most significant (leftmost) bit in the word as
a sign bit
negative as well as positive • If the sign bit is 0 the number is positive
integers • If the sign bit is 1 the number is negative

Sign-magnitude representation
is the simplest form that
employs a sign bit

• Addition and subtraction require a

consideration of both the signs of the
Drawbacks: numbers and their relative magnitudes to
carry out the required operation
• There are two representations of 0

Because of these drawbacks,

sign-magnitude representation
is rarely used in implementing
the integer portion of the ALU

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Table 11.1
Characteristics of Twos Complement
Representation and Arithmetic
Range -2n-1 through 2n-1 - 1
Number of Representations
One
of Zero
Take the Boolean complement of each bit of the corresponding
Negation positive number, then add 1 to the resulting bit pattern viewed
as an unsigned integer.
Add additional bit positions to the left and fill in with the value
Expansion of Bit Length
of the original sign bit.
If two numbers with the same sign (both positive or both nega-
Overflow Rule tive) are added, then overflow occurs if and only if the result has
the opposite sign.
To subtract B from A, take the twos complement of B and add
Subtraction Rule
it to A.

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Table 11.2
Alternative Representations for 4-Bit Integers
Biased
Decimal Sign-Magnitude Twos Complement
Representation
Representation Representation Representation
(B+7)
+8 – – 1111
+7 0111 0111 1110
+6 0110 0110 1101
+5 0101 0101 1100
+4 0100 0100 1011
+3 0011 0011 1010
+2 0010 0010 1001
+1 0001 0001 1000
–0 0000 0000 0111
+0 1000 – –
–1 1001 1111 0110
–2 1010 1110 0101
–3 1011 1101 0100
–4 1100 1100 0011
–5 1101 1011 0010
–6 1110 1010 0001
–7 1111 1001 0000
–8 – 1000 –
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Hexadecimal Notation 1/2
• Binary digits are grouped into sets of four bits, called a nibble
• Each possible combination of four binary digits is given a symbol, as
follows:
0000 = 0 0100 = 4 1000 = 8 1100 = C
0001 = 1 0101 = 5 1001 = 9 1101 = D
0010 = 2 0110 = 6 1010 = A 1110 = E
0011 = 3 0111 = 7 1011 = B 1111 = F
• Because 16 symbols are used, the notation is called hexadecimal and
the 16 symbols are the hexadecimal digits
• Thus
2C16 = (216 * 161) + (C16 * 160)
= (210 * 161) + (1210 * 160) = 44

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 Complement of Numbers
Two types of complements for base R number system: R's complement
and (R-1)'s complement

(R-1)’s Complement
Subtract each digit of a number from (R-1) 9 9 9
- 8 3 5
Example
9's complement of 83510 : 16410 1 6 4
1's complement of 10102 : 01012 (bit by bit complement operation)
1 1 1 1
(R)’s Complement - 1 0 1 0
Add 1 to the low order digit of its (R-1)’s complement 0 1 0 1
1 1 1 1 9 9 9
Example
10's complement of 83510 : 16410 + 1 = 16510 - 1 0 1 0 - 8 3 5
2's complement of 10102 : 01012 + 1 = 01102 0 1 0 1 1 6 4
+ 1 + 1
0 1 1 0 1 6 5
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Signed Numbers

Binary Fixed-Point Representation

X = xnxn-1xn-2 ... x1x0. x-1x-2 ... x-m

Sign Bit (xn) : 0 for positive, 1 for negative

Remaining Bits (xn-1xn-2 ... x1x0. x-1x-2 ... x-m)

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 Signed Numbers Positive
• Need to be able to represent both positive and 0001001
negative numbers
• three representations:
Signed magnitude representation Negative
Signed 1’s Complement representation
Signed 2’s Complement representation 1001001
1 1 1 1 1 1 1
• Example: Represent +9 and -9 in 7 bit-binary
- 0 0 0 1 0 0 1
number
Only one way to represent +9 ==> 0 001001 1 1 1 0 1 1 0
• Three different ways to represent -9 : + 1
• In signed-magnitude: 1 001001 1 1 1 0 1 1 1
• In signed-1's complement: 1 110110
• In signed-2's complement: 1 110111 1 1 1 1 1 1 1
• In general, fixed point numbers are represented - 0 0 0 1 0 0 1
either integer part only or fractional part only. 1 1 1 0 1 1 0
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Characteristics of 3 Different Representations
Complement

• Signed magnitude: Complement only the sign bit

• Signed 1's complement: Complement all the bits including sign bit

• Signed 2's complement: Take the 2's complement of the number,

including its sign bit.

Maximum, Minimum, Zero:

X = xn xn-1 ... x0 . x-1 ... x-m

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 Arithmetic Addition: Signed Magnitude
[1] Compare their signs (-6) + 9
[2] If two signs are same, add the two 9 1 0 0 1
magnitudes. Look out for an overflow
[3] If not same, compare the relative magnitudes - 6 0 1 1 0
of the numbers and then subtract the smaller 3 0 0 1 1
from the larger need a subtractor to add
[4] Determine the sign of the result ➜ 0 0 0 1 1

6+9 6 + (-9) (-6) + (-9)

6 0 1 1 0 9 1 0 0 1 6 0 1 1 0
+ 9 1 0 0 1 - 6 0 1 1 0 +9 1 0 0 1
15 1 1 1 1 3 0 0 1 1 15 1 1 1 1

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Arithmetic Addition: Signed Magnitude
Special Cases

9+9 (-9) + (-9)

9 1 0 0 1 9 1 0 0 1
+ 9 1 0 0 1 + 9 1 0 0 1
18 1 0 0 1 0 18 1 0 0 1 0
➜ ➜

Overflow

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Arithmetic Addition: Signed 1’s Complement
[1] Add the two numbers, including their sign bits
[2] If there is a carry out of the most significant (sign) bit, then
increment the result by 1 and discard the carry. Overflow when?
cn-1  cn =1
(-6) + 9 (-9) + (-9)
-9 1 0 1 1 0
- 6 1 1 0 0 1 + -9 1 0 1 1 0
+ 9 0 1 0 0 1 (1)
(1)0 (1) 0 0 1 0 (0) 1 1 0 0
0
1 1
3 0 0 0 1 1 -
0 1 1 0 1
18 Overflow
6 + (-9) 9+9
6 0 0 1 1 0 9 0 1 0 0 1
+ -9 1 0 1 1 0 + 9 0 1 0 0 1
-3 1 1 1 0 0 1 (1)0 0 1 0

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Arithmetic Addition: Signed 2’s Complement
•[1] Add the two numbers, including their sign bit Discard any carry
out of leftmost (sign) bit
•Look out for an overflow
6+9 6 + (-9) (-6) + 9
6 0 0 1 1 0 6 0 0 1 1 0 -6 1 1 0 1 0
+ 9 0 1 0 0 1 + -9 1 0 1 1 1 + 9 0 1 0 0 1
15 0 1 1 1 1 -3 1 1 1 0 1 3 0 0 0 1 1

Overflow when? : 2 operands have the same sign and the result
sign changes --> xnyns’n + x’ny’nsn --> cn-1  cn
-9 1 0 1 1 1 9 0 1 0 0 1
+ -9 1 0 1 1 1 + 9 0 1 0 0 1
-18 0 1 1 1 0 18 1 0 0 1 0

(-9) + (-9) 9+9

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Other Decimal Codes
1st bit as it is and then 3 XOR from Binary (MSB to LSB) to Grey

0 00 000 0000
1 01 001 0001
Gray Code
11 011 0011
10 010 0010
110 0110
111 0111
101 0101
100 0100
1100
1101
1111
1110
1010
- The Gray code has a reflection property
1011
- Easy to construct a table without calculation
- for any n : reflect case n-1 about a miror t its 1001
bottom and prefix 0 and 1 to top and bottom 1000
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Other Decimal Codes … Cont…

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Examples Decimal Codes-3
Convert the following into Excess-3 and convert its sum to 4-bit Binary.
1- (58.43)10
The decimal number is: 5 8 4 3
Add 3 to each bit +3 +3 +3 +3
Sum 8 11 7 6
4-Bit Binary 1000 1011 0111 0110

Hence, the Excess-3 code for (58.43)10 = 10001011.01110110

Convert the following into Gray code.

2- (1101011)2
1101011
      
1 0 1 1 1 1 0

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 In-Class Activity
Convert the following into Excess-3 and convert its sum to 4-bit
Binary.
(567)10
(789.456)10

Convert the following into Gray code and Binary.

(1101011)2
(11011011)g

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Figure 11.2
Use of a Value Box for Conversion between
Twos Complement Binary and Decimal
–128 64 32 16 8 4 2 1

(a) An eight-position two's complement value box

–128 64 32 16 8 4 2 1
1 0 0 0 0 0 1 1
–128 +2 +1 = –125

(b) Convert binary 10000011 to decimal

–128 64 32 16 8 4 2 1
1 0 0 0 1 0 0 0
–120 = –128 +8

(c) Convert decimal –120 to binary

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Figure 11.2 Use of a Value Box for Conversion
Range Extension
• Range of numbers that can be expressed is extended by
increasing the bit length

• In sign-magnitude notation this is accomplished by moving

the sign bit to the new leftmost position and fill in with zeros

• This procedure will not work for twos complement negative

integers
– Rule is to move the sign bit to the new leftmost position and fill in
with copies of the sign bit
– For positive numbers, fill in with zeros, and for negative numbers, fill
in with ones
– This is called sign extension

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Fixed-Point Representation

Programmer can use the

same representation for
The radix point (binary
binary fractions by scaling
point) is fixed and assumed
the numbers so that the
to be to the right of the
binary point is implicitly
rightmost digit
positioned at some other
location

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 Floating Point Number Representation
• With a fixed-point notation it is possible to represent a range of
positive and negative integers centered on or near 0

• By assuming a fixed binary or radix point, this format allows the

representation of numbers with a fractional component as well

• Limitations:

• Very large numbers cannot be represented nor can very small

fractions

• The fractional part of the quotient in a division of two large

numbers could be lost

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Comparison between Fixed and Floating points
No. Fixed-Point Floating-Point
1 represent and manipulate represent and manipulate
integers for + and - rational/reasonable numbers
2 Numbers up to 16 bits Numbers up to 32 bits
(65,536) possible bit (4,294,967,296) possible bit patterns
patterns (216). (232).
3 Not wider range of values Much wider range of values
4 Not able to represent very Able to represent very small and very
small and very large large numbers
numbers
5 The gaps between The gaps between adjacent numbers
adjacent numbers always are approximately ten million times
equal one for small and large numbers
6 Ex.: 123.45, 1234.56, Ex.: 1.234567, 123456.7,
12345.67, etc 0.00001234567, 1234567000000000
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Negation
• Twos complement operation
– Take the Boolean complement of each bit of the integer (including
the sign bit)
– Treating the result as an unsigned binary integer, add 1
+18 = 00010010 (twos complement)
bitwise complement = 11101101
+ 1
11101110 = -18

• The negative of the negative of that number is itself:

-18 = 11101110 (twos complement)
bitwise complement = 00010001
+ 1
00010010 = +18

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Negation Special Case 1

0 = 00000000 (twos complement)

Bitwise complement = 11111111
Add 1 to LSB + 1
Result 100000000

Overflow is ignored, so:

-0=0

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Negation Special Case 2

-128 = 10000000 (twos complement)

Bitwise complement = 01111111
Add 1 to LSB + 1
Result 10000000
So:
-(-128) = -128 X
Monitor MSB (sign bit)
It should change during negation

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Figure 11.3
Addition of Numbers in Twos Complement
Representation
1001 = –7 1100 = –4
+0101 = 5 +0100 = 4
1110 = –2 10000 = 0
(a) (–7) + (+5) (b) (–4) + (+4)

0011 = 3 1100 = –4
+0100 = 4 +1111 = –1
0111 = 7 11011 = –5
(c) (+3) + (+4) (d) (–4) + (–1)

0101 = 5 1001 = –7
+0100 = 4 +1010 = –6
1001 = Overflow 10011 = Overflow
(e) (+5) + (+4) (f) (–7) + (–6)
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Subtraction Rule

To subtract one number (subtrahend)

from another (minuend), take the twos
complement (negation) of the subtrahend
and add it to the minuend.

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Figure 11.4: Subtraction of Numbers in Twos
Complement Representation (M − S)
0010 = 2 0101 = 5
+1001 = –7 +1110 = –2
1011 = –5 10011 = 3

(a) M = 2 = 0010 (b) M = 5 = 0101

S = 7 = 0111 S = 2 = 0010
–S = 1001 –S = 1110

1011 = –5 0101 = 5
+1110 = –2 +0010 = 2
11001 = –7 0111 = 7

(c) M =–5 = 1011 (d) M = 5 = 0101

S = 2 = 0010 S =–2 = 1110
–S = 1110 –S = 0010

0111 = 7 1010 = –6
+0111 = 7 +1100 = –4
1110 = Overflow 10110 = Overflow

(e) M = 7 = 0111 (f) M = –6 = 1010

S = –7 = 1001 S = 4 = 0100
–S = 0111 –S = 1100

Copyright
Figure 11.4 Subtraction © 2019,
of Numbers in 2016, 2013 Pearson
Twos Complement Education, Inc.
Representation (MAll Rights Reserved
– S)
Figure 11.7
Multiplication of Unsigned Binary Integers

1011 Multiplicand (11)

1101 Multiplier (13)
1011
0000
Partial products
1011
1011
10001111 Product (143)

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 Figure 11.10: Multiplication of Two Unsigned
4-Bit Integers Yielding an 8-Bit Result

1011
´1101
00001011 1011 ´ 1 ´ 20
00000000 1011 ´ 0 ´ 21
00101100 1011 ´ 1 ´ 22
01011000 1011 ´ 1 ´ 23
10001111

ure 11.10 Multiplication of Two Unsigned 4-Bit Integers Yielding an 8

Result

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Figure 11.11: Comparison of Multiplication
of Unsigned and Twos Complement Integers

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Figure 11.15: Division of Unsigned Binary
Integers

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Figure 11.17: Restoring Twos Complement
Division (7/3)

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Floating-Point Representation
Principles
• With a fixed-point notation it is possible to represent a range of
positive and negative integers centered on or near 0
• By assuming a fixed binary or radix point, this format allows the
representation of numbers with a fractional component as well
• Limitations:
– Very large numbers cannot be represented nor can very small
fractions
– The fractional part of the quotient in a division of two large
numbers could be lost

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Figure 11.18
Typical 32-Bit Floating-Point Format

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 IEEE 754-2008
• Defines the following different types of floating-point formats:
• Arithmetic format
– All the mandatory operations defined by the standard are supported by the
format. The format may be used to represent floating-point operands or results
for the operations described in the standard.

• Basic format
– This format covers five floating-point representations, three binary and two
decimal, whose encodings are specified by the standard, and which can be used
for arithmetic. At least one of the basic formats is implemented in any
conforming implementation.

• Interchange format
– A fully specified, fixed-length binary encoding that allows data interchange
between different platforms and that can be used for storage.

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Figure 11.21: IEEE 754 Formats
sign biased
bit exponent
trailing
significand field

8 bits 23 bits
(a) binary32 format

sign biased
bit exponent

trailing significand field

11 bits 52 bits
(b) binary64 format

sign
bit
biased
trailing significand field
exponent
15 bits 112 bits
(c) binary128 format

Figure 11.21
Copyright IEEE
© 2019, 2016,754
2013Formats
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Table 11.3: IEEE 754 Format Parameters
Format
Parameter
Binary32 Binary64 Binary128
Storage width (bits) 32 64 128
Exponent width (bits) 8 11 15
Exponent bias 127 1023 16383
Maximum exponent 127 1023 16383
Minimum exponent –126 –1022 –16382
Approx. normal number range
10-38, 10+38 10-308, 10+308 10-4932, 10+4932
(base 10)
Trailing significand width (bits)* 23 52 112
Number of exponents 254 2046 32766
Number of fractions 223 252 2112
Number of values 1.98  231 1.99  263 1.99  2128

Smallest positive normal number 2-126 2-1022 2-16362

Largest positive normal number 2128 - 2104 21024 - 2971 216384 - 216271
Smallest subnormal magnitude 2-149 2-1074 2-16494
Note: * not including implied bit and not including sign bit.
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 Additional Formats
Extended Precision Formats Extendable Precision Format
• Provide additional bits in the exponent • Precision and range are defined
(extended range) and in the significand under user control
(extended precision) • May be used for intermediate
• Lessens the chance of a final result calculations but the standard
that has been contaminated by places no constraint or format or
excessive roundoff error length
• Lessens the chance of an intermediate
overflow aborting a computation whose
final result would have been
representable in a basic format
• Affords some of the benefits of a larger
basic format without incurring the time
penalty usually associated with higher
precision
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Table 11.6
Floating-Point Numbers and Arithmetic Operations
Floating-Point Numbers Arithmetic Operations

X = XS  BXE
Y = YS  BYE
X + Y = (XS  BXE-YE + YS)  BYE
X – Y = (XS  BXE-YE – YS)  BYE  XE  YE

X  Y = (XSYS)  BXE+YE
X
Y
= ( )B
XS
YS
XE-YE

Examples:
X = 0.3  102 = 30
Y = 0.2  103 = 200
X + Y = (0.3  102-3 + 0.2)  103 = 0.23  103 = 230
X – Y = (0.3  102-3 – 0.2)  103 = ( – 0.17)  103 = –170
X  Y = (0.3  0.2)  102+3 = 0.06  105 = 6000
X  Y = (0.3  0.2)  102-3 = 1.5  10-1 = 0.15
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Precision Considerations
Rounding
• IEEE standard approaches:
– Round to nearest:
 The result is rounded to the nearest representable number.
– Round toward +∞ :
 The result is rounded up toward plus infinity.
– Round toward -∞:
 The result is rounded down toward negative infinity.
– Round toward 0:
 The result is rounded toward zero.

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IEEE Standard for Binary Floating-Point Arithmetic
Infinity
Is treated as the limiting case of real arithmetic, with the infinity
values given the following interpretation:

- ∞ < (every finite number) < + ∞

For example:
5 + (+ ∞ ) = + ∞ 5÷ (+ ∞ ) = +0
5 - (+ ∞ ) = - ∞ (+ ∞ ) + (+ ∞ ) = + ∞
5 + (- ∞ ) = - ∞ (- ∞ ) + (- ∞) =-∞
5 - (- ∞ ) =+∞ (- ∞ ) - (+ ∞ ) =-∞
5 * (+ ∞ ) = + ∞ (+ ∞ ) - (- ∞ ) =+∞

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Error Detecting Codes
• Parity System
- Simplest method for error detection
- One parity bit attached to the information
• Even Parity and Odd Parity
- Even Parity: One bit is attached so that the total number
of 1 bits is an even number

- Odd Parity: One bit is attached so that the total number of

1 bits is an odd number

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Parity Bit Generation
Parity Bit Generation
For b6b5... b0 (7-bit information); even parity bit beven
beven = b6 ⊕ b5 ⊕ ... ⊕ b0
For odd parity bit
bodd = beven ⊕ 1 = b’even
Parity Generator Circuit
(even parity)
Parity Checker Circuit

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Parity Bit Example
Type of bit Successful transmission scenario
parity
A wants to send: 1001
A computes parity bit value: 1+0+0+1 = 0
Even parity A adds parity bit and sends: 10010
B receives: 10010
B computes parity: 1+0+0+1+0 = 0 (Even)
B reports correct transmission after observing expected
even result.
A wants to send: 1001
A computes parity bit value: 1+0+0+1 = 1
A adds parity bit and sends: 10011
Odd parity B receives: 10011
B computes parity: 1+0+0+1+1= 1 (Odd)
B reports correct transmission after observing expected
odd result.
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Summary Computer
Arithmetic
Chapter 11
• Integer arithmetic
• ALU – Negation
• Integer representation – Addition and subtraction
– Sign-magnitude – Multiplication
representation – Division
– Twos complement • Floating-point arithmetic
representation – Addition and subtraction
– Range extension – Multiplication and division
– Fixed-point representation – Precision consideration
• Floating-point representation – IEEE standard for binary
– Principles floating-point arithmetic
– IEEE standard for binary
floating-point representation

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