Microcontroller Lab Manual
Microcontroller Lab Manual
Microcontrollers Lab
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C
(Ability Enhancement Course) IV
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Semester B.E.
Sub Code: BECL456A
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Name : ___________________________________________
USN : ___________________________________________
Microcontrollers Lab
.IN
C
(Ability Enhancement Course)
N
Sub Code: BECL456A
SY
Name : ___________________________________________
U
VT
USN : ___________________________________________
Sem : ___________________________________________
INSTITUTE MISSION
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DEPARTMENT VISION
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Impart quality education to create world class technocrats and entrepreneurs
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with self-reliance to impart new ideas and innovations to excel in technical
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DEPARTMENT MISSION
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the information to provide valid conclusions.
PO5 Modern tool usage: Create, select, and apply appropriate techniques, resources, and
modern engineering and IT tools including prediction and modeling to complex
engineering activities with an understanding of the limitations.
PO6
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The engineer and society: Apply reasoning informed by the contextual knowledge to assess
societal, health, safety, legal and cultural issues and the consequent responsibilities relevant to
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the professional engineering practice
PO7 Environment and sustainability: Understand the impact of the professional engineering
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solutions in societal and environmental contexts, and demonstrate the knowledge of, and need
for sustainable development
PO8 Ethics: Apply ethical principles and commit to professional ethics and responsibilities and
norms of the engineering practice
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PO9 Individual and team work: Function effectively as an individual, and as a member or
leader in diverse teams, and in multidisciplinary settings.
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PO12 Life-long learning: Recognize the need for, and have the preparation and ability to
engage in independent and life-long learning in the broadest context of technological
change.
PEO3: Bring out the solution to real time problems in electronics &
communication engineering developments.
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PSO (Program Specific Outcomes)
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PSO1: Specify, design, build and test analog and digital systems for
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signal processing including multimedia applications, using suitable
components or simulation tools.
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PSO2: Understand and architect wired and wireless analog and digital
communication systems as per specifications, and determine their
performance.
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VT
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Don’ts inside the lab
•
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Computers and peripherals are not to be moved or reconfigured without
approval of Lab In charge.
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• Students should not install software on lab computers. If you have a question
regarding specific software that you need to use, contact the staff.
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CO3 PO4, PO5, PO8,
problems.
PO9, PO10 PSO1
PO1, PO2, PO3,
Develop Microcontroller applications using external hardware PO4, PO5, PO8,
CO4
interface.
C PO9, PO10, PO12,
PSO1, PSO2
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Correlation Matrix
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CO/POPO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 P09 PO10 PO11 PO12 PSO1 PSO2 PSO2
CO1 2 2 2 3 2 - - 2 2 3 - - 2 - -
CO2 2 2 1 3 2 - - 2 3 3 - - 2 - -
CO3 2 3 3 3 2 - - 2 3 3 - - 2 - -
CO4 3 3 3 3 2 - - 2 3 3 - 1 2 1 1
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Note: Correlation levels: 1: Slight (Low) 2: Moderate (Medium) 3: Substantial (High), “-” No correlation
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Data Transfer Programs:
Write an ALP to move a block of n bytes of data from source (20h) to destination (40h)
1
using Internal-RAM. C
Write an ALP to move a block of n bytes of data from source (2000h) to destination (2050h)
2
using External RAM.
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Write an ALP To exchange the source block starting with address 20h, (Internal RAM)
3 containing N (05) bytes of data with destination block starting with address 40h (Internal
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RAM).
Write an ALP to exchange the source block starting with address 10h (Internal memory),
4 containing n (06) bytes of data with destination block starting at location 00h (External
memory).
U
Write an ALP to add the byte in the RAM at 34h and 35h, store the result in the register R5
5
(LSB) and R6 (MSB), using Indirect Addressing Mode.
Write an ALP to subtract the bytes in Internal RAM 34h & 35h store the result in register R5
6
(LSB) & R6 (MSB).
Write an ALP to multiply two 8-bit numbers stored at 30h and 31h and store16- bit result in
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32h and 33h of Internal RAM.
Write an ALP to find Largest & Smallest number from a given array starting from 20h &
12
store it in Internal Memory location 40h.
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4
memory locations.
III. Hardware Interfacing Programs
1 Write an 8051 C Program to rotate stepper motor in Clock & Anti-Clockwise direction.
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2 Write an 8051 C program to Generate Sine & Square waveforms using DAC interface.
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Course Outcomes: At the end of the course the student will be able to:
1. Write an Assembly Language/ C programs in 8051for solving simple problems that
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The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is
50%. The minimum passing mark for the CIE is 40% of the maximum marks (20 marks out of 50) and
for the SEE minimum passing mark is 35% of the maximum marks (18 out of 50 marks). A student
shall be deemed to have satisfied the academic requirements and earned the credits allotted to each
subject/ course if the student secures a minimum of 40% (40 marks out of 100) in the sum total of the
CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken together.
Continuous Internal Evaluation (CIE):
CIE marks for the practical course are 50 Marks.
The split-up of CIE marks for record/ journal and test are in the ratio 60:40.
• Each experiment is to be evaluated for conduction with an observation sheet and record write-
up. Rubrics for the evaluation of the journal/write-up for hardware/software experiments are
designed by the faculty who is handling the laboratory session and are made known to
students at the beginning of the practical session.
• Record should contain all the specified experiments in the syllabus and each experiment
write-up will be evaluated for 10 marks.
• Total marks scored by the students are scaled down to 30 marks (60% of maximum marks).
• Weightage to be given for neatness and submission of record/write-up on time.
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• All laboratory experiments are to be included for practical examination.
• (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer
script to be strictly adhered to by the examiners. OR based on the course requirement
evaluation rubrics shall be decided jointly by examiners.
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• Students can pick one question (experiment) from the questions lot prepared by the
examiners jointly.
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• Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly
by examiners.
General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and
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result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100
marks and scored marks shall be scaled down to 50 marks (however, based on course type, rubrics
shall be decided by the examiners) Change of experiment is allowed only once and 15% of Marks
allotted to the procedure part are to be made zero.
U
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Click ‘Add’. Observe that saved file name will be added in ‘project workspace’ under Target1
Source Group1 . then click ‘close’ option in popup message.
8. Then start writing ASM code in the file.
9. To COMPILE the code click ‘Project’ ‘Rebuild all target files’. In IDE ‘BUILD’ window check
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the message ‘"New" - 0 Error(s), 0 Warning(s) ‘for compilation.
10. If Error is Zero indicate that the program has compiled without any error.
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11. If Error are shown with numbers. Then go to particular line No. in the file and rectify the error and
continue the compilation.
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12. Once compilation done, To Start execution click ‘Debug’ ‘Start/Stop Debug Session’. Click ‘OK’.
13. To RUN click ‘Debug’ ‘Run’. Check the results in the ‘Register’ ‘Value’.
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FEATURES OF 8051
1. 8051 microcontroller is an eight bit microcontroller.
2. It is available in 40 pin DIP package.
3. It has 4kb of ROM (on-chip programmable space) and 128 bytes of RAM space which is inbuilt, if
desired 64KB of external memory can be interfaced with the microcontroller.
4. There are four parallel 8 bits ports which are easily programmable as well as addressable.
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5. An on- chip crystal oscillator is integrated in the microcontroller which has crystal frequency of 12MHz.
6. In the microcontroller there is a serial input/output port which has 2 pins.
7. Two timers of 16 bits are also incorporated in it; these timers can be employed as timer for internal
functioning as well as counter for external functioning.
C
8. The microcontroller comprise of 5 interrupt sources namely- Serial Port Interrupt, Timer Interrupt 1,
External Interrupt 0, Timer Interrupt 0, External Interrupt 1.
9. The programming mode of this micro-controller includes GPRs (general purpose registers), SFRs
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(special function registers) and SPRs (special purpose registers)
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C
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Pin 9 RS A logic one on this pin disables the microcontroller and clears the contents of most registers.
In other words, the positive voltage on this pin resets the microcontroller. By applying logic zero
to this pin, the program starts execution from the beginning
Pins10-17 Port 3 Similar to port 1, each of these pins can serve as general input or output. Besides, all of
them have alternative functions
Pin 10 RXD Serial asynchronous communication input or Serial synchronous communication output
Pin 11 TXD Serial asynchronous communication output or Serial synchronous communication clock
output
Pin 12 INT0 Interrupt 0 input
Pin 13 INT1 Interrupt 1 input
Pin 14 T0 Counter 0 clock input
Pin 15 T1 Counter 1 clock input
Pin 16 WR Write to external (additional) RAM
Pin 17 RD Read from external RAM
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Pin 18, 19 XTAL2, XTAL1 are internal oscillator input and output pins. A quartz crystal which specifies
operating frequency is usually connected to these pins. Instead of it, miniature ceramics resonators
can also
Pin 20 GND Ground
Pin 21-28
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Port 2 If there is no intention to use external memory then these port pins are configured as
general inputs/outputs. In case external memory is used, the higher address byte, i.e. addresses
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A8-A15 will appear on this port. Even though memory with capacity of 64Kb is not used, which
means that not all eight port bits are used for its addressing, the rest of them are not available as
inputs/outputs
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Pin 29 PSEN If external ROM is used for storing program then a logic zero (0) appears on it every time
the microcontroller reads a byte from memory
Pin 30 ALE Prior to reading from external memory, the microcontroller puts the lower address byte (A0-
A7) on P0 and activates the ALE output. After receiving signal from the ALE pin, the external
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register (usually 74HCT373 or 74HCT375 add-on chip) memorizes the state of P0 and uses it as a
memory chip address. Immediately after that, the ALU pin is returned its previous logic state and
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P0 is now used as a Data Bus. As seen, port data multiplexing is performed by means of only one
additional (and cheap) integrated circuit. In other words, this port is used for both data and
address transmission
Pin 31 EA By applying logic zero to this pin, P2 and P3 are used for data and address transmission with
no regard to whether there is internal memory or not. It means that even there is a program written
to the microcontroller, it will not be executed. Instead, the program written to external ROM will
be executed. By applying logic one to the EA pin, the microcontroller will use both memories,
first internal then external (if exists).
Pin 32-39 Port 0 Similar to P2, if external memory is not used, these pins can be used as general
inputs/outputs. Otherwise, P0 is configured as address output (A0-A7) when the ALE pin is
driven high (1) or as data output (Data Bus) when the ALE pin is driven low (0).
Pin 40 VCC +5V power supply
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Write an ALP to add the byte in the RAM at 34h and 35h, store the result
5 5
in the register R5 (LSB) and R6 (MSB), using Indirect Addressing Mode.
Write an ALP to subtract the bytes in Internal RAM 34h & 35h store the
6 6
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result in register R5 (LSB) & R6 (MSB).
Write an ALP to multiply two 8-bit numbers stored at 30h and 31h and
7 7
store16- bit result in 32h and 33h of Internal RAM.
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Write an ALP to perform division operation on 8-bit number by 8-bit
8 8
number.
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12 12
starting from 20h & store it in Internal Memory location 40h.
Counter Operation Programs: 13
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I. Assembly Programming
Data Transfer Programs
ORG 0000H
MOV R0, #20H
MOV R1, #40H
MOV R2, #05H
back : MOV A , @R0
MOV @R1, A
INC R0
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INC R1
DJNZ R2, back
exit: SJMP exit C
end
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Before Execution:
Input@
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01 02 03 04 05
D:20h
Output@
U
D:40h
VT
After Execution:
Input@
01 02 03 04 05
D:20h
Output@
01 02 03 04 05
D:40h
ORG 0000H
MOV DPTR, #2000H
MOV R0, #00H
MOV R1, #50H
MOV A, #00H
MOV R7,#07H
BACK: MOVX A,@DPTR
MOV DPL, R1
MOVX @DPTR, A
INC R1
INC R0
MOV DPL, R0
DJNZ R7,BACK
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exit: SJMP exit
END
Before Execution:
Input@
C
01 02 03 04 05 06 07
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X:2000h
Output@
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X:2050h
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After Execution:
Input@
01 02 03 04 05 06 07
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X:2000h
Output@
01 02 03 04 05 06 07
X:2050h
3. Write an ALP To exchange the source block starting with address 20h, (Internal
RAM) containing N (05) bytes of data with destination block starting with
address 40h (Internal RAM).
ORG 0000H
MOV R0,#20H
MOV R1,#40H
MOV R2,#05H
UP: MOV A , @R0
XCH A,@R1
MOV @R0,A
INC R0
INC R1
DJNZ R2,UP
exit: SJMP exit
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END
Before Execution:
Input@
01 02 03 04 05
D:20h
C
Input@
N
0A 0B 0C 0D 0E
D:40h
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After Execution:
U
output@
0A 0B 0C 0D 0E
D:20h
VT
Ouput@
01 02 03 04 05
D:40h
4. Write an ALP to exchange the source block starting with address 10h (Internal
memory), containing n (06) bytes of data with destination block starting at
location 00h (External memory).
ORG 0000H
MOV R1, #06
MOV R0, #10H
MOV DPTR, #0000H
back: MOVX A, @DPTR
XCH A, @R0
MOVX @DPTR, A
INC R0
INC DPTR
DJNZ R1, back
exit: SJMP exit
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END
Before Execution:
C
Input@
N
0A 0B 0C 0D 0E 0F
X:0000h
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Intput@
01 02 03 04 05 06
D:10h
U
VT
After Execution:
Output@
01 02 03 04 05 06
X:0000h
Output@
0A 0B 0C 0D 0E 0F
D:10h
5. Write an ALP to add the byte in the RAM at 34h and 35h, store the result in the
register R5 (LSB) and R6 (MSB), using Indirect Addressing Mode.
ORG 0000H
MOV R0, #34H
MOV R1, #35H
MOV R6, #00H
MOV A, @R0
BACK: ADD A, @R1
JNC NOCARY
INC R6
NOCARY: MOV R5, A
exit: SJMP exit
END
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Before Execution:
I/P O/P
34H 35H
CR5 R6
FF FF
N
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After Execution:
I/P O/P
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34H 35H R5 R6
FF FF FE 01
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6. Write an ALP to subtract the bytes in Internal RAM 34h & 35h store the result in
register R5 (LSB) & R6 (MSB).
ORG 8000H
MOV R0, #34H
MOV R1, #35H
CLR C
MOV A, @R0
MOV B, @R1
SUBB A, B
MOV R5, A
MOVC R6,
HERE:JMP HERE
END
Before Execution:
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I/P O/P
30H 31H R5 R6
05 04 C
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After Execution:
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I/P O/P
30H 31H R5 R6
U
05 04 02
VT
7. Write an ALP to multiply two 8-bit numbers stored at 30h and 31h and store16-
bit result in 32h and 33h of Internal RAM.
ORG 0000H
MOV A, 30H
MOV B,31H
MUL AB
MOV 32H, A
MOV 33H,B
LOOP: SJMP LOOP
END
Before Execution:
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I/P O/P
30H 31H 32H 33H
05 04 C
After Execution:
N
SY
I/P O/P
30H 31H 32H 33H
08 02 14
U
VT
ORG 0000H
MOV A, 40H
MOV B,41H
DIV AB
MOV 42H, A
MOV 43H, B
LOOP: SJMP
LOOP
END
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Before Execution:
I/P O/P
40H 41H 42H 43H
08 02
C
N
After Execution:
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I/P O/P
40H 41H 42H 43H
08 02 04
U
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ORG 0000H
MOV R2, #0AH
MOV R0, #20H
MOV R1, #40H
MOV DPTR, #2000H
CLR C
BACK: MOVX A, @DPTR
MOV R5, A
RLC A
JC NEG
MOVX A, @DPTR
MOV @R0, A
INC R0
SJMP NEXT
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NEG: MOVX A, @DPTR
MOV @R1,A
INC R1
NEXT: INC DPTR
DJNZ R2, BACK
C
EXIT:SJMP EXIT
N
END
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Before Execution:
Input@
01 05 AB 09 1B CD 2D FE 78 16
U
X:2000h
Output@
VT
D:20h
D:40h
After Execution:
Input@
01 05 AB 09 1B CD 2D FE 78 16
X:2000h
Output@
01 05 09 1B 2D 78 16
D:20h
D:40h AB CD FE
ORG 0000H
MOV R2, #0AH
MOV R0, #20H
MOV R1, #40H
MOV DPTR, #2000H
CLR C
BACK: MOVX A, @DPTR
MOV R5, A
RRC A
JC ODD
MOVX A, @DPTR
MOV @R0, A
INC R0
SJMP NEXT
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ODD: MOVX A, @DPTR
MOV @R1,A
INC R1
NEXT: INC DPTR
DJNZ R2, BACK
C
EXIT:SJMP EXIT
N
END
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Before Execution:
Input@
05 1A 20 13 54 66 33 44 09 BC
U
X:2000h
Output@
VT
D:20h
D:40h
After Execution:
Input@
05 1A 20 13 54 66 33 44 09 BC
X:2000h
Output@
1A 20 54 66 44 BC
D:20h
D:40h 05 13 33 09
11. Write an ALP to arrange the numbers in Ascending & Descending order.
Ascending order: Descending order:
ORG 0000H ORG 0000H
MOV R0, #09H MOV R0, #09H
AGAIN: MOV DPTR, #9000H AGAIN: MOV DPTR, #9000H
MOV R1, #09H MOV R1, #09H
BACK: MOV R2, DPL BACK: MOV R2, DPL
MOVX A, @DPTR MOVX A, @DPTR
MOV B, A MOV B, A
INC DPTR INC DPTR
MOVX A, @DPTR MOVX A, @DPTR
CJNE A, B, LOOP CJNE A, B, LOOP
AJMP SKIP AJMP SKIP
LOOP: JNC SKIP LOOP: JC SKIP
MOV DPL, R2 MOV DPL, R2
MOVX @DPTR, A MOVX @DPTR, A
INC DPTR INC DPTR
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MOV A, B MOV A, B
MOVX @DPTR, A MOVX @DPTR, A
SKIP: DJNZ R1, BACK SKIP: DJNZ R1, BACK
DJNZ R0, AGAIN DJNZ R0, AGAIN
HERE: JMP HERE
C HERE: JMP HERE
END END
N
INPUT OUTPUT INPUT OUTPUT
X:9000 : 12 01 X:9000 : 32 93
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9001 : 19 02 9001 : 41 92
9002 : 01 03 9002 : 45 59
9003 : 02 09 9003 : 46 46
9004 : 09 12 9004 : 59 45
U
9005 : 72 16 9005 : 32 41
9006 : 68 19 9006 : 93 32
9007 : 16 68 9007 : 92 32
VT
9008 : 03 72 9008 : 26 26
12. Write an ALP to find Largest & Smallest number from a given array starting
from 20h & store it in Internal Memory location 40h.
Largest Number in an array Smallest Number in an array
ORG 0000H ORG 0000H
MOV R2, #04H MOV R2, #04H
MOV A, #00H MOV A, #00H
MOV R0, #20H MOV R0, #20H
MOV R1, #40H MOV R1, #40H
UP: MOV B, @R0 UP: MOV B, @R0
CJNE A, B, DOWN CJNE A, B, DOWN
DOWN: JNC BELOW DOWN: JC BELOW
MOV A, @R0 MOV A, @R0
BELOW: INC R0 BELOW: INC R0
DJNZ R2, UP DJNZ R2, UP
MOV @R1, A MOV @R1, A
HERE: JMP HERE HERE: JMP HERE
END END
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INPUT OUTPUT INPUT OUTPUT
D:20 : FA D:40: FF D:20 : FA D:40: 01
21 : 01 21 : 01
22 : FF
C 22 : FF
23 : 60 23 : 60
N
SY
U
VT
ORG 0000H
MOV R2, #00H
BACK:INC R2
CJNE R2, #0AH, LOOP
MOV R2, #00H
LOOP: SJMP BACK
END
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00
01
02
… C
0A
N
SY
U
VT
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…
01
00 C
N
SY
U
VT
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…
0F
C
N
SY
U
VT
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--
02
01
00 C
N
SY
U
VT
II. C Programming
#include <reg51.h>
void main ( )
{
unsigned char sum=0;
unsigned char i;
for (i=0; i<=9; i++)
{
sum = sum + i;
}
ACC=sum;
P0=sum;
}
.IN
Output:
C
N
SY
U
VT
#include <reg51.h>
#include <stdio.h>
void main()
{
unsigned int i;
unsigned char num = 15; // The number to find the factorial of
unsigned long factorial = 1;
for ( i = 1; i <= num; i++)
{
factorial = factorial*i;
}
P0= factorial;
P1= (factorial & 0xff00) >>8;
P2= (factorial & 0xff0000) >>16;
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P3= (factorial & 0xff000000) >>24;
}
C
N
SY
Output:
U
VT
3. Write a 8051 C program to find the square of a number ( 1 to 10) using look-up
table.
#include <reg51.h>
void main ( )
{
unsigned char LUT[]={1,4,9,16,25,36,49,64,81,100};
unsigned char num, square;
for(num=1; num<=10; num++)
{
square =LUT[num-1];
P0=square;
}
}
.IN
Output:
C
N
SY
U
VT
4. Write a 8051 C program to count the number of ones and zeros in two
consecutive memory locations.
#include <reg51.h>
void main ( )
{
unsigned char data1, data2;
unsigned char i,ones, zeros;
data1 = *(unsigned char*) 0x40;
data2 = *(unsigned char*) 0x41;
CY=0;
for(i=0;i<=7;i++)
{
data1 >>=1;
if(CY==1) ones++;
else zeros++;
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}
for(i=0;i<=7;i++)
{
data2 >>=1;
if(CY==1) ones++;
C
else zeros++;
N
}
P0=zeros;
SY
P1=ones;
}
Output:
U
VT
#include<reg51.h>
void ms_delay(unsigned int t) //To create a delay of 200 ms = 200 x 1ms
{
unsigned i,j ;
for(i=0;i<t;i++) //200 times 1 ms delay
for(j=0;j<1275;j++); //1ms delay
}
void main()
{
while(1) // To repeat infinitely
{
.IN
P2=0x0C; //P2 = 0000 1000 First Step
ms_delay(100);
P2=0x06; //P2 = 0000 0100 Second Step C
ms_delay(100);
P2=0x03; //P2 = 0000 0010 Third Step
ms_delay(100);
N
P2=0x09; //P2 = 0000 0001 Fourth Step
ms_delay(100);
SY
ms_delay(100);
P2=0x06; //P2 = 0000 0010 Third Step
VT
ms_delay(100);
P2=0x0C; //P2 = 0000 0001 Fourth Step
ms_delay(100);
}
}
Stepper Motor:
The stepper motor is rotated by switching individual phases ON for a given time one by
one. The sequence is given in the graph below.
.IN
Circuit diagram.
C
N
SY
U
VT
2. Write an 8051 C program to generate sine and square waveforms using DAC
interface.
Sine Wave:
#include<reg51.h>
int main()
{
int j;
int
c[37]={128,150,172,192,210,226,239,248,254,255,254,248,239,226,210,192,172,150,1
28,106,84,64,46,30,17,8,2,0,2,8,17,30,46,64,84,106,128};
while(1)
{
for(j=0;j<36;j++)
{
P1=c[j];
}
.IN
P1=128;
}}
Output:
C
N
SY
U
VT
Square Wave:
#include <reg51.h>
void delay()
{
int i=0;
for(i=0;i<15;i++)
{
}
}
void main()
{
while(1)
{
P0=0xff;
delay();
P0=0x00;
.IN
delay();
}
} C
Output:
N
SY
U
VT
Viva Questions
The von Neumann architecture is named after the mathematician and early
computer scientist John von Neumann. Von Neumann machines have shared
signals and memory for code and data. Thus, the program can be easily modified
.IN
by itself since it is stored in read-write memory.
3. 8051 was developed using which technology?
Intel’s original MCS-51 family was developed using NMOS technology, but later
versions, identified by a letter C in their name (e.g., 80C51) used CMOS
C
technology and consume less power than their NMOS predecessors. This made
them more suitable for battery-powered devices.
N
4. Why 8051 is called an 8-bit microcontroller?
The Intel 8051 is an 8-bit microcontroller which means that most available
SY
40 Pin IC.
128 bytes of RAM.
4K ROM (On-chip and could be different for different versions).
2 Timers (Timer 0 and Timer 1).
32 Input/ Output pins.
1 serial port.
6 Interrupts (Including Reset).
8. What location code memory space and data memory space begins?
At location 0x00 for internal or external memory
9. What is 8051 Microcontroller ?
The intel 8051 microcontroller is one of the most popular general-purpose
microcontrollers in use today. It is an 8-bit family of microcontroller developed by
Intel in the year 1981. This microcontroller was also referred to as “system on a
chip” because it has 128 bytes of RAM, 4Kbytes of ROM, 2 Timers, 1 Serial port,
and four ports on a single chip. 8051 microcontroller allows CPU to work on 8bits
of data at a time. In case the data is larger than 8 bits then it has to be broken into
parts so that the CPU can process conveniently.
10. What are registers in Microcontroller ?
Register provides a fast way to collect and store data using microcontrollers and
processors. If we want to manipulate data with a controller or processor by
performing tasks like addition, subtraction, and so on, we cannot do that directly
in the memory, in order to perform these tasks we need registers to process and
store the data. Microcontrollers contain several types of registers that can be
classified according to their content or instructions that operate on them.
The 8051 microcontroller contains mainly two types of registers:
.IN
• General purpose registers (Byte addressable registers)
• Special function registers (Bit addressable registers)
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11. Which are the most common 8051 series of microcontrollers?
Atmel series AT89C2051 and Philips family P89C51RD2 are the two most
N
common microcontrollers of 8051 families.
SY
Program Counter
VT
14. How many bytes of bit addressable memory is present in 8051 based
microcontrollers?
16 bytes
15. List Interrupts available in 8051 microcontrollers.
• External interrupt 0 (IE0) has highest priority among interrupts.
• Timer interrupt 0 (TF0)
• External interrupt 1 (IE1)
• Timer interrupt 1 (TF1) has lowest priority among other interrupts.
• Serial port Interrupt
• Reset
16. What is the meaning of the instruction MOV A,05H?
Address 05H is stored in the accumulator.
17. How are the status of the carry, auxiliary carry and parity flag affected if the write
instruction
MOVA,#9C
ADD A,#64H
CY=1,AC=1,P=0
18. When the microcontroller executes some arithmetic operations, then the flag bits
of which register are affected?
PSW
19. How are the bits of the register PSW affected if we select Bank2 of 8051?
PSW.3=0 and PSW.4=1
20. DJNZ R0, label is how many bit instructions?
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2
21. JZ, JNZ, DJNZ, JC, JNC instructions monitor the bits of which register?
C
PSW
22. DAA command adds 6 to the nibble if:
N
Either CY or AC is 1
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modes
25. Auto reload mode is allowed in which mode of the timer?
Mode 2
26. A counter is fundamentally a sequential circuit that proceeds through the
predetermined sequence of states only when input pulses are applied to it.
Register
27. Which special function register play a vital role in the timer/counter mode
selection process by allocating the bits in it?
TMOD
28. ANL instruction is used
To AND the contents of the two registers and to mask the status of the bits
29. CJNE instruction makes
In CJNE command, the pointer jumps if the values of the two registers are
not equal and it resets CY if the destination address is larger then the
source address and sets CY if the destination address is smaller then the
source address.
30. XRL, ORL, ANL commands have
accumulator as the destination address and any register, memory or any
immediate data as the source address
31. In unsigned number addition, the status of which bit is
important? CY
32. Which of these instructions have no effect on the flags of PSW?
ANL, ORL and [Link] instructions are the arithmetic operations and
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the flags are affected by the data copy instructions, so all these
instructions don’t affect the bits of the flag.
C
33. What does ASCII stand for?
American Standard Code for Information Interchange. The ASCII codes
N
are used to represent the bits into symbols and vice versa. ASCII is the
SY
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i. MOV A, 65H
ii. MOV A, @R0
iii. MOV 45H, A
iv. MOV @R1, A
e. Move the contents of a memory location to Rn or Rn to a memory location using direct
addressing
C
i. MOV R3, 65H
N
ii. MOV 45H, R2
f. Move the contents of memory location to another memory location using direct and indirect
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addressing
i. MOV 47H, 65H
ii. MOV 45H, @R0
g. Move the contents of an external memory to A or A to an external memory
i. MOVX A,@R1
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iv. MOVX@DPTR,A
h. Move the contents of program memory to A
i. MOVC A, @A+PC
ii. MOVC A, @A+DPTR
i. Exchange instructions
The content of source ie., register, direct memory or indirect memory will be exchanged with
the contents of destination ie., accumulator.
i. XCH A,R3
ii. XCH A,@R1
iii. XCH A,54h
j. Exchange digit. Exchange the lower order nibble of Accumulator (A0-A3) with lower order nibble of the
internal RAM location which is indirectly addressed by the register.
i. XCHD A,@R1
ii. XCHD A,@R0
Arithmetic instructions.
.IN
C
The 8051 can perform addition, subtraction. Multiplication and division operations on 8 bit numbers.
Addition
N
In this group, we have instructions to
i. Add the contents of A with immediate data with or without carry.
SY
i. ADD A, #45H
ii. ADDC A, #OB4H
ii. Add the contents of A with register Rn with or without carry.
i. ADD A, R5
U
ii. ADDC A, R2
iii. Add the contents of A with contents of memory with or without carry using direct and indirect
addressing
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i. ADD A, 51H
ii. ADDC A, 75H
iii. ADD A, @R1
iv. ADDC A, @R0
CY AC and OV flags will be affected by this operation.
Subtraction
In this group, we have instructions to
i. Subtract the contents of A with immediate data with or without carry.
i. SUBB A, #45H
ii. SUBB A, #OB4H
ii. Subtract the contents of A with register Rn with or without carry.
i. SUBB A, R5
ii. SUBB A, R2
iii. Subtract the contents of A with contents of memory with or without carry using direct and indirect
addressing
i. SUBB A, 51H
ii. SUBB A, 75H
iii. SUBB A, @R1
iv. SUBB A, @R0
CY AC and OV flags will be affected by this operation.
Multiplication
MUL AB. This instruction multiplies two 8 bit unsigned numbers which are stored in A and B register. After
multiplication the lower byte of the result will be stored in accumulator and higher byte of result will be
stored in B register.
Eg. MOV A,#45H ; [A]=45H
MOV B,#0F5H ; [B]=F5H
MUL AB ; [A] x [B] = 45 x F5 = 4209 ;[A]=09H, [B]=42H
DIV AB. This instruction divides the 8 bit unsigned number which is stored in A by the 8 bit unsigned number
which is stored in B register. After division the result will be stored in accumulator and remainder will be stored
in B register.
Eg. MOV A,#45H ; [A]=0E8H
MOV B,#0F5H ; [B]=1BH
DIV AB ; [A] / [B] = E8 /1B = 08 H with remainder 10H; [A] = 08H, [B]=10H
Increment: increments the operand by one.
INC A INC Rn
INC DIRECT
INC @Ri
.IN
INC DPTR
INC increments the value of source by 1. If the initial value of register is FFh, incrementing the value
will cause it to reset to 0. The Carry Flag is not set when the value "rolls over" from 255 to 0.
In the case of "INC DPTR", the value two-byte unsigned integer value of DPTR is incremented. If the
C
initial value of DPTR is FFFFh, incrementing the value will cause it to reset to 0.
Decrement: decrements the operand by one.
N
DEC A
DEC Rn
DEC DIRECT
SY
DEC @Ri
DEC decrements the value of source by 1. If the initial value of is 0, decrementing the value will
cause it to reset to FFh. The Carry Flag is not set when the value "rolls over" from 0 to FFh.
Logical Instructions
U
Logical AND
ANL destination, source: ANL does a bitwise "AND" operation between source and destination, leaving the resulting value
VT
in destination. The value in source is not affected. "AND" instruction logically AND the bits of source and destination.
ANL A,#DATA
ANL A, Rn
ANL A,DIRECT
ANL A,@Ri
ANL DIRECT,A
ANL DIRECT, #DATA
Logical OR
ORL destination, source: ORL does a bitwise "OR" operation between source and destination,
leaving the resulting value in destination. The value in source is not affected. " OR " instruction
logically OR the bits of source and destination.
ORL A,#DATA
ORL A, Rn
ORL A,DIRECT
ORL A,@Ri
ORL DIRECT,A
ORL DIRECT, #DATA
Logical Ex-OR
XRL destination, source: XRL does a bitwise "EX-OR" operation between source and destination,
leaving the resulting value in destination. The value in source is not affected. " XRL " instruction
logically EX-OR the bits of source and destination.
XRL A,#DATA
XRL A,Rn
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RL A
Rotate left the accumulator. Each bit is shifted one location to the left, with bit 7 going to bit 0
C
N
SY
RRC A
Rotate right through the carry. Each bit is shifted one location to the right, with bit 0 going into
the carry bit in the PSW, while the carry was at goes into bit 7
U
VT
RLC A
Rotate left through the carry. Each bit is shifted one location to the left, with bit 7 going into
the carry bit in the PSW, while the carry goes into bit 0.
Relative Jump
Jump that replaces the PC (program counter) content with a new address that is greater than (the
address following the jump instruction by 127 or less) or less than (the address following the jump by
128 or less) is called a relative jump. Schematically, the relative jump can be shown as follows: -
.IN
The advantages of the relative jump are as follows:-
1. Only 1 byte of jump address needs to be specified in the 2's complement form, ie. For jumping ahead,
the range is 0 to 127 and for jumping back, the range is -1 to -128.
2. Specifying only one byte reduces the size of the instruction and speeds up program execution.
C
3. The program with relative jumps can be relocated without reassembling to generate absolute jump
addresses.
Disadvantages of the absolute jump: -
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1. Short jump range (-128 to 127 from the instruction following the jump instruction)
SY
JC <relative address>
JNC <relative address>
JB bit, <relative address>
VT
1. The unconditional jump is a jump in which control is transferred unconditionally to the target
location.
a. LJMP (long jump). This is a 3-byte instruction. First byte is the op-code and second and third
bytes represent the 16-bit target address which is any memory location from 0000 to FFFFH
c. SJMP (short jump). This is a 2-byte instruction. First byte is the op-code and second byte is the
relative target address, 00 to FFH (forward +127 and backward -128 bytes from the current PC
value). To calculate the target address of a short jump, the second byte is added to the PC value
which is address of the instruction immediately below the jump.
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JZ Jump if A = 0
All conditional jumps are short jumps.
Bit level jump instructions: C
Bit level JUMP instructions will check the conditions of the bit and if condition is true, it jumps to the
address specified in the instruction. All the bit jumps are relative jumps.
JB bit, rel ; jump if the direct bit is set to the relative address specified.
N
JNB bit, rel ; jump if the direct bit is clear to the relative address specified.
JBC bit, rel ; jump if the direct bit is set to the relative address specified and then clear the bit.
SY
ORG (origin)
U
The ORG directive is used to indicate the starting address. It can be used only when the program counter
needs to be changed. The number that comes after ORG can be either in hex or in decimal.
VT
DB (DEFINE BYTE)
The DB directive is used to define an 8 bit data. DB directive initializes memory with 8 bit values.
The numbers can be in decimal, binary, hex or in ASCII formats. For decimal, the 'D' after the
decimal number is optional, but for binary and hexadecimal, 'B' and ‘H’ are required. For ASCII, the
number is written in quotation marks (‘LIKE This).
END
The END directive signals the end of the assembly module. It indicates the end of the program to the
assembler. Any text in the assembly file that appears after the END directive is ignored. If the END
statement is missing, the assembler will generate an error message
If Master CLK=12 MHz, Timer Clock frequency = Master CLK/12 = 1 MHz Timer Clock Period =
1micro second This indicates that one increment in count will take 1 micro second. The two timers
in 8051 share two SFRs (TMOD and TCON) which control the timers, and each timer also has two
SFRs dedicated solely to itself (TH0/TL0 and TH1/TL1).
Timer/ Counter Control Logic.
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C
N
SY
U
VT
TIMER MODES Timers can operate in four different modes. They are as follows Timer Mode-0: In
this mode, the timer is used as a 13-bit UP counter as follows.
Fig. Operation of Timer on Mode-0 The lower 5 bits of TLX and 8 bits of THX are used for the 13
bit [Link] 3 bits of TLX are ignored. When the counter rolls over from all 0's to all 1's, TFX
flag is set and an interrupt is generated. The input pulse is obtained from the previous stage. If TR1/0
bit is 1 and Gate bit is 0, the counter continues counting up. If TR1/0 bit is 1 and Gate bit is 1, then
the operation of the counter is controlled by input. This mode is useful to measure the width of a
given pulse fed to input.
Timer Mode-1: This mode is similar to mode-0 except for the fact that the Timer operates in 16-bit mode.
Timer Mode-2: (Auto-Reload Mode): This is a 8 bit counter/timer operation. Counting is performed in TLX
while THX stores a constant value. In this mode when the timer overflows i.e. TLX becomes FFH, it is fed
with the value stored in THX. For example if we load THX with 50H then the timer in mode 2 will count
from 50H to FFH. After that 50H is again reloaded. This mode is useful in applications like fixed time
sampling.
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Timer Mode-3: Timer 1 in mode-3 simply holds its count. The effect is same as setting TR1=0. Timer0 in
mode-3 establishes TL0 and TH0 as two separate counters.
C
N
SY
Control bits TR1 and TF1 are used by Timer-0 (higher 8 bits) (TH0) in Mode-3 while TR0 and TF0 are
U