Microelectronics Circuit

EC- 3003

By Dr. Puja Ghosh

IIIT Ranchi
Module Contents

• Physics of MOS Transistor

• Structure of MOSFET
• Operation of MOSFET
• I-V Characteristics of MOSFET
• Second Order Effects
 Text Books
1. J. Rabaey, Digital integrated circuits: a design perspective, Prentice Hall
India, 1997.
2. N. Weste, Principles of CMOS VLSI design, Addition Wesley, 1985.
3. C. Mead, Introduction to VLSI systems, Addition Wesley, 1979.
Reference Books
1. D. Perry, VHDL, 2nd Ed., McGraw Hill International, 1995.
2. L. Glaser and D. Dobberpuhl, The Design and Analysis of VLSI Circuits, Addition
Wesley, 1985.
3. Y. Leblebici and S-M Kang, CMOS digital integrated circuits: analysis and
design, McGraw-Hill, 1996
 Electronics versus
Microelectronics
Early systems incorporated “vacuum tubes,” amplifying devices that operated with the
flow of electrons between plates in a vacuum chamber.
The first transistor was invented in the 1940s and rapidly displaced vacuum tubes.
But it was not until 1960s that the field of microelectronics, i.e., the science of
integrating many transistors on one chip, began.
IC – can contains hundreds of millions of components on a IC chip
 Digital Circuits

• The integrated circuit is sometimes referred

to as a chip or microchip.
• It is a semiconductor wafer often made of
silicon that integrates a collection of
electronic circuits, including resistors,
transistors, capacitors, and diodes that
interconnect to perform a given function.
 Transistors

• Digital Circuits became possible due to

the existence of transistors.
 Diode and BJT

• Diode operate only as a switch and transistors can operate as switch or amplifier.
Working of BJT
• Today’s field of microelectronics is dominated by a type of device called the
metal-oxide semiconductor field-effect transistor (MOSFET).
MOS Field Effect Transistor

 In the MOSFET, the current is controlled by an electric field applied

perpendicular to both the semiconductor surface and to the direction of
current.
 The phenomenon is called the field effect.
 The basic transistor principle is that the voltage between two terminals,
provides the electric field, and controls the current through the third
terminal.
metal
oxide

substrate
MOSFETs
• Voltage-controlled current source can provide signal amplification.
• Gate voltage controls the drain current.
• In order to arrive at the structure of the MOSFET, we begin with a
simple geometry consisting of a conductive (e.g., metal) plate, an
insulator (“dielectric”), and a doped piece of silicon.
Metal-Oxide-Semiconductor (MOS) Capacitor

Fig. (a) Hypothetical semiconductor device, (b) operation as a capacitor, (c) current flow as a result of
potential difference.

• The MOS structure can be thought of as a parallel-plate capacitor, with the top plate being the
positive plate, oxide being the dielectric, and Si substrate being the negative plate. (We are
assuming P-substrate.)
• It is also called 2-Terminal MOS.
• The density of electrons in the channel varies with V1, as evident from Q = CV , where C denotes
the capacitance between the two plates.
• V1 controls the electron density.
• V1 can control the current by adjusting the resistivity of the channel.
• The equation for current density is:

• With increase of V1, n (number of charge carriers) increases and with

increase of V2 Electric Field increases.
• Thus, it acts as Voltage-controlled current source.
Structure of MOSFET

• Called the “gate” (G), the top conductive plate resides on a thin dielectric (insulator) layer, which itself is
deposited on the underlying p-type silicon “substrate.”
• In 2-Terminal MOS, electron generation was through the slow process of e-h pair generation. So, n+ regions are
added in 3-T MOS.
• These two terminals are called “source” (S) and “drain” (D) to indicate that the former can provide charge carriers
and the latter can absorb them.
• This device is symmetric, so either of the n+ regions can be source or drain.
• With n-type source/drain and p-type substrate, this transistor operates with electrons rather than holes and is
therefore called an n-type MOS (NMOS) device.
Symbol of MOSFET
Module Contents

• Working of MOS Transistor

• I-V Characteristics of MOSFET
• Pinch-off
• Earlier gate plate was realized by metal (aluminium).
• Now-a-days, the gate is formed by polysilicon as it exhibits better fabrication and
physical properties.
• The insulator is formed by Silicon dioxide.
• The gate terminal draws no (low-frequency) current as it is insulated
from the channel by the oxide.
• The only current of interest is that flowing between the source and the
drain.
• First, the holes are repelled by the positive gate voltage, leaving behind negative
ions and forming a depletion region. Next, electrons are attracted to the interface,
creating a channel (“inversion layer”).
Silicon-Boron Covalent bond
Effect of Gate Voltage:
• As VG increases from zero, the positive charge on the gate repels the holes in the substrate, thereby
exposing negative ions and creating a depletion region.
• The device still acts as a capacitor.
• Positive charge on the gate is mirrored by negative charge in the substrate.
• But no channel of mobile charge is created yet. Thus, no current can flow from the source to the
drain. We say the MOSFET is off.
• As VG increases further more negative ions are exposed and the depletion region under the oxide
becomes deeper.
• When all the boron atoms get ionized, free electrons are attracted to the oxide-silicon interface,
forming a conductive channel.
• The MOSFET is ON. The gate potential at which the channel begins to appear is called the
“threshold voltage,” (VTH).
• The electrons are readily provided by the n+ source and drain regions but still no current flows and
the device simply operates as a plate of a capacitor.
Effect of Drain Voltage:

• No current flows between S and D because the two terminals are at the same
potential.
• If VG < VTH, no channel exists, the device is off, and ID = 0 regardless of the value
of VD.
• On the other hand, if VG > VTH, then ID > 0.
• The source-drain path may act as a simple resistor, yielding the ID - VD
characteristic as shown in Fig. (c).
• The slope of the characteristic is equal to 1/Ron, where Ron denotes the “on-
resistance” of the transistor.
 MOS Characteristics:

• The MOS characteristics are measured by varying VG while keeping VD constant, and varying
VD while keeping VG constant.
• (d) shows the voltage dependence of channel resistance. The higher density of electrons in the
channel lowers the on-resistance, yielding a greater slope.
 Derivation of I/V Characteristics:

• We need an expression for the channel charge (i.e., free electrons) per unit length, also
called the “charge density.”
• Q=CxV
• Where, C is the gate capacitance per unit length
• V is the voltage difference between the gate and the channel
• Q is the desired charge density.
• Total capacitance considering the width of the transistor is:
• C = W x Cox
• Where, Cox is the gate capacitance per unit area
Derivation of I/V Characteristics:

• V (x) goes from zero to VD

• If the carriers move with a velocity of v m/s, then the charge
enclosed in v meters along the bar passes through the cross
section in one second.
• Since the charge enclosed in v meters is equal to Q . v, we
have
Derivation of I/V Characteristics:

ID

To find the maxima, dID/dVDS = 0

Maximum, value occurs at, ’

VDS =
• On substituting the value of VDS on the equation of drain current we get,
MOSFET Equations

In cutoff region

In linear region

In saturation region
 Pinch Off

• If the drain voltage is high enough to produce VG – VD VTH, then the channel ceases to exist near the drain.
• We say the gate-substrate potential difference is not sufficient at x = L to attract electrons and the channel is
“pinched off”
Transconductance:
• The variation of output drain current with respect to variation in input gate voltage.

• Using the equation of drain current in saturation region we get,

•

• Substituting for VGS - VTH from the equation of drain current we get,

• Dividing the equation of gm by the equation of ID we get,

MOS Device Models:

• Based on the I/V characteristics we derive the models used in circuit analysis and
design.

In linear region

In saturation region
MOS Device Models:
Large-Signal Model

• In the saturation region, the transistor acts as a voltage-controlled current source

• ID does depend on VDS and is therefore not an ideal current source.
Large-Signal Model

• For VDS < VGS - VTH, the model must reflect the triode region, but it can still
incorporate a voltage-controlled current source
Large-Signal Model

• If VDS << 2(VGS -VTH), the transistor can be viewed as a voltage-controlled

resistor.

• In all three cases, the gate remains an open circuit to represent the zero gate
current.
Small-Signal Model

• The small-signal model for the saturation region is

considered.
• The transistor is viewed as a voltage-controlled
current source.
• where iD = gmvGS and the gate remains open

• To represent channel-length modulation, i.e.,

variation of iD with vDS, we add a resistor.
Small-Signal Model

Since channel-length modulation is relatively small

Pinch Off

• Two observations are considered:

• (1) To form a channel, the potential difference between the gate and the oxide-silicon interface must
exceed VTH.
• (2) If the drain voltage remains higher than the source voltage, then the voltage at each point along the
channel with respect to ground increases as we go from the source towards the drain.
• Since the potential at the oxide-silicon interface rises from the source to the drain, the potential
difference between the gate and the oxide-silicon interface decreases along the x-axis.
Pinch Off

• After pinch-off the device still conducts.

• Once the electrons reach the end of the channel, they experience the high electric
field in the depletion region surrounding the drain junction and are rapidly swept
to the drain terminal.
• Voltage drop always remain constant and we get constant current in saturation.
Short Channel Device:
Short Channel Effects:
• Channel length becomes comparable to the depletion layer width near source and
drain junction.
• Some of the short channel effects are:
1. Channel Length Modulation
2. Punchthrough
3. Drain Induced Barrier Lowering (DIBL)
Channel Length Modulation:
IDS = (-QI)|Vd|
QI = Inversion charge
Vd = Carrier drift velocity
• As VDS increases beyond saturation value, Electric Field becomes very high.
• Drift velocity of carriers saturates.
• Inversion charge becomes minimum.
• Potential increases with distance therefore pinch off region increases from drain to
source.
• Effective channel length reduces.
• Drain current inversely depends on channel length and thus slightly increases.
Channel Length Modulation:
Effect of Channel Length Modulation on Current
 Punchthrough:
• Depletion region of source and drain reach each other.
• Two types of punchthrough:
 Surface punchthrough - It occurs for uniformly doped substrate
 Bulk punchthrough - Channel is ion implanted with higher concentration at the
surface.

Fig. (a) Surface punchthrough (b) Bulk punchthrough

Y. Tsividis, “Operation and Modeling of The MOS Transistor”

Drain Induced Barrier Lowering (DIBL):
• For short channel device, source and drain are very close to each other.
• Electric Field increases.
• This raises the surface potential.
• Energy barrier seen by the electrons to reach the channel reduces.
• Inversion charge increases in the channel. E=-qV, where E is the
energy and V is the
• Thus threshold voltage reduces. potential

Fig. (a) Long Channel Device (b) Short Channel Device

Fabrication Steps
Step1:

Consider a silicon substrate.

On this substrate the source and drain regions have
to be developed after the oxide layer.
Step 2: Oxidation

 Oxidation refers to the creation of an oxide layer of about 1

mm thickness on the silicon substrate.
 The ability of Si to form an oxide layer is very
important since this is one of the reasons for choosing Si
over Ge.
 Si exposed to ambient conditions has a native oxide on its
surface. The native oxide is approximately 3 nm thick at
room temperature.
 But this is too thin for most applications and hence a thicker
oxide needs to be grown.
 So, SiO2 is grown by a chemical vapor deposition process.
Types of Oxidation
Advantages of oxidation

 Oxidation helps in protecting the wafer from contamination, both physical and chemical. Thus, it
acts as a passivating layer.
 The oxide layer protects the wafer surface from scratches and it also prevents dust from interacting
with the wafer surface, and thus minimizes contamination.
 The oxide layer also protects the wafer from chemical impurities, mainly electrically active
contaminants.
 SiO2 is also used to prevent induced charge due to the metal layers.
Step 3 – Photoresist Coating

• To transfer the desired the desired pattern.

• The entire oxide surface is then covered with a layer of
photoresist, which is essentially a light-sensitive, acid-
resistant organic polymer, initially insoluble in the
developing solution.
Step 4 - Exposure to UV – Light or Photolithography

 After masking, the photoresist material is exposed

to ultraviolet (UV) light.
 The exposed areas become soluble so that they
are no longer resistant to etching solvents.
Step 5 – Etching of photoresist material

 To selectively expose the photoresist, we have

to cover some of the areas on the surface with a
mask during exposure.
 Thus, when the structure with the mask on top
is exposed to UV light, areas which are covered
by the opaque features on the mask are
shielded.
 In the areas where the UV light can pass
through, on the other hand, the photoresist is
exposed and becomes soluble
Types of Photoresist material

 The type of photoresist which is initially insoluble and becomes soluble after exposure to
UV light is called positive photoresist.
 There is another type of photoresist which is initially soluble and becomes insoluble
(hardened) after exposure to UV light, called negative photoresist.
 Negative photoresists are more sensitive to light, but their photolithographic resolution is
not as high as that of the positive photoresists. Therefore, negative photoresists are-used
less commonly in the manufacturing of high-density integrated circuits.
Step 6 - Etching of SiO2 region

• Now, the silicon dioxide regions which are

not covered by hardened photoresist can be
etched away either by using a chemical
solvent (HF acid) or by using a dry etch
(plasma etch) process.
 Step 7 - Etching of unexposed Photoresist material

 The remaining photoresist can now be stripped

from the silicon dioxide surface by using another
solvent, leaving the patterned silicon dioxide
feature on the surface.
Patterned Structure
CMOS
Oxidation
Photoresist Coating
Photolithography
Etching
Strip Photoresist
N-Well
Strip remaining oxide
Polysilicon
Polysilicon Patterning
N-diffusion
P-diffusion
Contacts
Metalization

• Sputter on aluminum over whole wafer.

• The surface is covered with evaporated aluminum which will form the
interconnects.
• Finally, the metal layer is patterned and etched, completing the interconnection of
the CMOS on the surface.
CMOS