Microprocessor
&
Interfacing
Hardware
Specifications
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
OBJECTIVES
• State the function of the pins of the 8088.
• List the functions of the 8086 data, address,
and control buses.
• State the differences in the 8086 microprocessor
in maximum mode versus minimum mode.
• Memory Interfacing
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MICROPROCESSOR
• 8086 is a 40-pin microprocessor chip that can work
in two modes: minimum mode and maximum mode.
• First 16-bit processor released by INTEL in the year
1978.
• Approximately 29,000 transistors, 5V supply.
• 20-bit address to access memory, can address up to
2^20= 1 megabytes memory locations.
• Uses a separate 16 bit address for I/O mapped
devices, can generate 2^16 = 64 k addresses.
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MICROPROCESSOR
data bus
– Due to chip packaging limitations in
the 1970s, there was great effort to
use the minimum number of pins
for external connections.
• Intel multiplexed address & data buses,
using the same pins to carry two sets of
information: address & data.
– Pins 9-16 (AD0–AD15) are used for
both data and addresses in 8086.
• AD stands for "address/data.”
– The ALE (address latch enable) pin
signals whether the information on
pins AD0–AD15 is address or data.
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MICROPROCESSOR
data bus
– When 8086 sends out an address,
it activates (sets high) the ALE, to
indicate the information on pins
AD0–AD15 is the address (A0–A15).
• This information must be latched, then
pins AD0–AD15 are used to carry data.
– When data is to be sent out or in,
ALE is low, which indicates that
AD0–AD15 will be used as data
buses (D0–D15).
– The process of separating address
and data from pins AD0–AD15 is
called demultiplexing.
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MICROPROCESSOR
address bus
– 8086 has 20 address pins (A0–A19),
allowing it to address a maximum of
one megabyte of memory (220 = 1M).
• To demultiplex address signals, a latch
must be used to grab the addresses.
– The last 4 bits of the address come
from A16–A19, pin numbers 35–38.
– These are multiplexed with status
signals.
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MICROPROCESSOR
other pins
– Pins 24–32 have different functions
depending on whether 8086 is in
minimum or maximum mode.
– In maximum mode, in the MAXIMUM
MODE the 8086 can work in multi-
processor or co-processor
configuration.
– In the minimum mode of operation
the microprocessor do not associate
with any co-processors and can not
be used for multiprocessor systems
(Single Processor).
• Min Mode is more cost efficient.
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MINIMUM MODE
pin descriptions
Functions of 8086 pins 24–32 in minimum mode.
M/IO
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MINIMUM MODE
pin descriptions
Functions of 8086 pins 24–32 in minimum mode.
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MAXIMUM MODE
8086 in maximum
mode, shows that
pins 24–32 have
different functions.
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MAXIMUM MODE
pin descriptions
• S0, S1, S2 (status input) - input to these pins comes
from the 8086.
– Depending upon the input from the CPU, the 8288 will
provide one of the commands or control signals shown:
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MAXIMUM MODE
pin descriptions
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MAXIMUM MODE
pin descriptions
• RQ/GT0, RQ/GT1 (Bus Request/ Bus Grant),these
requests are used by other local bus masters to
force the processor to release the local bus at the
end of the processor’s current bus cycle.
– These pins are bidirectional. The request on (GT0) will
have higher priority than (GT1 ).
• LOCK: an output signal activated by the LOCK
prefix instruction, and the bus is not to be used by
another processor until the completion of the
instruction prefixed by LOCK.
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MICROPROCESSOR
other pins
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MICROPROCESSOR
other pins
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MICROPROCESSOR
other pins
• RESET - terminates present activities of the
processor when a high is applied to the RESET
input pin.
A presence of high will
force the microprocessor
to stop all activity and set
the major registers to the
values shown at right.
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MICROPROCESSOR
other pins
• Pin BHE (bus high enable) - an active-low output
signal used to indicate that data is being transferred
on D8–D15.
– BHE and A0 are used to indicate whether the data transfer
is on D0–D7, D8–D15, or the entire bus, D0–D15.
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
8086 MICROPROCESSOR
other pins
• Pin CLK (clock) - an input
providing the working frequency
for the 8086.
• Pin GND (ground) - The ground
pin connects to ground.
• Pin VCC - This power supply pin
connects to +5V.
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
MEMORY INTERFACING
• If the CPU has a 16-bit data bus, address spaces
are designated as odd and even bytes, as shown:
The D0–D7 byte is
designated as even.
D8–D15 byte as odd.
To distinguish between
odd & even bytes, the
8086 CPU provide an
extra signal called BHE.
(bus high enable)
Odd and Even Banks of Memory in 16-Bit CPUs (8086)
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021
MEMORY INTERFACING
BHE, in association
with the A0 pin, is
used to select the
odd or even byte.
Microprocessor Dr. Abduljalil Radman
& Taiz University
Interfacing 2021