Module 4
• Introduction to the ARM Instruction set: Introduction, Data
processing instructions, Load – Store instruction, Software interrupt
instructions, Program status register instructions, Loading constants,
ARMv5E extensions, Conditional Execution.
• Text book 2: Chapter 3
Introduction ARM Instruction Set
• Different ARM architecture revisions support different instructions.
However, new revisions usually add instructions and remain
backwardly compatible.
• Code you write for architecture ARMv4T should execute on an
ARMv5TE processor.
• Table 3.1 provides a complete list of ARM instructions available in the
ARMv5E instruction set architecture (ISA). This ISA includes all the
core ARM instructions as well as some of the newer features in the
ARM instruction set.
• We will represent hexadecimal numbers with the prefix 0x
• Binary numbers with the prefix 0b.
• The examples follow this format:
• PRE <pre-conditions>
<instruction/s>
• POST<post-conditions>
• In the pre- and post-conditions, memory is denoted as
• mem<data_size>[address]
• Ex: mem32[1024] is the 32-bit value starting at address 1 KB.
• ARM instructions commonly take two or three operands.
• For instance the ADD instruction below adds the two values stored in
registers r1 and r2 (the source registers). It writes the result to
register r3 (the destination register).
Data Processing Instruction
• The data processing instructions manipulate data within registers. They are
• Move instructions,
• Arithmetic instructions,
• Logical instructions,
• Comparison instructions,
• And Multiply instructions.
• Most data processing instructions can process one of their operands using
the barrel shifter.
•
• If you use the S suffix on a data processing instruction, then it
updates the flags in the cpsr.
• Move and logical operations update the carry flag C, negative flag N,
and zero flag Z.
• The carry flag is set from the result of the barrel shift as the last bit
shifted out.
• The N flag is set to bit 31 of the result.
• The Z flag is set if the result is zero.
Move Instruction
• Move is the simplest ARM instruction. It copies N into a destination register Rd,
where N is a register or immediate value.
• This instruction is useful for setting initial values and transferring data between
registers.
Barrel Shifter
• Data processing instructions are processed within the arithmetic logic unit
(ALU).
• A unique and powerful feature of the ARM processor is the ability to shift the
32-bit binary pattern in one of the source registers left or right by a specific
number of positions beforeit enters the ALU.
• This shift increases the power and flexibility of many data processing operations.
• There are data processing instructions that do not use the barrel shift, for
example, the MUL (multiply), CLZ (count leading zeros), and QADD (signed
saturated 32-bit add) instructions.
• Pre-processing or shift occurs within the cycle time of the
instruction.
• This is particularly useful for loading constants into a
register and achieving fast multiplies or division by a power
of 2.
• Logical Shift Left (LSL):
• In a logical shift left operation, each bit in a binary number is shifted
to the left by a specified number of positions.
• The leftmost bits are shifted out, and the vacant positions on the right
are filled with zeros.
• Logical Shift Right (LSR):
• In a logical shift right operation, each bit in a binary number is shifted
to the right by a specified number of positions.
• The rightmost bits are shifted out, and the vacant positions on the left
are filled with zeros.
• What is the content of R0 and R1?