PE-CS-S302A Advanced Computer Architecture
Lecture Tutorial Practical Credit Major Test Minor Test Total Time
3 0 0 3 75 25 100 3 Hrs.
Purpose To enable students to learn various computational models, design paradigms of advanced
computer architecture, parallelism approaches and techniques for static and dynamic
interconnections.
Course Outcomes (CO)
CO1 Classify and interpret various paradigms, models and micro-architectural design of
advanced computer architecture as well as identify the parallel processing types and levels
for achieving optimum scheduling.
CO2 Identify the roles of VLIW & superscalar processors and branch handling techniques for
performance improvement.
CO3 Analyze and interpret the basic usage of various MIMD architectures and relative
importance of various types of static and dynamic connection networks for realizing
efficient networks.
CO4 Examine the various types of processors and memory hierarchy levels and cache coherence
problem including software and hardware based protocols to achieve better speed and
uniformity.
Unit-I
Computational Model: Basic computational models, evolution and interpretation of computer architecture,
concept of computer architecture as a multilevel hierarchical framework, classification of parallel
architectures, Relationships between programming languages and parallel architectures. Parallel Processing:
Types and levels of parallelism, Instruction Level Parallel (ILP) processors, dependencies between
instructions, principle and general structure of pipelines, performance measures of pipeline, pipelined
processing of integer, Boolean, load and store instructions, VLIW architecture, Code Scheduling for ILP
Processors - Basic block scheduling, loop scheduling, global scheduling.
Unit-II
Superscalar Processors: Emergence of superscalar processors, Tasks of superscalar processing – parallel
decoding, superscalar instruction issue, shelving, register renaming, parallel execution, preserving sequential
consistency of instruction execution and exception processing, comparison of VLIW & superscalar
processors. Branch Handling: Branch problem, Approaches to branch handling – delayed branching, branch
detection and prediction schemes, branch penalties, multiway branches, guarded execution.
Unit-III
MIMD Architectures: Concepts of distributed and shared memory MIMD architectures, UMA, NUMA,
CCNUMA & COMA models, problems of scalable [Link] connection networks: Linear array,
ring, chordal ring, barrel shifter, star, tree, mesh and torus, fat Tree, systolic array, barrel shifter, hypercubes
and Cube connected cycles. Dynamic interconnection networks: single shared buses, comparison of
bandwidths of locked, pended & split transaction buses, arbiter logics, crossbar networks, multistage
networks, omega networks, butterfly.
UNIT – IV
Processors and Memory Hierarchy: Advanced processor technology, memory hierarchy technology and
virtual memory technology. Cache Coherence and Synchronization Mechanisms: Cache coherence
problems, hardware based protocols – snoopy cache protocols, directory schemes, hierarchical cache
coherence protocols, software based protocols.
Suggested Books
1. [Link], [Link], [Link], Advanced Computer Architecture-A Design Space Approach,
Pearson Education.
2. Kai Hwang and Naresh Jotwani, Advanced Computer Architecture-Parallelism, Scalability,
Programmability, McGraw Hill.
3. M.J. Quinn, Parallel Computing: Theory and Practice, Second Edition, McGraw Hill.
4. J. L. Hennessy and D. A. Patterson, Computer Architecture: A Quantitative approach, Morgan
Kaufmann/Elsevier.
5. [Link] and H. EI-Rewini, Introduction to parallel computing, Prentice Hall.
6 Nicholas Carter, Computer Architecture, McGraw Hill
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