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EPC Module 1

The document discusses voltage-divider bias (VDB) circuits, emphasizing their design for stable Q points that are largely unaffected by variations in transistor characteristics. It outlines the analysis process for VDB circuits, including calculations for base voltage, emitter current, and collector-emitter voltage, while introducing concepts like stiff and firm voltage dividers. Additionally, it explains the significance of the Q point in amplifier design and how to adjust it through emitter resistance changes.

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0% found this document useful (0 votes)
18 views52 pages

EPC Module 1

The document discusses voltage-divider bias (VDB) circuits, emphasizing their design for stable Q points that are largely unaffected by variations in transistor characteristics. It outlines the analysis process for VDB circuits, including calculations for base voltage, emitter current, and collector-emitter voltage, while introducing concepts like stiff and firm voltage dividers. Additionally, it explains the significance of the Q point in amplifier design and how to adjust it through emitter resistance changes.

Uploaded by

radhikamg2006
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

19/09/2024, 20:16 EPC Module 1

Figure 8-1 Voltage-divider


bias. (a) Circuit; (b) voltage
8-1 Voltage-Divider Bias
divider; (c) simplified circuit. Figure 8-1a shows the most widely used biasing circuit. Notice that the base
+ VCC circuit contains a voltage divider (R1 and R2). Because of this, the circuit is
called voltage-divider bias (VDB).
+
+
R1
RC
Simplified Analysis


For troubleshooting and preliminary analysis, use the following method. In any
well-designed VDB circuit, the base current is much smaller than the current
+
+ through the voltage divider. Since the base current has a negligible effect on the
R2
RE
voltage divider, we can mentally open the connection between the voltage divider


and the base to get the equivalent circuit of Fig. 8-1b. In this circuit, the output of
the voltage divider is
(a) R2
VBB VCC
+ VCC R1 R2
Ideally, this is the base-supply voltage as shown in Fig. 8-1c.
As you can see, voltage-divider bias is really emitter bias in disguise. In
other words, Fig. 8-1c is an equivalent circuit for Fig. 8-1a. This is why VDB sets
R1 up a fixed value of emitter current, resulting in a solid Q point that is independent
of the current gain.
+VBB There is an error in this simplified approach, and we will discuss it in the
next section. The crucial point is this: In any well-designed circuit, the error in
R2 using Fig. 8-1c is very small. In other words, a designer deliberately chooses
circuit values so that Fig. 8-1a acts like Fig. 8-1c.

(b)

+ VCC Conclusion
After you calculate VBB, the rest of the analysis is the same as discussed earlier
RC for emitter bias in Chap. 7. Here is a summary of the equations you can use to
analyze VDB:
R2
VBB VCC (8-1)
R1 R2
+
VBB
VE VBB VBE (8-2)
RE

VE
IE (8-3)
RE
(c)
IC IE (8-4)
VC VCC I CR C (8-5)
VCE VC VE (8-6)
These equations are based on Ohm’s and Kirchhoff’s laws. Here are the steps in the analysis:
1. Calculate the base voltage VBB out of the voltage divider.
2. Subtract 0.7 V to get the emitter voltage (use 0.3 V for germanium).
3. Divide by the emitter resistance to get the emitter current.
4. Assume that the collector current is approximately equal to the emitter current.

262 Chapter 8

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GOOD TO KNOW 5. Calculate the collector-to-ground voltage by subtracting the voltage


Since V E IC RE , Eq. (8-6) can also
across the collector resistor from the collector supply voltage.
be shown as 6. Calculate the collector-emitter voltage by subtracting the emitter
V CE V CC IC RC IC RE
voltage from the collector voltage.
or Since these six steps are logical, they should be easy to remember. After
V CE V CC IC (RC RE ). you analyze a few VDB circuits, the process becomes automatic.

Example 8-1
What is the collector-emitter voltage in Fig. 8-2?

SOLUTION The voltage divider produces an unloaded output voltage of:


2.2 k
VBB 10 V 1.8 V
Figure 8-2 Example. 10 k 2.2 k
+10 V
Subtract 0.7 V from this to get:
VE 1.8 V 0.7 V 1.1 V
The emitter current is:
1.1 V
IE 1.1 mA
RC 1k
R1
3.6 kΩ
10 kΩ
Since the collector current almost equals the emitter current, we can calculate
the collector-to-ground voltage like this:
2N3904
VC 10 V (1.1 mA)(3.6 k ) 6.04 V
R2 RE The collector-emitter voltage is:
2.2 kΩ 1 kΩ
VCE 6.04 1.1 V 4.94 V
Here is an important point: The calculations in this preliminary analy-
sis do not depend on changes in the transistor, the collector current, or the tem-
perature. This is why the Q point of this circuit is stable, almost rock-solid.

PRACTICE PROBLEM 8-1 Change the power supply voltage of Fig. 8-2 from 10 V to 15 V and solve
for VCE.

Example 8-2
Discuss the significance of Fig. 8-3, which shows a MultiSim analysis of the same circuit analyzed in the
preceding example.

SOLUTION This really drives the point home. Here we have an almost identical answer using a com-
puter to analyze the circuit. As you can see, the voltmeter reads 6.03 V (rounded to 2 places). Compare this
to 6.04 V in the preceding example, and you can see the point. A simplified analysis has produced essen-
tially the same result as a computer analysis.
You can expect this kind of close agreement whenever a VDB circuit has been well designed.
After all, the whole point of VDB is to act like emitter bias to virtually eliminate the effects of changing the
transistor, collector current, or temperature.

Transistor Biasing 263

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Figure 8-3 MultiSim example.

PRACTICE PROBLEM 8-2 Using MultiSim, change the supply voltage of Fig. 8-3 to 15 V and
measure VCE. Compare your measured value to the answer of Practice Problem 8-1.

8-2 Accurate VDB Analysis


What is a well-designed VDB circuit? It is one in which the voltage divider appears stiff to the input resis-
tance of the base. The meaning of the last sentence needs to be discussed.

Source Resistance
Chapter 1 introduced the idea of a stiff voltage source:
Stiff voltage source: RS 0.01RL
When this condition is satisfied, the load voltage is within 1 percent of the ideal voltage. Now, let us extend
this idea to the voltage divider.

264 Chapter 8

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Figure 8-4 (a) Thevenin resistance; (b) equivalent circuit; (c) input resistance of base.
+ VCC

RC RC
R1

R1 R 2 + +
RTH VCC RIN VCC
– –
+
R2 VBB RE RE

(a ) (b) (c)

What is the Thevenin resistance of the voltage divider in Fig. 8-4a? Looking back into the voltage
divider with VCC grounded, we see R1 in parallel with R2. As an equation:
RTH R1 R2
Because of this resistance, the output voltage of the voltage divider is not ideal. A more accurate
analysis includes the Thevenin resistance, as shown in Fig. 8-4b. The current through this Thevenin resis-
tance reduces the base voltage from the ideal value of VBB.

Load Resistance
How much less than ideal is the base voltage? The voltage divider has to supply the base current in Fig. 8-4b.
Put another way, the voltage divider sees a load resistance of RIN, as shown in Fig. 8-4c. For the voltage di-
vider to appear stiff to the base, the 100 1 rule:
RS 0.01RL
translates to:
R1 R2 0.01RIN (8-7)
A well-designed VDB circuit will satisfy this condition.

Stiff Voltage Divider


If the transistor of Fig. 8-4c has a current gain of 100, its collector current is 100 times greater than the base
current. This implies that the emitter current is also 100 times greater than the base current. When seen from
the base side of the transistor, the emitter resistance RE appears to be 100 times larger. As a derivation:
RIN dcRE (8-8)
Therefore, Eq. (8-7) may be written as:
Stiff voltage divider: R1 R2 0.01 dcRE (8-9)
Whenever possible, a designer selects circuit values to satisfy this 100 1 rule because it will produce an ul-
trastable Q point.

Transistor Biasing 265

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Firm Voltage Divider


Sometimes a stiff design results in such small values of R1 and R2 that other problems arise (discussed later).
In this case, many designers compromise by using this rule:
Firm voltage divider: R1 R2 0.1 dcRE (8-10)
We call any voltage divider that satisfies this 10 1 rule a firm voltage divider. In the worst case, using a firm
voltage divider means that the collector current will be approximately 10 percent lower than the stiff value.
This is acceptable in many applications because the VDB circuit still has a reasonably stable Q point.

A Closer Approximation
If you want a more accurate value for the emitter current, you can use the following derivation:

VBB VB E
IE (8-11)
RE (R 1 R2) / dc

This differs from the stiff value because (R1 R2)/ dc is in the denominator. As this term approaches zero, the
equation simplifies to the stiff value.
Equation (8-11) will improve the analysis, but it is a fairly complicated formula. If you have a com-
puter and need a more accurate analysis obtained with the stiff analysis, you should use MultiSim or an
equivalent circuit simulator.

Example 8-3
Is the voltage divider of Fig. 8-5 stiff? Calculate the more accurate value of
Figure 8-5 Example.
emitter current using Eq. (8-11).
+10 V

SOLUTION Check to see whether the 100 :1 rule has been used:
Stiff voltage divider: R1 R2 0.01 dcRE

R1 RC The Thevenin resistance of the voltage divider is:


3.6 kΩ
10 kΩ
(1 0 k )(2 .2 k )
2N3904 R1 R2 10 k 2.2 k 1.8 k
bdc = 200 10 k 2.2 k
R2 RE The input resistance of the base is:
2.2 kΩ
1 kΩ
dcRE (200)(1 k ) 200 k
and one-hundredth of this is:
0.01 dcRE 2k
Since 1.8 k is less than 2 k , the voltage divider is stiff.
With Eq. (8-11), the emitter current is

1.8 V 0.7 V 1.1 V


IE 1.09 mA
1k (1.8 k )/200 1k 9

This is extremely close to 1.1 mA, the value we get with the simplified analysis.
266 Chapter 8

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The point is this: You don’t have to use Eq. (8-11) to calculate emitter current when the voltage di-
vider is stiff. Even when the voltage divider is firm, the use of Eq. (8-11) will improve the calculation for
emitter current only by at most 10 percent. Unless otherwise indicated, from now on all analysis of VDB
circuits will use the simplified method.

8-3 VDB Load Line and Q Point


Because of the stiff voltage divider in Fig. 8-6, the emitter voltage is held constant at 1.1 V in the following
discussion.

The Q Point
The Q point was calculated in Sec. 8-1. It has a collector current of 1.1 mA and a collector-emitter voltage of
4.94 V. These values are plotted to get the Q point shown in Fig. 8-6. Since voltage-divider bias is derived
from emitter bias, the Q point is virtually immune to changes in current gain. One way to move the Q point
in Fig. 8-6 is by varying the emitter resistor.
For instance, if the emitter resistance is changed to 2.2 k , the collector current decreases to:
1.1 V
IE 0.5 mA
2.2 k
The voltages change as follows:
VC 10 V (0.5 mA)(3.6 k ) 8.2 V
and
VCE 8.2 V 1.1 V 7.1 V
Therefore, the new Q point will be QL and will have coordinates of 0.5 mA and 7.1 V.
On the other hand, if we decrease the emitter resistance to 510 , the emitter current increases to:
1 .1 V
IE 2.15 mA
51 0

Figure 8-6 Calculating the Q point.


+10 V
IC
R1 RC
10 kΩ IC(sat)
QH
3.6 kΩ
VB
Q
1.1 mA
RE
R2 QL
1 kΩ
2.2 kΩ
VCE
4.94 V VCE (cutoff)

Transistor Biasing 267

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GOOD TO KNOW and the voltages change to:


Centering the Q point on a VC 10 V (2.15 mA)(3.6 k ) 2.26 V
transistor load line is and
important because it allows VCE 2.26 V 1.1 V 1.16 V
for the maximum ac output
voltage from the amplifier. In this case, the Q point shifts to a new position at QH with coordinates of
Centering the Q point on the 2.15 mA and 1.16 V.
dc load line is sometimes
referred to as midpoint bias. Q Point in Middle of Load Line
VCC, R1, R2, and RC control the saturation current and the cutoff voltage. A change in any of these quantities
will change IC(sat) and/or VCE(cutoff ). Once the designer has established the values of the foregoing variables,
the emitter resistance is varied to set the Q point at any position along the load line. If RE is too large, the Q
point moves into the cutoff point. If RE is too small, the Q point moves into saturation. Some designers set the
Q point at the middle of the load line.

VDB Design Guideline


Figure 8-7 shows a VDB circuit. This circuit will be used to demonstrate a simplified design guideline to es-
tablish a stable Q point. This design technique is suitable for most circuits, but it is only a guideline. Other de-
sign techniques can be used.
Before starting the design, it is important to determine the circuit requirements or specifications. The
circuit is normally biased for VCE to be at a midpoint value with a specified collector current. You also need
to know the value of VCC and the range of dc for the transistor being used. Also, be sure the circuit will not
cause the transistor to exceed its power dissipation limits.
Start by making the emitter voltage approximately one-tenth of the supply voltage:
VE 0.1 VCC
Next, calculate the value of RE to set up the specified collector current:
VE
RE IE
Since the Q point needs to be at approximately the middle of the dc load line, about 0.5 VCC appears
across the collector-emitter terminals. The remaining 0.4 VCC appears across the collector resistor; therefore:
RC 4 RE
Next, design for a stiff voltage divider using the 100 :1 rule:
Figure 8-7 VDB design. RTH 0.01 dc RE
+10 V
Usually, R2 is smaller than R1. Therefore, the stiff voltage divider equa-
tion can be simplified to:
+ R2 0.01 dc RE
RC
R1 V1
You may also choose to design for a firm voltage divider by using the
– 10 :1 rule:
R2 0.1 dc RE
+
In either case, use the minimum-rated dc value at the specified collector current.
R2 V2
RE Finally, calculate R1 by using proportion:

V1
R1 V2 R2

268 Chapter 8

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Example 8-4
For the circuit shown in Fig. 8-7, design the resistor values to meet these specifications:
VCC 10 V VCE @ midpoint
IC 10 mA 2N3904’s dc 100–300
SOLUTION First, establish the emitter voltage by:
VE 0.1 VCC
VE (0.1) (10 V) = 1 V
The emitter resistor is found by:
VE
RE
IE
1V
RE 100
10 mA
The collector resistor is:
RC 4 RE
RC (4) (100 ) 400 (use 390 )
Next, choose either a stiff or firm voltage divider. A stiff value of R2 is found by:
R2 0.01 dc RE
R2 (0.01) (100) (100 ) 100
Now, the value of R1 is:
V1
R1 R
V2 2
V2 VE 0.7 V 1V 0.7 V 1.7 V
V1 VCC V2 10 V 1.7 V 8.3 V
8.3 V
R1 (100 ) 488 (use 490 )
1.7 V

PRACTICE PROBLEM 8-4 Using the given VDB design guidelines, design the VDB circuit of Fig. 8-7
to meet these specifications:
VCC 10 V VCE @ midpoint stiff voltage divider
IC 1 mA dc 70-200

8-4 Two-Supply Emitter Bias


Some electronic equipment has a power supply that produces both positive and negative supply voltages. For in-
stance, Fig. 8-8 shows a transistor circuit with two power supplies: 10 and 2 V. The negative supply forward
biases the emitter diode. The positive supply reverse biases the collector diode. This circuit is derived from emit-
ter bias. For this reason, we refer to it as two-supply emitter bias (TSEB).
Transistor Biasing 269

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Figure 8-8 Two-supply emitter bias. Figure 8-9 Redrawn TSEB circuit.
+10 V
+
3.6 kΩ
3.6 kΩ

+
10 V


2.7 kΩ +
2.7 kΩ
+ 1 kΩ 1 kΩ



2V –2 V
+

Analysis
The first thing to do is to redraw the circuit as it usually appears on schematic diagrams. This means deleting
the battery symbols, as shown in Fig. 8-9. This is necessary on schematic diagrams because there usually is
no room for battery symbols on complicated diagrams. All the information is still on the diagram, except that
it is in condensed form. That is, a negative supply voltage of 2 V is applied to the bottom of the 1 k , and
a positive supply voltage of 10 V is applied to the top of the 3.6-k resistor.
When this type of circuit is correctly designed, the base current
GOOD TO KNOW will be small enough to ignore. This is equivalent to saying that the base
When transistors are biased using voltage is approximately 0 V, as shown in Fig. 8-10.
well-designed voltage-divider or The voltage across the emitter diode is 0.7 V, which is why
emitter-bias configurations, they 0.7 V is shown on the emitter node. If this is not clear, stop and think
are classified as beta-independent about it. There is a plus-to-minus drop of 0.7 V in going from the base to
circuits because the values of the emitter. If the base voltage is 0 V, the emitter voltage must be 0.7 V.
I C and V CE are unaffected by In Fig. 8-10, the emitter resistor again plays the key role in set-
changes in the transistor’s beta. ting up the emitter current. To find this current, apply Ohm’s law to the
emitter resistor as follows: The top of the emitter resistor has a voltage of 0.7 V, and the bottom has a volt-
age of 2 V. Therefore, the voltage across the emitter resistor equals the difference between the two voltages.
To get the right answer, subtract the more negative value from the more positive value. In this case, the more
negative value is 2 V, so:
VRE 0.7 V ( 2 V) 1.3 V
Once you have found the voltage across the emitter resistor,
Figure 8-10 Base voltage is ideally zero. calculate the emitter current with Ohm’s law:
+10 V 1.3 V
IE 1.3 mA
RC 1k
3.6 kΩ
This current flows through the 3.6 k and produces a voltage drop that we
0V
subtract from 10 V as follows:

–0.7 V
VC 10 V (1.3 mA)(3.6 k ) 5.32 V
RB The collector-emitter voltage is the difference between the collector voltage
RE
2.7 kΩ
1 kΩ
and the emitter voltage:
–2 V VCE 5.32 V ( 0.7 V) 6.02 V

270 Chapter 8

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When two-supply emitter bias is well designed, it is similar to voltage-divider bias and satisfies this
100 1 rule:
RB 0.01 dcRE (8-12)
In this case, the simplified equations for analysis are:
VB 0 (8-13)
VEE 0.7 V
IE (8-14)
RE
VC VCC I CR C (8-15)
VCE VC 0.7 V (8-16)

Base Voltage
One source of error in the simplified method is the small voltage across the base resistor of Fig. 8-10. Since
a small base current flows through this resistance, a negative voltage exists between the base and ground. In
a well-designed circuit, this base voltage is less than 0.1 V. If a designer has to compromise by using a
larger base resistance, the voltage may be more negative than 0.1 V. If you are troubleshooting a circuit like
this, the voltage between the base and ground should produce a low reading; otherwise, something is wrong
with the circuit.

Example 8-5
What is the collector voltage in Fig. 8-10 if the emitter resistor is increased to 1.8 k ?

SOLUTION The voltage across the emitter resistor is still 1.3 V. The emitter current is:
1.3 V
IE 0.722 mA
1.8 k
The collector voltage is:
VC 10 V (0.722 mA)(3.6 k ) 7.4 V
PRACTICE PROBLEM 8-5 Change the emitter resistor of Fig. 8-10 to 2 k and solve for VCE.

Example 8-6
A stage is a transistor and the passive components connected to it. Figure 8-11 shows a three-stage circuit
using two-supply emitter bias. What are the collector-to-ground voltages for each stage in Fig. 8-11?

SOLUTION To begin with, ignore the capacitors because they appear as open circuits to dc voltage and
currents. Then, we are left with three isolated transistors, each using two-supply emitter bias.
The first stage has an emitter current of:
15 V 0 .7 V 14.3 V
IE 0.715 mA
20 k 20 k
and a collector voltage of:
VC 15 V (0.715 mA)(10 k ) 7.85 V
Since the other stages have the same circuit values, each has a collector-to-ground voltage of ap-
proximately 7.85 V.
Summary Table 8-1 illustrates the four main types of bias circuits.

PRACTICE PROBLEM 8-6 Change the supply voltages of Fig. 8-11 to 12 V and 12 V. Then,
calculate VCE for each transistor.
Transistor Biasing 271

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Figure 8-11 Three-stage circuit.


+15 V

10 kΩ 10 kΩ 10 kΩ

vout

vin

33 kΩ 33 kΩ 33 kΩ
20 kΩ 20 kΩ 20 kΩ

–15 V

Summary Table 8–1 Main Bias Circuits


Type Circuit Calculations Characteristics Where used

Base bias Few parts; Switch; digital


VBB 0.7 V
+VCC IB
RB dependent;
RC
fixed base
RB current
+V BB IC IB

VCE VCC I C RC

Fixed emitter IC driver;


Emitter bias VE VBB 0.7 V
current; amplifier
+V CC VE independent
IE
RC RE
+ VBB VC VC I C RC
RE

VCE VC VE

Voltage divider bias R2 Needs more


VB VCC
+ VCC
R1 R2 resistors; Amplifier
independent;
VE VB 0.7 V
RC
needs only one
R1

VE power supply
IE
RE
R2
RE
VC VCC I C RC

VCE VC VE

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Summary Table 8–1 (continued)


Type Circuit Calculations Characteristics Where used

Two-supply emitter bias VB 0V Needs positive Amplifier


+VCC and negative
VE VB 0.7 V power
RC
supplies;
VRE VEE 0.7 V independent

RB VRE
RE IE RE
–VEE
VC VCC I C RC

VCE VC VE

Figure 8-12 ( a)
Base bias; 8-5 Other Types of Bias
(b) emitter- In this section, we will discuss some other types of bias. A detailed analysis of these types
feedback bias. of bias is not necessary because they are rarely used in new designs. But you should at
+VCC
least be aware of their existence in case you see them on a schematic diagram.

RC
Emitter-Feedback Bias
RB
Recall our discussion of base bias (Fig. 8-12a). This circuit is the worst when it comes to
setting up a fixed Q point. Why? Since the base current is fixed, the collector current
varies when the current gain varies. In a circuit like this, the Q point moves all over the
load line with transistor replacement and temperature change.
Historically, the first attempt at stabilizing the Q point was emitter-feedback
( a)
bias, shown in Fig. 8-12b. Notice that an emitter resistor has been added to the circuit.
The basic idea is this: If IC increases, VE increases, causing VB to increase. More VB
+VCC
means less voltage across RB . This results in less IB, which opposes the original increase
in IC . It’s called feedback because the change in emitter voltage is being fed back to the
base circuit. Also, the feedback is called negative because it opposes the original change
RC
RB in collector current.
Emitter-feedback bias never became popular. The movement of the Q point is
still too large for most applications that have to be mass-produced. Here are the equations
for analyzing the emitter-feedback bias:
RE V C C V BE
IE (8-17)
R E RB / dc
VE I ER E (8-18)
( b)

VB VE 0.7 V (8-19)
VC VCC I CR C (8-20)

Transistor Biasing 273

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Figure 8-13 (a) Example of emitter-feedback bias; (b) Q point is sensitive to changes in
current gain.
+15 V IC

430 kΩ 910 Ω
14.9 mA
9.33 mA bdc = 300

3.25 mA bdc = 100


VCE
100 Ω 15 V

(a ) ( b)

The intent of emitter-feedback bias is to swamp out the variations in dc; that is, RE should be much
greater than RB/ dc. If this condition is satisfied, Eq. (8-17) will be insensitive to changes in dc. In practical
circuits, however, a designer cannot select RE large enough to swamp out the effects of dc without cutting off
the transistor.
Figure 8-13a shows an example of an emitter-feedback bias circuit. Figure 8-13b shows the load
line and the Q points for two different current gains. As you can see, a 3 1 variation in current gain produces
a large variation in collector current. The circuit is not much better than base bias.

Collector-Feedback Bias
Figure 8-14a shows collector-feedback bias (also called self-bias). Historically, this was another attempt at
stabilizing the Q point. Again, the basic idea is to feed back a voltage to the base in an attempt to neutralize
any change in collector current. For instance, suppose the collector current increases. This decreases the col-

Figure 8-14 (a) Collector-feedback bias; (b) example; (c) Q point is less sensitive to
changes in current gain.
+V CC

RC
RB

( a)

IC
+15 V
15 mA
1 kΩ
200 kΩ
bdc = 300
8.58 mA

4.77 mA bdc = 100

VCE
15 V

(b ) ( c)

274 Chapter 8

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lector voltage, which decreases the voltage across the base resistor. In turn, this decreases the base current,
which opposes the original increase in collector current.
Like emitter-feedback bias, collector-feedback bias uses negative feedback in an attempt to reduce
the original change in collector current. Here are the equations for analyzing collector-feedback bias:

V CC V BE
IE (8-21)
RC RB / dc
VB 0.7 V (8-22)
VC VCC I CR C (8-23)

The Q point is usually set near the middle of the load line by using a base resistance of:

RB dcRC (8-24)

Figure 8-14b shows an example of collector-feedback bias. Figure 8-14c shows the load line and the
Q points for two different current gains. As you can see, a 3 1 variation in current gain produces less varia-
tion in collector current than emitter-feedback (see Fig. 8-13b).
Collector-feedback bias is more effective than emitter-feedback bias in stabilizing the Q point. Al-
though the circuit is still sensitive to changes in current gain, it is used in practice because of its simplicity.

Collector- and Emitter-Feedback Bias


Figure 8-15 Collector-
emitter feedback bias. Emitter-feedback bias and collector-feedback bias were the first steps toward a
+ VCC
more stable bias for transistor circuits. Even though the idea of negative feedback
is sound, these circuits fall short because there is not enough negative feedback to
RC do the job. This is why the next step in biasing was the circuit shown in Fig. 8-15.
RB The basic idea is to use both emitter and collector feedback to try to improve the
operation.
As it turns out, more is not always better. Combining both types of
feedback in one circuit helps but still falls short of the performance needed for mass
production. If you come across this circuit, here are the equations for analyzing it:
RE
VC C V BE
IE (8-25)
RC RE RB / dc

VE I ER E (8-26)
VB VE 0.7 V (8-27)
VC VCC I CR C (8-28)

8-6 Troubleshooting
Let us discuss troubleshooting voltage-divider bias because this biasing method is the most widely used.
Figure 8-16 shows the VDB circuit analyzed earlier. Table 8-1 lists the voltages for the circuit when it is sim-
ulated with MultiSim. The voltmeter used to make the measurements has an input impedance of 10 M .
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9-1 Base-Biased Amplifier


In this section, we will discuss a base-biased amplifier. Although a base-biased amplifier is not useful in mass
production, it has instructional value because its basic ideas can be used to build more complicated amplifiers.

Coupling Capacitor
Figure 9-1a shows an ac voltage source connected to a capacitor and a resistor. Since the impedance of the
capacitor is inversely proportional to frequency, the capacitor effectively blocks dc voltage and transmits ac
voltage. When the frequency is high enough, the capacitive reactance is much smaller than the resistance. In
this case, almost all the ac source voltage appears across the resistor. When used in this way, the capacitor is
called a coupling capacitor because it couples or transmits the ac signal to the resistor. Coupling capacitors
are important because they allow us to couple an ac signal into an amplifier without disturbing its Q point.
For a coupling capacitor to work properly, its reactance must be much smaller than the resistance at
the lowest frequency of the ac source. For instance, if the frequency of the ac source varies from 20 Hz to
20 kHz, the worst case occurs at 20 Hz. A circuit designer will select a capacitor whose reactance at 20 Hz is
much smaller than the resistance.
How small is small? As a definition:
Good coupling: XC 0.1R (9-1)
In words: The reactance should be at least 10 times smaller than the resistance at the lowest frequency of op-
eration.
When the 10 1 rule is satisfied, Fig. 9-1a can be replaced by the equivalent circuit of Fig. 9-1b. Why?
The magnitude of impedance in Fig. 9-1a is given by:
2
Z R XC2
When you substitute the worst-case into this, you get:
2 2
Z R ( 0.1 R)2 R 0.01R 2 1 .01R 2 1.005R
Since the impedance is within half of a percent of R at the lowest frequency, the current in Fig. 9-1a is only
half a percent less than the current in Fig. 9-1b. Since any well-designed circuit satisfies the 10 1 rule, we can
approximate all coupling capacitors as an ac short (Fig. 9-1b).
A final point about coupling capacitors: Since dc voltage has a frequency of zero, the reactance of a
coupling capacitor is infinite at zero frequency. Therefore, we will use these two approximations for a capac-
itor:
1. For dc analysis, the capacitor is open.
2. For ac analysis, the capacitor is shorted.

Figure 9-1 (a) Coupling capacitor; (b) capacitor is an ac short; (c) dc open and ac short.
C
SHORT

V R V R DC

AC
(a ) (b ) (c)

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Figure 9-1c summarizes these two important ideas. Unless otherwise stated, all the circuits we analyze from
now on will satisfy the 10 1 rule, so that we can visualize a coupling capacitor as shown in Fig. 9-1c.

Example 9-1
Using Fig. 9-1a, if R 2 k and the frequency range is from 20 Hz to 20 kHz, find the value of C needed
to act as a good coupling capacitor.

SOLUTION Following the 10 :1 rule, XC should be ten times smaller than R at the lowest frequency.
Therefore,
XC 0.1 R at 20 Hz
XC 200 at 20 Hz

1
Since XC
2 fC

1 1
by rearrangement, C
2 f XC (2 )(20 Hz)(200 )

C 39.8 F

PRACTICE PROBLEM 9-1Using Example 9-1, find the value of C when the lowest frequency is
1 kHz and R is 1.6 k .

DC Circuit
Figure 9-2a shows a base-biased circuit. The dc base voltage is 0.7 V. Because 30 V is much greater than 0.7 V,
the base current is approximately 30 V divided by 1 M , or:
IB 30 A
With a current gain of 100, the collector current is:
IC 3 mA
and the collector voltage is:
VC 30 V (3 mA)(5 k ) 15 V
So, the Q point is located at 3 mA and 15 V.

Amplifying Circuit
Figure 9-2b shows how to add components to build an amplifier. First, a coupling capacitor is used between
an ac source and the base. Since the coupling capacitor is open to direct current, the same dc base current ex-
ists with or without the capacitor and ac source. Similarly, a coupling capacitor is used between the collector
and the load resistor of 100 k . Since this capacitor is open to direct current, the dc collector voltage is the

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Figure 9-2 (a) Base bias; (b) base-biased amplifier.


+30 V

5 kΩ
1 MΩ
+15 V

bdc = 100
+0.7 V

( a)

+30 V

5 kΩ
1 MΩ

100 kΩ
100 m V

( b)

same with or without the capacitor and load resistor. The key idea is that the coupling capacitors prevent the
ac source and load resistance from changing the Q point.
In Fig. 9-2b, the ac source voltage is 100 V. Since the coupling capacitor is an ac short, all the ac
source voltage appears between the base and the ground. This ac voltage produces an ac base current that is
added to the existing dc base current. In other words, the total base current will have a dc component and an
ac component.
Figure 9-3a illustrates the idea. An ac component is superimposed on the dc component. On the pos-
itive half cycle, the ac base current adds to the 30 A of dc base current, and on the negative half cycle it sub-
tracts from it.
The ac base current produces an amplified variation in collector current because of the current gain.
In Fig. 9-3b, the collector current has a dc component of 3 mA. Superimposed on this is an ac collector cur-
rent. Since this amplified collector current flows through the collector resistor, it produces a varying voltage
across the collector resistor. When this voltage is subtracted from the supply voltage, we get the collector
voltage shown in Fig. 9-3c.
Again, an ac component is superimposed on a dc component. The collector voltage is swinging si-
nusoidally above and below the dc level of 15 V. Also, the ac collector voltage is inverted, 180° out of phase
with the input voltage. Why? On the positive half cycle of ac base current, the collector current increases, pro-
ducing more voltage across the collector resistor. This means that there is less voltage between the collector

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Figure 9-3 DC and ac components. (a) Base current; (b) collector current; (c) collector
voltage.
IB

30 m A

t
( a)

IC

3 mA

t
( b)

VC

15 V

t
( c)

and ground. Similarly, on the negative half cycle the collector current decreases. Since there is less voltage
across the collector resistor, the collector voltage increases.

Voltage Waveforms
Figure 9-4 shows the waveforms for a base-biased amplifier. The ac source voltage is a small sinusoidal volt-
age. This is coupled into the base, where it is superimposed on the dc component of 0.7 V. The variation in
base voltage produces sinusoidal variations in base current, collector current, and collector voltage. The total
collector voltage is an inverted sine wave superimposed on the dc collector voltage of 15 V.
Notice the action of the output coupling capacitor. Since it is open to direct current, it blocks the
dc component of collector voltage. Since it is shorted to alternating current, it couples the ac collector volt-
age to the load resistor. This is why the load voltage is a pure ac signal with an average value of zero.

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Figure 9-4 Base-biased amplifier with waveforms.


+30 V

5 kΩ
1 MΩ +15 V 0

0 +0.7 V

100 kΩ

Voltage Gain
The voltage gain of an amplifier is defined as the ac output voltage divided by the ac input voltage. As a de-
finition:
v
AV = out (9-2)
vin
For instance, if we measure an ac load voltage of 50 mV with an ac input voltage of 100 V, the voltage gain is:
5 0 mV
AV 500
100 V
This says that the ac output voltage is 500 times larger than the ac input voltage.

Calculating Output Voltage


We can multiply both sides of Eq. (9-2) by vin to get this derivation:
vout AV vin (9-3)
This is useful when you want to calculate the value of vout, given the values of AV and vin.
For instance, the triangular symbol shown in Fig. 9-5a is used to indicate an amplifier of any design.
Since we are given an input voltage of 2 mV and a voltage gain of 200, we can calculate an output voltage of:
vout (200)(2 mV) 400 mV
Figure 9-5 (a) Calculating output
voltage; (b) calculating input voltage.
Calculating Input Voltage
v in vout
2 mV AV = 200 We can divide both sides of Eq. (9-3) by AV to get this derivation:
vout
vin (9-4)
AV
(a )
This is useful when you want to calculate the value of vin, given the val-
ues vout and AV. For instance, the output voltage is 2.5 V in Fig. 9-5b.
vin v out With a voltage gain of 350, the input voltage is:
AV = 350 2.5 V
2.5 V
vin 7.14 mV
350
(b )

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Figure 9-6 (a) Bypass


capacitor; (b) point E is an 9-2 Emitter-Biased Amplifier
ac ground. The base-biased amplifier has an unstable Q point. For this reason, it is not used
R E
much as an amplifier. Instead, an emitter-biased amplifier (either VDB or TSEB)
with its stable Q point is preferred.
V C

Bypass Capacitor
(a )
A bypass capacitor is similar to a coupling capacitor because it appears open to di-
R E
AC
rect current and shorted to alternating current. But it is not used to couple a signal
GROUNDbetween two points. Instead, it is used to create an ac ground.
V Figure 9-6a shows an ac voltage source connected to a resistor and a
capacitor. The resistance R represents the Thevenin resistance as seen by the
capacitor. When the frequency is high enough, the capacitive reactance is much
b( )
smaller than the resistance. In this case, almost all the ac source voltage appears
across the resistor. Stated another way, point E is effectively shorted to ground.
When used in this way, the capacitor is called a bypass capacitor because it bypasses or shorts point
E to ground. A bypass capacitor is important because it allows us to create an ac ground in an amplifier with-
out disturbing its Q point.
For a bypass capacitor to work properly, its reactance must be much smaller than the resistance at
the lowest frequency of the ac source. The definition for good bypassing is identical to that for good coupling:
Good bypassing: XC 0.1R (9-5)
When this rule is satisfied, Fig. 9-6a can be replaced by the equivalent circuit of Fig. 9-6b.

Example 9-2
In Fig. 9-7, the input frequency of V is 1 kHz. What value of C is needed to
Figure 9-7 effectively short point E to ground?
R1 E

+
600 Ω SOLUTION First, find the Thevenin resistance as seen by the
V
R2
C capacitor C.
1 kΩ

RTH R1 R2
RTH 600 1k 375
Next, XC should be ten times smaller than RTH. Therefore, XC 37.5 at
1 kHz. Now solve for C by
1 1
C 2 f XC (2 )(1 kHz)(37.5 )

C 4.2 F

PRACTICE PROBLEM 9-2In Fig. 9-7, find the value of C needed if


R is 50 .

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Figure 9-8 VDB amplifier with waveforms.


+10 V

3.6 kΩ
+6.04 V 0
10 kΩ

0 +1.8 V

+1.1 V

100 mV 2.2 kΩ 100 kΩ


1 kΩ

VDB Amplifier
Figure 9-8 shows a voltage-divider-biased (VDB) amplifier. To calculate the dc voltages and currents, men-
tally open all capacitors. Then, the transistor circuit simplifies to the VDB circuit analyzed in Chap. 8. The
quiescent or dc values for this circuit are:
VB 1.8 V
VE 1.1 V
VC 6.04 V
IC 1.1 mA
As before, we use a coupling capacitor between the source and
GOOD TO KNOW base, and another coupling capacitor between the collector and the load
In Fig. 9-8, the emitter voltage is resistance. We also need to use a bypass capacitor between the emitter
rock-solid at 1.1 V because of the and ground. Without this capacitor, the ac base current would be much
emitter bypass capacitor. Therefore, smaller. But with the bypass capacitor, we get a much larger voltage
any variations in the base gain. The mathematical details of why this happens are discussed in the
voltage appear directly across next chapter.
the BE junction of the transistor. In Fig. 9-8, the ac source voltage is 100 V. This is coupled
For example, assume that into the base. Because of the bypass capacitor, all of this ac voltage ap-
v in 10 mV pp. At the positive pears across the base-emitter diode. The ac base current then produces
peak of vin , the ac base voltage an amplified ac collector voltage, as previously described.
equals 1.805 V and VBE equals
1.805 V 1.1 V 0.705 V. At the
negative peak of vin , the ac base VDB Waveforms
voltage decreases to 1.795 V, and
then V BE equals 1.795 V 1.1 V Notice the voltage waveforms in Fig. 9-8. The ac source voltage is a
0.695 V. The ac variations in small sinusoidal voltage with an average value of zero. The base voltage
VBE (0.705 to 0.695 V) are what is an ac voltage superimposed on a dc voltage of 1.8 V. The collector
produces the ac variations in I C voltage is an amplified and inverted ac voltage superimposed on the dc
and V CE . collector voltage of 6.04 V. The load voltage is the same as the collec-
tor voltage, except that it has an average value of zero.
Notice also the voltage on the emitter. It is a pure dc voltage of 1.1 V. There is no ac emitter volt-
age because emitter is at ac ground, a direct result of using a bypass capacitor. This is important to remember
because it is useful in troubleshooting. If the bypass capacitor were to open, an ac voltage would appear be-
tween the emitter and ground. This symptom would immediately point to the open bypass capacitor as the
unique trouble.

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