Addis Ababa Science and Technology
University
Department of Electromechanical Engineering
Course Title : Embedded system Group Assignment
Course Code : EMEg5105
Members ID Section
1 Natnael Betru ETS1273/14 B
2 Mohammed Nesredin ETS1119/14 C
3 Samuel Alemayehu ETS1128/13 C
4 Orion Ephrem ETS1321/14 C
5 Nathan Tagel ETS1208/14 C
Submitted to : Ins. Kassahun Tamir
Submission Date : 12/12/2025
Table Of Content
Introduction ................................................................................................................................................... 1
1.1 Special Purpose Registers and Their Functions ...................................................................... 2
1. Byte-Oriented Instruction : ........................................................................................................................3
2. Bit-Oriented Instructions : ......................................................................................................................... 4
3. Literal / Control Instructions : ................................................................................................................... 4
2.1 Instruction Types ..................................................................................................................................... 4
1) Byte-Oriented Instructions: Operate on file registers or WREG. ..................................................... 4
2) Bit-Oriented Instructions: Operate on individual bits within file registers. ......................................4
Examples: BSF f, b — Set a bit .....................................................................................................4
3) Literal and Control Instructions: Use immediate values or control flow changes. ........................... 4
Examples: MOVLW k — Load literal into WREG, XORLW k — XOR literal with WREG .... 4
4) Control/Branch Instructions: Used for program flow. .............................................................. 4
2.3 Data Types ...............................................................................................................................................4
The PIC16F877A is an 8-bit microcontroller, so most data types revolve around 8-bit handling. The
primary available data types include: ............................................................................................................ 4
2. Bit Data : Individual bits within a file register Used for flags, digital I/O pins, control bits Value: 0
or 1 .........................................................................................................................................................5
3. 14-bit Instruction Words: Each instruction stored in program memory is 14 bits wide ................... 5
4. 16-bit Addresses: Program memory addresses can be up to 13–16 bits depending on instruction ...5
5. ASCII Characters : Stored as 8-bit values Used for LCD interfacing and serial communication .... 5
6. Boolean Values :Represented by 1-bit flags (TRUE/FALSE) .......................................................... 5
1) Immediate Addressing .......................................................................................................................5
The operand is a literal value written directly in the instruction. .......................................................... 5
Example: MOVLW 0x20 ; Load literal 0x20 into WREG ...........................................................5
2) Direct Addressing ..............................................................................................................................5
Example: MOVWF 0x10 ; Move WREG → file register 0x10 ................................................... 5
3) Indirect Addressing ........................................................................................................................... 5
Example : MOVLW 0x30 ; load address 0x3 .............................................................................. 5
4) Relative Addressing .......................................................................................................................... 5
Example : BTFSS 0x06,2 ; If bit = 1 skip next instruction ........................................................... 5
5) Implicit Addressing ........................................................................................................................... 5
CLRW ; Clear WREG ................................................................................................................ 5
3. Cache Organization in PIC16F877A .........................................................................................................6
1. Harvard Architecture ......................................................................................................................... 6
Example : While executing an instruction stored in program memory, the PIC can fetch the next
instruction in parallel, improving speed even without cache. ....................................................... 6
2. 8-Level Hardware Stack .................................................................................................................... 6
Example : CALL Subroutine return address pushed onto stack automatically ............................. 6
3. Working Register (WREG) as Fast Access Memory ........................................................................ 6
4. File Register Banks ............................................................................................................................6
Organized in four banks, each containing; General Purpose Registers (GPRs) and Special Function
Registers (SFRs) allowing quick access to frequently used variables. ..................................................6
Example: MOVWF 0x15 ; Store WREG into GPR at address 0x15 .......................................... 6
5. Program Memory (Flash) – 8K x 14 bits ...........................................................................................6
6. Data Memory (RAM) – 368 Bytes .................................................................................................... 7
Example : MOVF 0x12,0 ; Read value from RAM into WREG .................................................. 7
7. EEPROM Memory – 256 Bytes ........................................................................................................ 7
8. Indirect Addressing Through FSR and INDF ....................................................................................7
Example: MOVLW 0x30, MOVWF FSR, MOVF INDF,0 .......................................................... 7
Conclusion ..................................................................................................................................................... 7
Introduction
The PIC16F877A, manufactured by Microchip Technology which formerly called
Microchip, represents a cornerstone in the mid-range 8-bit microcontroller family
that has shaped embedded systems development for decades. It is a 40-pin PIC
Microcontroller, designed using RISC architecture and has five Ports on it, starting
from Port A to E. It has three Timers in it, two of which are 8-bit Timers while 1 is
of 16 [Link] supports many communication protocols like Serial, Parallel and I2C
Protocol. Its the he most commonly used PIC Microcontroller because of its
operational flexibility as It supports both hardware pin interrupts and timer
[Link] to this, it remains a preferred choice for embedded system
applications, educational labs, and industrial control systems. This report examines
the PIC16F877A architecture through three primary lenses, which are its register
organization, memory structure, and its instruction set architecture with encoding
formats and addressing modes, and its memory/cache organization within the
Harvard architecture framework. By analyzing these interconnected components,
we develop a comprehensive understanding of how this microcontroller achieves
its combination of performance, flexibility, and accessibility.
Pic 1.1 PIC16F877A pin layout
1. Register Organization
1
Registers are the fastest small memory units inside the CPU. They temporarily
store data, instructions, addresses, and status information required for program
execution. The number of registers varies by architecture. Small microcontrollers
like PIC may have 35–80 registers including both general-purpose and special
function registers, RISC processors like ARM typically have 16–32 general-
purpose registers, while CISC processors usually have 8–16 but with more
specialized [Link] length or number of bits a register can hold depends
on the processor type.
8-bit registers: Used in small microcontrollers example PIC, AVR
16-bit or 32-bit registers : Used in advanced processors like ARM, MIPS
C. 64-bit registers : Found in modern PC processors
The register size determines the maximum number the CPU can represent, the size
of operations it can perform, and the address range it can access. Registers are
divided into two main categories: General Purpose Registers (GPRs) and Special
Purpose Registers (SPRs). GPRs hold temporary data, operands, loop counters, and
intermediate results. They support arithmetic, logic operations, memory access,
and variable storage during program execution.
1.1 Special Purpose Registers and Their Functions
Program Counter (PC): Holds the address of the next instruction to
execute. It ensures sequential instruction flow and updates during jumps,
calls, or interrupts.
Instruction Register (IR): Stores the instruction currently being decoded
Accumulator / Working Register (ACC or WREG): Used for arithmetic
and logic operations; holds results and operands for ALU operations.
Status Register (SR / FLAGS / PSW): Contains bits showing the outcome
of operations. These flags control conditional branching.
Stack Pointer (SP): Points to the top of the stack in RAM. The stack is used
for return addresses, temporary values, and interrupt handling.
File Select Register (FSR) / Index Register: Supports indirect addressing,
enabling access to memory locations in loops, arrays, and table lookups.
Port Registers: Control digital input/output pins. Each bit corresponds to a
microcontroller pin for reading sensor values or driving actuators.
2
Timer Registers (TMR0, TMR1): Used for timing, counting events,
generating delays, and PWM.
Interrupt Registers (INTCON, PIR, PIE): Enable, disable, and track
interrupt events like timer overflow, ADC completion, and external signal
triggers.
PIC16F877A contains 512 bytes of RAM organized into General Purpose
Registers (GPR) and Special Function Registers (SFR). All registers are 8-bit wide.
The memory is divided into four banks, with bank selection controlled using the
RP1:RP0 bits of the STATUS register. register organization defines how a CPU
manages data, instructions, memory addresses, and hardware resources. A systems
number of registers and their size affects performance, processing speed, and
memory accessibility. Special-purpose registers maintain program flow, arithmetic
accuracy, stack operation, and device control, making them essential for efficient
CPU operation.
Bank Switching: The microcontroller uses STATUS Register Bits: RP1
RP0 in Bank Selection This mechanism allows addressing all 512 bytes of
RAM using only 7-bit register addresses.
2. Instruction Set Architecture and format
The PIC16F877A belongs to the PIC16 family of RISC-based microcontrollers,
using a 14-bit wide instruction word, a Harvard architecture, and a small, efficient
set of instructions. It supports byte-oriented operations, bit-oriented operations,
literal/control operations. This section explains the instruction formats, types, data
types, and addressing modes used in the PIC16F877A. The instruction set consists
of 35 powerful instructions grouped into three formats:
1. Byte-Oriented Instruction :
3
2. Bit-Oriented Instructions :
3. Literal / Control Instructions :
Example: MOVLW 0x3F → Load literal 0x3F into W register.
2.1 Instruction Types
PIC16F877A instructions fall into four major functional groups.
1) Byte-Oriented Instructions: Operate on file registers or WREG.
Examples: ADDWF f, d — Add WREG and fil
2) Bit-Oriented Instructions: Operate on individual bits within file registers.
Examples: BSF f, b — Set a bit
3) Literal and Control Instructions: Use immediate values or control flow changes.
Examples: MOVLW k — Load literal into WREG, XORLW k — XOR literal
with WREG
4) Control/Branch Instructions: Used for program flow.
Examples: RETURN — Return from subroutine, RETFIE — Return from interrupt
2.3 Data Types
The PIC16F877A is an 8-bit microcontroller, so most data types revolve around 8-
bit handling. The primary available data types include:
1. 8-bit Data (Byte):Main data type
4
Used for registers, SFRs, GPRs that Range: 0 to 255
2. Bit Data : Individual bits within a file register Used for flags, digital I/O pins,
control bits Value: 0 or 1
3. 14-bit Instruction Words: Each instruction stored in program memory is 14
bits wide
4. 16-bit Addresses: Program memory addresses can be up to 13–16 bits
depending on instruction
5. ASCII Characters : Stored as 8-bit values Used for LCD interfacing and serial
communication
6. Boolean Values :Represented by 1-bit flags (TRUE/FALSE)
2.4 Addressing Modes
The PIC16F877A uses simple addressing modes due to its RISC structure. Each
addressing mode determines how the CPU finds the operand.
1) Immediate Addressing
The operand is a literal value written directly in the instruction.
Example: MOVLW 0x20 ; Load literal 0x20 into WREG
2) Direct Addressing
The instruction directly specifies the file register address.
Example: MOVWF 0x10 ; Move WREG → file register 0x10
3) Indirect Addressing
Uses File Select Register (FSR) and INDF to access memory indirectly.
INDF doesn't store data but points to the location referenced by FSR.
Example : MOVLW 0x30 ; load address 0x3
4) Relative Addressing
Branch instructions use PC-relative addresses .
Example : BTFSS 0x06,2 ; If bit = 1 skip next instruction
5) Implicit Addressing
Operand is predetermined and not stated in the instruction.
Example:
CLRW ; Clear WREG
SLEEP ; Enter low-power mode
NOP ; No operation
Note :
The PIC16F877A does NOT contain a data cache or instruction cache.
5
It is a simple 8-bit Harvard architecture microcontroller that does not use caching,
unlike advanced CPUs. Therefore, when discussing cache organization,we instead
describe the memory organization and architectural features that perform the role
of fast-access memory in PIC systems.
3. Cache Organization in PIC16F877A
Although the PIC16F877A does not use any cache memory, it achieves fast data
access using a well-structured Harvard architecture with separate program and data
buses, small register banks, and optimized memory elements. These architectural
features act like cache substitutes by ensuring quick access without the need for a
real cache.
Below are the PIC16F877A architectural features related to fast memory access,
each with an example:
1. Harvard Architecture
Separate memory spaces and buses for Program Memory and Data Memory.
Allows simultaneous fetching of the next instruction while executing the current
one.
Example : While executing an instruction stored in program memory, the PIC can
fetch the next instruction in parallel, improving speed even without cache.
2. 8-Level Hardware Stack
Used for storing return addresses for subroutine calls and interrupts. Acts like a
small, fast temporary memory but not user-accessible.
Example : CALL Subroutine return address pushed onto stack automatically
3. Working Register (WREG) as Fast Access Memory
Acts like an accumulator and Used in almost every instruction for fast operations.
Example: MOVLW 0x25 ; Load literal to WREG
4. File Register Banks
Organized in four banks, each containing; General Purpose Registers (GPRs)
and Special Function Registers (SFRs) allowing quick access to frequently used
variables.
Example: MOVWF 0x15 ; Store WREG into GPR at address 0x15
5. Program Memory (Flash) – 8K x 14 bits
Stores instructions in a 14-bit instruction word format. Supports pipeline execution,
making access fast even without cache.
Example: Each instruction is fetched into the IR through the program bus.
6
6. Data Memory (RAM) – 368 Bytes
Small, fast, and organized into banks. Consists of both GPRs and SFRs.
Example : MOVF 0x12,0 ; Read value from RAM into WREG
7. EEPROM Memory – 256 Bytes
Non-volatile storage for data retention. Slower, but used for permanent data, not
for runtime caching. Example: Store configuration data or calibration values.
8. Indirect Addressing Through FSR and INDF
Acts like a pointer-based fast data access method.
Useful for tables, arrays, and iterative operations.
Example: MOVLW 0x30, MOVWF FSR, MOVF INDF,0
4.1 Special Memory Features
Watchdog Timer (WDT)
Brown-Out Reset (BOR)
Power-up Timer (PWRT)
In-Circuit Serial Programming (ICSP)
Conclusion
The PIC16F877A microcontroller provides an ideal balance between performance,
simplicity, and [Link] well-structured register organization, efficient
instruction set, flexible addressing modes, and robust memory system allow it to
handle a wide range of embedded applications. Understanding the architecture
provides a strong foundation for programming, system design, and optimization in
embedded engineering.