70 Microprocessor and Computer Architecture 3085 INSTRUCTION SET DATA TRANSFER INSTRUCTIONS Operand Description This instruction copie: register into the destination re the contents ot the couree register are not altered. If one of thy ‘operands is a memory location, its location specified by the eontents of the HL. resin unple: MOV B, Cor MOV B, M 9 it data is stored in t) or memory. If the operand is a memo Tocation, its location is specified by the conten of the HL registers. jle: MVI B, 57 or MVI M, 57 ne designated register pat y location. This instruction that memory location int contents of either thé emory location are ntIntel 8085 Assembly Language Programming» (Gunerzma) 71 [oad Hand L registers direct LHLD 16-bit The instruction copies the contents of the address memory location pointed out by the 16-bit address into register L and copies the contents of the next memory location into register H. The contents of source memory locations are not altered. Example: LHLD 2040. ecumulator direct 16-bit The cantents of the accumulator are copied into address the memory location specified by the operand. ‘This is a Sbyte instruction, the second byte specifies the low-order address and the third byte specifies the high-order addre Example; STA 4350 or STA XYZ The contents of the accumulator are copied into memory location specified by the contents of he next ‘memory | Abestion, i ad The contents of sebyte instruction, the yw-order address and72 Microprocessor and Computer Architecture Copy H and L registers to the stack p* SPHL none Exchange H and Lwith top of stack inter jon Toads the contents of the H ang! struct te ieee ck pointer register, fy ister the sta L registers into contents of the H register tovide the high-order address and the conten, peehe L register provide the low-order addres, ‘The contents of the H and L registers are not altered. Example: SPHL ‘The contents of the L register are exchange with the stack location pointed out by th contents of the stack pointer register. The contents of the H register are exchanged with the next stack location (SP+1); however, the “contents of the stack pointer register are nit “altered. Example: XTHL mg sequence. The stack pointer register! sented and the contents of the highor r (B,D, H, A) are copied into n. The stack pointer register ‘register are copied to E, L, status flags) of thfIntel 8085 Assembly Language Programming = (Cuarrens) 73 Input data to accumulator from a port with 8-bit address 3 IN Rae port The contents of the input port designated in the address operand are read and loaded into the accumulator, Example: IN 82 ithmetic Instructions Operand Description register or memory to accumulator R The contents of the operand (register or it memory) are added to the contents of the accurnulator and the result is stored in the accumulator. If the operand is a memory location, its location is specified by the contents of the HI registers. All flags are modified to reflect the result of the addition. mple: ADD B or ADD M | The: contents of the operand (register or te memory) and the Carry flag are added to the - “ee snts of the accumulator and the result is rored in the accumulator. If the operand is a ‘its location is specified by the | to reflect the result of the addition. ADC Bor ADCM je accumulator and the result is o¢ tor. All flags are modifiedeee eee UU 74 DAD Microprocessor and Computer Architecture Reg. pair The 16-bit contents of the specified register pai, are added to the contents of the HL registoy a the eum is stored in the HL register, 1, | contents of the source register pair are yy, | altered. If the yesult is larger than 16 bits, the CY flag is set. No other flags are affected, Example: DAD H | ‘or memory from accumulator ‘he contents of the operand (register or memory | J are subtracted from the contents of th. ‘accumulator, and the result is stored in th accumulator. If the operand is a memory Joeation, its location is specified by the contents ‘of the HL registers. All flags are modified yeflect the result of the subtraction. ‘Example: SUB B or SUB M ‘The contents of the operand (register or memory _) and the Borrow flag are subtracted from the “contents of the accumulator and the result ic placed in the accumulator. If the operand is location, its location is specified by the it data (operand) is subtracted from tht ‘of the accumulator and the result the accumulator. All flags are ‘modifiel it of the subtraction.Intel 8085 Assembly Language Programming ~ CGuarrensy 75 CR : : i) R The contents of the designated register or M imemiory are decremented by 1 and the result is Stored in the same place. If the operand is a 2 memory location, its location is specified by the contents of the HL registers, Example: DCR B or DCR M R ‘The contents of the designated register pair are decremented by Land the result is stored in the ‘same place. Example: DOX H from a binary value to two ‘decimal (BCD) digits. This is the only instruction that uses the auxiliary fag to | ___ perform the binary to BCD conversion, and the nversion procedure is described below. S, Z, G, P, CY flags are altered to reflect the resull _ of the operation. If the value of the low-order 4- bits im the accumulator is greater than 9 or if AC flag is set, the instruction adds 6 to the lo fou the value of the high-order 4- bits in | iumulator is greator than 9 or if e Carry | set, the instruction adds 676 Microprocessor and Computer Architecture JC INC JP JM JZ JNZ JPE JPO Call conditionally Operand: Jump on Carry Jump on no Carry Jump on positive Jump on minus Jump on zero Jump on no zero Jump on parity even Jump on parity odd 16-bit address Se The program sequence is transferred y the memory location specified by the 1) bit address given in the operand based the specified flag of the PSW as describe below. Before the transfer, the address the next instruction after the call (thy contents of the program counter) i: pushed onto the stack Example: CZ 2034 or CZ XYZ Flag StatusIntel 8085 Assembly Language Programming = (euarrend) 77 opcode Description Flag Status RC Return on Carry at Return on no Carry cy=0 Return on positive s Return on minus S=1 Return on zero Z=1 Return on no zero Z=0 Return on parity even Pa1 Return on parity odd Peo ad program counter with HL contents none The contents of registers H and L are copied into the ‘program counter. The contents ‘of Hare placed as the high- ‘order byte and the contents of Las the low-order byte. Example: PCHL The RST instruction js equivalent to a L-byte call instruction fe of eight memory locations depending upon the tuctions are generally used in conjunction with nts and inserted using external hardware, However be used as software instructions in a program to "program execution to one of the eight locations. Restart Address 0000H 0008 >= 0010H i these interrupts ot require any78 Microprocessor and Computer Architestare Logical Instructions ‘Opcode: Operand Compare register or memory ‘with accumulator cmp R M accumulator Compare immediate wi cP Papi dnniaviuos al B-bit date pune pe 2B Description the contents f the operand (reeister oF memory ap fh the contents of the accumulate, compared wit! The result of the goth contents are preserved - comparison is shown by setting the flags of the P9W as follows: 14 a) < (reg/mer}: carry flags set, s-7 if (A) = (reg/mem|: zero flag is set, s=0 1F (a) > (reg/mem); carry and zero flags are reset,s-0 Example: CMP 6 or CMP M qhe second byte (&-bit data) is compared with the nfents of the accumulator. The values being remain unchanged, The result of the is shown by setting the flags of the FSW compared s of the accumulator are logically ANDe# memory location, its address * intents of the operand (register | d the result is placed in the accumulat™ s of HL registers. S, 2 par |Intel 8085 Assembly Languoge Programming > Cenarrens) 79 Exclusive OR register or memory with accumulator xRA it ‘The contents of the accumulator are Exclusive ORed M with the contents of the operand (register or memory), and the result is placed in the accumulator. If the operand is a memory location, its address is specified by the contents of HL registers. S, Z) P are modified to reflect the result of the operation. CY and AC are reset. Example: XRA B or XRAM usive OR immediate with accumulator $-bitdata The contents of the accumulator are Exclusive ORed with the 8-bit data (operand) and the result is placed jin the accumulator. S, 2, P are modified to reflect the result of the operation. CY and AC are reset. Example: XRI 86 mory with accumulator bens _ The contents of the accumulator are logically ORed Mae with the contents of the operand (register or memory), and the result is placed in the accumulator. If the operand is a memory location, its address is i "specified by the contents of HL registers. 5, 2, P are "modified to reflect the result of the operation. CY and are reset. Example: ORA B or ORAM. with the 8: ro data (opera) and the result is placed int the accumulator. z ‘Pare modified to reflect the f placed | in the position of D0 as ag. CY is modified according to80 Microprocessor and Computer Architecture Rotate accumulator left through carry RAL none Rotate accumulator right through carry RAR none Complement accumulator CMA Each binary bit of the accumulator is rotated let tone position through the Carry flag. Bit 07 is psceg in the Carry flag, and the Carry flag is placed in the least significant position D0. CY is modified according to bit D7. S, 2, 8, AC are not affected. Example: RAL Each binary bit of the accumulator is rotated right by one position through the Carry flag. Bit 00 is placeg in the Carry flag, and the Carry flag is placed in thy most significant position D7. CY is modified according to bit D0. §, 2, P, ACare not affected Example: RAR The contents of the accumulator are complemented. No flags are affected. Example: CMA The Carry flag is complemented. No other flags are affected. __ Example: CICenable interrupts el Elnone none Intel 8085 Assembly Language Programming % CGuareRS) 81 ‘The interrupt enable flip-flop is set and all interrupts are €nabled. No flags are affected. After a system reset or the acknowledgement of an interrupt, the interrupt enable flipflop is reset, thus disabling the interrupts. This Instruction Is necessary to reenable the interrupts (except TRAP). Example: &1 This is ¢ multipurpose instruction used to read the status of interrupts 7.5, 6.5, 5.5 and read serial data input bit. The instruction loads eight bits in the accumulator with the following interpretations. Dg Dp Di Do i [75] 65] 55 Interrupt masked if bit 1 Interrupt enable flip-flop is set ifbi