Microcontroller 8051
Peripherals: Timers/ Counters
Module 4
8051: Timers
❑8051 has two timers
a) Timer 0: 16-bit Timer 0 Registers
Dual Function: Timer/Counter
b) Timer 1: 16-bit
❑ Each 16-bit timer is accessed
Timer 0
▪ Low byte TL0
Timer 0
▪ High byte TH0
Read/Write like any other 8051 register(A,B, R0----R7).
▪ Low byte
Timer 1
TL1 Timer 1 Registers
Timer 1
▪ High byte TH1
MOV TL0, #4FH
MOV R5, TL0
❑ How to select Timer 0 / Timer 1 ?
TMOD Register
❑Timer Mode Timer 0/1
various timer operation.
❑8-bit SFR register (89H): byte addressable
a) Lower 4-bits: Timer0
b) Higher 4-bits: Timer1
❑ For each timer:
▪ lower 2-bits (M1, M0) Timer Mode
▪ upper 2-bits (GATE, C/T ഥ) Timer Operation
Timer 0/1
▪ C/T ഥ counter / Timer
C/Tഥ =0 Timer (increments based on internal clock)
C/Tഥ =1 Counter (counts external pulses)
▪ GATE START/ STOP timer using software or hardware control
𝐺𝐴𝑇𝐸=0 Software {start/Stop}; Timer runs when TRx is set, regardless of INTx.
TMOD Register
❑Mode 0: 13 Bit Timer Mode
▪ Timer 0/1 uses only 13 bits for counting.
5 bits from TLx (bits D0-D4) and 8 bits from THx.
▪ TLx eight-bit up counters and count from 0 to 255
▪ When TLx is incremented from 255, it will
"reset" to 0 and increment THx from 0 to 31.
▪ When THx is incremented from 31 it sets TFx=1
▪ Timer contain only 8192 values, count (0000-1FFFH)
▪ Simple timing applications
❑Mode 2: 16 Bit Timer Mode
▪ Timer 0/1 uses 16 bits for counting.
▪ TLx eight-bit up counters and count from 0 to 255
▪ When TLx is incremented from 255, it will
"reset" to 0 and increment THx from 0 to 255.
▪ When THx is incremented from 255, it sets TFx=1
▪ Timer contain only 65536 values, count (0000-FFFFH)
▪ Precise timing applications.
TMOD Register
❑Mode 2: 8 Bit Timer Mode
▪ Timer 0/1 uses only 8 bits of TLx register for counting.
▪ TLx eight-bit up counters and count from 0 to 255
▪ When the count reaches FFH, instead of resetting to
0 (as in the case of modes 0 and 1) it will be reset to
the value stored in THx.
▪ This mode is used for generating precise time
intervals.
❑ Mode 3: Split Timer Mode
▪ Timer 0/1 is split into two 8-bit timers: TL0 and TH0.
▪ TL0 timer or counter,
▪ TH0 timer.
▪ This mode is used when two separate timing or
counting functions are required.
Problem 1
Indicate which mode and which timer are selected for each of the
following.
(a) MOV TMOD,#01H (b) MOV TMOD,#20H (c) MOV TMOD,#12H
Solution:
(a) TMOD = 0000 0001, mode 1 of Timer 0 is selected.
(b) TMOD = 0010 0000, mode 2 of Timer 1 is selected.
(c) TMOD = 0001 0010, mode 1 of Timer 1 and mode 2 of Timer 0 are
selected.
Problem 2
Find the value of TMOD to operate as timers in the following
(a) Mode 1 of Timer 1
(b) Mode 2 of Timer 0, Mode 2 of Timer 1
(c) Mode 0 of Timer 1
Solution:
(a) TMOD = 0001 0000 = 10H
(b) TMOD = 0010 0010 = 22H
(c) TMOD = 0000 0000= 00H
Problem 3
Identify which operating mode and which timer are selected, and what
will be the effective count for the following code:
MOV TMOD, #0x00H
MOV TL1, #0xF5H
MOV TH1, #0x50H
Solution:
MOV TMOD, #0x00H ; configures both Timer 0 and Timer 1 to operate in Mode 0.
MOV TL1, #0xF5H ; Select Timer 1, loads its lower byte with value 0xF5H.
Note: only lower 5-bits of value F5H are used by the timer.
MOV TH1, #0x50H ; loads the upper byte of Timer 1 with the value 0x50H.
Effective count= 𝐓𝐇𝟏: 𝐓𝐋𝟏 = 𝟓𝟎𝐇 ∶ 𝐅𝟓𝐇 = 𝟎𝟏𝟎𝟏 𝟎𝟎𝟎𝟎 ∶ 𝟏𝟏𝟏𝟏 𝟎𝟏𝟎𝟏(use only lower 5-bits )
= 𝟎𝟏𝟎𝟏 𝟎𝟎𝟎𝟎 ∶ 𝟏 𝟎𝟏𝟎𝟏 (re-scaling to hexa)
= 𝟎 𝟏𝟎𝟏𝟎 𝟎𝟎𝟎𝟏 𝟎𝟏𝟎𝟏 = 𝟎𝐀𝟏𝟓𝐇
TCON Register
Timer 0/1
❑Timer/Counter Control Register monitor timer/counter operation.
❑8-bit SFR register (88H): byte/bit addressable
a) Lower 4-bits: Interrupts 8F 8E 8D 8C 8B 8A 89 88
b) Higher 4-bits: Timer/Counter
TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0
❑ To START/ STOP the timer: TRx-bit {Software}
BIT SYMBO FUNCTION CONTROL
SETB TR0 ; Start Timer/counter 0
L
CLR TR0 ; Stop Timer/counter 0
TCON.7 TF1 Timer-1 Overflow SET/CLR by
SETB TR1 ; Start Timer/counter 1 Flag H/W
CLR TR1 ; Stop Timer/counter 1 TCON.6 TR1 Timer-1 Run control SET/CLR by S/W
bit
TCON.5 TF0 Timer-0 Overflow SET/CLR by
NOTE: These instruction can START/ STOP the
❑ Each timer hasFlag
its own timer flag:
H/W
TCON.4
▪ TF0 TR0
for Timer 0
Timer-0 Run control SET/CLR by S/W
timer as long as GATE=0 in the TMOD register. ▪ TF1 for Timer
bit 1
Mode-0: 13 Bit Timer Mode
▪ Timer 0/1 uses only 13 bits for counting.
TLX: 5-bits (bits D0-D4), THX: 8-bits.
Fig: Timer Mode-0 Operation
▪ TLX 5-bit up counters and count from 0 to 31
When TLx is incremented from 31, it will "reset" to 0 and increment THX from 0 to 255.
▪ THX 8-bit up counters and count from 0 to 255
When THX incremented from 255, it sets Timer Overflow Flag (i.e. TFx=1) and generate the timer interrupt.
▪ In Mode-0, Timer contain only 8192 values, count (0000-1FFFH)
▪ Applications: To maintain compatibility with the previous version of the microcontroller (i.e., MCS 8048).
Mode-0: Initial Value to be Loaded in Timer
Registers
8051 clock frequency
1. Calculate; Timer clock frequency: =
12
1
2. Calculate; Timer clock period (Machine cycle Time): =
Timer clock frequency
3. Calculate; Effective Count (N) by pre-scaling the initial value loaded into THx:TLx .
4. Calculate; Timer Overflow Count
𝐂𝐨𝐮𝐧𝐭 = 8191 – 𝑁 + 1 or 1𝐹𝐹𝐹𝐻 – 𝑁 (𝐻𝑒𝑥) + 1
5. Delay = Count × Machine cycle Time.
Let us say, Timer Overflow Count = 𝒏𝟏 𝒏𝟐 𝒏𝟑 𝒏𝟒 , Load TH = 𝑛1 𝑛2 and TL = 𝑛3 𝑛4 .
Note: +1 account for one extra cycle required to roll over from FFFFH to 0000H.
Mode 0 programming:
1) Configure the Timer: Select Timer Mode-0 (13-bit mode) by setting the appropriate bits in the TMOD regis
2) Load the Initial Count: Load the initial values into the timer registers THX-TLX to determine the delay.
3) Start the Timer: Set the corresponding TRX bit in the TCON register to start the timer.
4) Wait for Overflow: Monitor the TFX (Timer Overflow) flag in TCON to check when it becomes 1.
5) Stop the Timer (if needed): Clear the TRX bit to stop the timer if required.
6) Clear the Overflow Flag (TFX): Reset TFX to 0 to prepare for the next cycle.
7) Repeat the Process: Go back to step 2 to reload the timer and repeat.
1FF
F
Mode-0
1). Find delay generated and frequency of signal generated on pin P1.5 by following
program. Assume crystal frequency is 12 MHz.
MOV TMOD, #0x00 ;1) configure Timer 0/1 in Mode 0
REPEAT:
MOV TH1, #0x50H ;2) load count in Timer-1 register, TH0–TL0
MOV TL1, #0xF5H
SETB TR1 ;3) start Timer 0
WAIT: JNB TF1, WAIT ;4) wait for delay
CLR TR1 ;5) stop timer
CLR TF1 ;6) clear timer overflow flag
CPL P1.5 ; toggle P2.0 to get square wave
SJMP REPEAT ;7) repeat above steps to generate square wave
Solution:
This code is configuring Timer-1 in Mode-0 (13-bit mode)
Effective count= 𝐓𝐇𝟏: 𝐓𝐋𝟏 = 𝟓𝟎𝐇 ∶ 𝐅𝟓𝐇 = 𝟎𝟏𝟎𝟏 𝟎𝟎𝟎𝟎 ∶ 𝟏𝟏𝟏𝟏 𝟎𝟏𝟎𝟏(use only lower 5-bits )
= 𝟎𝟏𝟎𝟏 𝟎𝟎𝟎𝟎 ∶ 𝟏 𝟎𝟏𝟎𝟏 (re-scaling to hexa)
= 𝟎 𝟏𝟎𝟏𝟎 𝟎𝟎𝟎𝟏 𝟎𝟏𝟎𝟏 = 𝟎𝐀𝟏𝟓𝐇 = 𝟐𝟓𝟖𝟏𝐝
8051 clock frequency 12MHz
1. Calculate; Timer clock frequency: = = = 𝟏𝐌𝐇𝐳
12 12
1 1
2. Calculate; Timer clock period (Machine cycle Time): = Timer clock frequency = 1 MHZ = 𝟏𝝁𝒔(Time for each count)
3. Calculate; Effective Count (N) by pre-scaling the initial value loaded into THx:TLx =2581
4. Calculate; Timer Overflow Count
𝐂𝐨𝐮𝐧𝐭 = 8191 – 2581 + 1 = 5611
5. Delay = Count × Machine cycle Time = 5611 × 𝟏𝝁𝒔 = 𝟓𝟔𝟏𝟏𝝁𝒔 𝟓𝟔𝟏𝟏µ𝒔 × 𝟐 = 𝟏𝟏𝟐𝟐𝟐 µ𝒔
1
Signal Frequency= = 𝟖𝟗. 𝟏𝟏 𝐇𝐳
11222µ𝒔
5611µ 5611µ
s s
Mode-0
2). Find delay generated and frequency of signal generated on pin P1.5 by following
program. Assume crystal frequency is 16 MHz.
MOV TMOD, #0x00 ;1) configure Timer 0 in Mode 0
REPEAT:
MOV TH1, #0x78H ;2) load count in timer registers TH0–TL0
MOV TL1, #0xF5H
SETB TR1 ;3) start Timer 0
WAIT: JNB TF1, WAIT ;4) wait for delay
CLR TR1 ;5) stop timer
CLR TF1 ;6) clear timer overflow flag
CPL P1.5 ; toggle P2.0 to get square wave
SJMP REPEAT ;7) repeat above steps to generate square wave
Mode-1: 16 Bit Timer Mode
▪ Timer 0/1 uses only 16 bits for counting.
TLX: 8-bits, THX: 8-bits.
▪ TLX 5-bit up counters and count from 0 to 255
When TLx is incremented from 255, it will "reset" to 0 and increment THX from 0 to 255.
▪ THX 8-bit up counters and count from 0 to 255
When THX incremented from 255, it sets Timer Overflow Flag (i.e. TFx=1) and generate the timer interrupt.
▪ In Mode-1, Timer contain only 65536 values, count (0000-FFFFH)
▪ Applications: To Generate large amount of timing delay.
Mode 1 programming:
1) Configure the Timer: Select Timer Mode-1 (16-bit mode) by setting the appropriate bits in the TMOD regis
2) Load the Initial Count: Load the initial values into the timer registers THX-TLX to set the delay required.
3) Start the Timer: Set the corresponding TRX bit in the TCON register to start the timer.
4) Wait for Overflow: Monitor the TFX (Timer Overflow) flag in TCON to check when it becomes 1.
5) Stop the Timer : Clear the TRX bit to stop the timer.
6) Clear the Overflow Flag (TFX): Reset TFX to 0 to prepare for the next cycle.
7) Repeat the Process: Go back to step 2 to reload the timer and repeat.
1FF
F
Mode-1: Initial Value to be Loaded in Timer
Registers
8051 clock frequency
1. Calculate; Timer clock frequency: =
12
1
2. Calculate; Timer clock period: =
Timer clock frequency
desired time de
3. Calculate; No. of timer clock pulse (MC) required for timer Overflow (N) =
Timer clock perio
4. Calculate; Timer Overflow Count
Mode-1; 𝐂𝐨𝐮𝐧𝐭 = 65535 – 𝑁 + 1 or 𝐹𝐹𝐹𝐹𝐻 – 𝑁 (𝐻𝑒𝑥) + 1
5. Delay = Count × Machine cycle Time
Let us say, Timer Overflow Count = 𝒏𝟏 𝒏𝟐 𝒏𝟑 𝒏𝟒 , Load TH = 𝑛1 𝑛2 and TL = 𝑛3 𝑛4 .
Note: +1 account for one extra cycle required to roll over from FFFFH to 0000H.
3). Find the count to be loaded into timer registers to generate a time delay of 500 µs
in Mode 1. Assume crystal frequency is 12 MHz.
Solution:
8051 clock frequency 12MHz
1. Calculate; Timer clock frequency: = = = 1MHz
12 12
1 1
2. Calculate; Timer clock period: = = = 1μs
Timer clock frequency 1MHz
3. Calculate; No. of timer clock pulse (MC) required for timer Overflow:
desired time delay 500𝜇𝑠
(N) = = = 500
Timer clock period 1μ𝑠
4. Calculate; Timer Overflow Count
Mode-1; 𝐂𝐨𝐮𝐧𝐭 = 65535 – 500 + 1 = 65036d = FE0CH
5. Load TH = 0FEH and TL = 0CH.
Mode:1
4) Write an ALP to generate a time delay of 500 µs using Timer-0 Mode-1. Assume
crystal frequency is 12 MHz.
Solution:
MOV TMOD, #01H ;1)configure Timer 0 in Mode 1
REPEAT: MOV TH0, #0FEH ;2)load initial count in timer register
MOV TL0, #0CH
SETB TR0 ;3)start Timer 0
WAIT: JNB TF0, WAIT ;4)wait until Timer-0 Overflows
CLR TR0 ;5)stop timer
CLR TF0 ;6)clear timer overflow flag
SJMP REPEAT ;7)repeat
Mode-1
5) Write a program to generate a square wave of 1 KHz frequency on P2.0 using Timer
0 Mode Assume crystal frequency is 12 MHz.
MOV TMOD, #01H ;1) configure Timer 0 in Mode 1
REPEAT:
MOV TH0, #0FEH ;2) load count in timer registers TH0–TL0
MOV TL0, #0CH
SETB TR0 ;3) start Timer 0
WAIT: JNB TF0, WAIT ;4) wait until Timer-0 Overflows
CLR TR0 ;5) stop timer
CLR TF0 ;6) clear timer overflow flag
CPL P2.0 ;toggle P2.0 to get square wave
SJMP REPEAT ;7) Go back to step-2 to repeat
Mode-2: 8 Bit Timer Mode(Auto-Reload)
▪ Timer 0/1 uses only 8 bits for counting.
TLX: 8-bits,
▪ THX Initialize with any value from 00H to FFH as per required delay.
When Timer starts, THX copied into TLX.
▪ TLX 8-bit up counters and count from 0 to 255.
When TLX rolls over from FFH-00H, it automatically reloads the initial value stored in THx.
Sets TFx=1 and generate the timer interrupt.
▪ Timer contain only 256 values, count (00-FFH)
▪ Applications: reduce overhead instructions, and timing error, useful for continuous timing operations.
Mode-2: Initial Value to be Loaded in Timer
Registers
8051 clock frequency
1. Calculate; Timer clock frequency: =
12
1
2. Calculate; Timer clock period (Machine cycle Time): =
Timer clock frequency
desired time delay
3. Calculate; No. of clock cycles, timer Overflow (N) =
Timer clock period
4. Calculate; Timer Overflow Count
𝐂𝐨𝐮𝐧𝐭 = 255 – 𝑁 + 1 or 1𝐹𝐹𝐹𝐻 – 𝑁 (𝐻𝑒𝑥) + 1
5. Delay = Count × Machine cycle Time
Let us say, Timer Overflow Count = 𝒏𝟏 𝒏𝟐 𝒏𝟑 𝒏𝟒 , Load TH = 𝑛1 𝑛2 and TL = 𝑛3 𝑛4 .
Note: +1 account for one extra cycle required to roll over from FFFFH to 0000H.
Mode 2 programming:
1) Configure the Timer: Select Timer Mode-2 (8-bit mode) by setting the appropriate bits in the TMOD registe
2) Load the Initial Count: Load the initial values into THX only.
3) Start the Timer: Set the corresponding TRX bit in the TCON register to start the timer.
4) Wait for Overflow: Monitor the TFX (Timer Overflow) flag in TCON to check when it becomes 1.
5) Clear the Overflow Flag (TFX): Reset TFX to 0 to prepare for the next cycle.
6) Repeat the Process: Simply monitor TFX for periodic overflow and repeat the process.
FF
7) Write a program to generate a square wave of 10 KHz frequency on P2.0 using Timer 0
Mode 2. Assume crystal frequency is 24 MHz.
Solution: 𝟎. 𝟏𝒎𝒔 = 𝟏𝟎𝟎 µ𝒔
Mode-2:
desired time delay 50𝝁𝒔
Timer Overflow (N) = = = 100
Timer clock period 𝟎.𝟓𝝁𝒔
50µs 50µs
𝐂𝐨𝐮𝐧𝐭 = 255 – 𝑁 + 1 = 255 – 100 + 1 = 156𝑑 = 9𝐶𝐻
MOV TMOD, #02H ;1) configure Timer 0 in Mode 2
REPEAT:
MOV TH0, #09CH ;2) load count in timer registers TH0–TL0
SETB TR0 ;3) start Timer 0
WAIT: JNB TF0, WAIT ;4) wait until Timer-0 Overflows
CLR TF0 ;6) clear timer overflow flag
CPL P2.0 ;toggle P2.0 to get square wave
SJMP REPEAT ;7) repeat above steps to generate square wave
Find the delay and maximum possible delay generated by Timer 0 in the following
code. Do not include the overhead due to instructions. XTAL frequency is 22 MHZ.
MOV TMOD,#10 ;Timer 1, mode 1(16-bit mode)
HERE: MOV TL0,#00H ;TL0 = 3EH, Low byte
MOV TH0,#0FFH ;TH0 = B8H, High byte
SETB TCON.6 ;TR1 is set to start Timer-1
AGAIN: JNB TCON.7,AGAIN ;monitor Timer 1 flag
CLR TCON.6 ;stop Timer 1
CLR TCON.7 ;clear Timer 1 flag for next round
CLR P2.3
SJMP HERE
Solution:
(a) (FFFF – FF00 + 1) = 255+1 = 256 in decimal , delay 256 x 0.546 µs = 139.2 µs.
(b) Maximum possible delay (FFFF – 0000 + 1) = 65535+1 = 65536 in decimal , delay 65536 x 0.546 µs = 35.75
µs.
Assume that XTAL = 11.0592 MHz. What value do we need to load into the timer’s
registers if we want to have a time delay of 5 ms ? Show the program for Timer 0 to
create a pulse width of 5 ms on P2.3.
Solution:
Since XTAL = 11.0592 MHz, the counter counts up every 1.085 µs. This means that
out of many 1.085 µs intervals we must make a 5 ms pulse.
To get that, we divide desired time delay by 𝐓𝐢𝐦𝐞𝐫 𝐜𝐥𝐨𝐜𝐤 𝐩𝐞𝐫𝐢𝐨𝐝. We need 5 ms / 1.085
µs = 4608 clocks.
To achieve that we need to load into TL and TH the value 65535 – 4608+1 = 60928 =
EE00H. Therefore, we have TH = EE and TL = 00.
MOV TMOD,#01H ;Timer 0, mode 1 (16-bit mode)
REPEAT: MOV TL0,#0 ;TL0 = 0, Low byte
MOV TH0,#0EEH ;TH0 = EE( hex), High byte
SETB TR0 ;start Timer 0
AGAIN: JNB TF0,AGAIN ;monitor until it rolls over
CLR P2.3 ;clear P2.3
CLR TR0 ;stop Timer 0
CLR TF0 ;clear Timer 0 flag
SJMP REPEAT
Problem 1
Find the maximum delay generated using Timer Mode 1 and 2. Assume
crystal frequency is
i) 12 MHz, and
ii) 6 MHz
Problem 2
In the following program, calculate the amount of time delay in the DELAY
subroutine generated by the Timer-0. Assume that XTAL = 11.0592 MHz.
MOV TMOD,#01 ;Timer 0, mode 1(16-bit mode)
HERE: MOV TL0,#0F2H ;TL0 = F2H, the Low byte
MOV TH0,#0FFH ;TH0 = FFH, the High byte
CPL P1.5 ;toggle P1.5
ACALL DELAY
SJMP HERE ;load TH, TL again
;————————delay using Timer 0
DELAY:
SETB TR0 ;start Timer 0
AGAIN: JNB TF0,AGAIN ;monitor until it rolls over
CLR TR0 ;stop Timer 0
CLR TF0 ;clear Timer 0 flag
Problem 3
Find the delay generated by Timer 0 in the following code.
MOV TMOD,#01 ;Timer 0, mode 1(16-bit mode)
HERE: MOV TL0,#3EH ;TL0 = 3EH, Low byte
MOV TH0,#0B8H ;TH0 = B8H, High byte
SETB P2.3 ;SET high P2.3
SETB TR0 ;start Timer 0
AGAIN: JNB TF0,AGAIN ;monitor Timer 0 flag
CLR TR0 ;stop Timer 0
CLR TF0 ;clear Timer 0 flag for next round
CLR P2.3
Problem 4
Modify TL and TH to get the largest time delay possible. Find the delay in
ms.
MOV TMOD,#01 ;Timer 0, mode 1(16-bit mode)
HERE: MOV TL0,# 3EH ;TL0 = 3E, Low byte
MOV TH0,#0B8H ;TH0 = B8, High byte
SETB TR0 ;start Timer 0
AGAIN: JNB TF0,AGAIN ;monitor Timer 0 flag
CLR TR0 ;stop Timer 0
CLR TF0 ;clear Timer 0 flag
SJMP HERE