[Link]
com
Chapter 5
Microprogrammed Control
Nipun Thapa
[Link]
5.1 Control Memory
The function of the control unit in a digital computer is to
initiate sequences of microoperations.
The number of different types of microoperations that are
available in a given system is finite.
The complexity of the digital system is derived from the number
of sequences of microoperations that are performed.
When the control signals are generated by hardware using
conventional logic design techniques, the control unit is said to
be hardwired.
Microprogramming is a second alternative for designing the
control unit of a digital computer.
The principle of microprogramming is an elegant and systematic
method for controlling the microoperation sequences in a digital
computer.
2 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.1 Control Memory
The control function that specifies a microoperation is
a binary variable. When it is in one binary state, the
corresponding microoperation is executed.
A control variable in the opposite binary state does
not change the state of the registers in the system.
The active state of a control variable may be either the
1 state or the 0 state, depending on the application.
In a bus-organized system, the control signals that
specify microoperations are groups of bits that select
the paths in multiplexers, decoders, and arithmetic
logic units
3 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.1 Control Memory
Control Word
The control unit initiates a series of sequential steps of
[Link] any given time, certain
microoperations are to be initiated, while others
remain idle.
The control variables at any given time can be
represented by a string of l's and O's called a control
word. As such, control words can be programmed to
perform various operations on the components of the
system.
4 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.1 Control Memory
Microprogram
A control unit whose binary control variables are stored in
memory is called a microprogrammed control unit.
Program stored in control memory that generates all the
control signals required to execute the instruction set
correctly
A sequence of microinstructions constitutes a
microprogram
Since alterations of the microprogram are not needed once
the control unit is in operation, the control memory can be
a read-only memory (ROM).
5 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.1 Control Memory
Microinstruction
Contains a control word and a sequencing word
Control Word :- Contains all the control information
required for one clock cycle
Sequencing Word :- Contains information needed to
decide the next microinstruction address
Microoperation
A microinstruction contains one or more
microoperations to be completed.
6 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.1 Control Memory
Writable Control Memory (Writable Control Storage: WCS)
CS whose contents can be modified:
Microprogram can be changed
Instruction set can be changed or modified
A computer that employs a microprogrammed control unit
will have two separate memories: main memory and a
control memory.
The user’s program in main memory consists of machine
instructions and data whereas control memory holds a
fixed microprogram that cannot be altered by the user.
Each machine instruction initiates a series of
microinstructions in control memory.
7 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.1 Control Memory
The general configuration of a microprogrammed
control unit is demonstrated in the following block
diagram:
Fig: Microprogrammed control organization
8 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.1 Control Memory
Dynamic Microprogramming
Computer system whose control unit is implemented with a microprogram in
WCS.
Microprogram can be changed by a systems programmer or a user.
Sequencer:
The device or program that generates address of next microinstruction to be
executed is called sequencer.
While the microoperations are being executed, the next address is computed
in the next address generator circuit and then transferred into the control
address register to read the next microinstruction.
The location of the next microinstruction may be the one next in sequence, or
it may be located somewhere else in the control memory.
Typical functions of a microprogram sequencer are incrementing the control
address register by one, loading into the control address register an address
from control memory, transferring an external address, or loading an initial
address to start the control operations.
9 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.1 Control Memory
Control Address Register:
CAR contains address of microinstruction.
Control Data Register:
CDR contains microinstruction read from memory.
The microinstruction contains a control word that specifies
one or more microoperations. The data register is
sometimes called a pipeline register.
It allows the execution of the microoperations specified by
the control word simultaneously with the generation of
the next microinstruction.
This configuration requires a two-phase clock, with one
clock applied to the address register and the other to the
data register.
10 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.2 Address Sequencing
Microinstructions are stored in control memory in
groups, with each group specifying a routine.
Each computer instruction has its own microprogram
routine in control memory to generate the
microoperations that execute the instruction.
Process of finding address of next microinstruction to
be executed is called address sequencing.
11 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.2 Address Sequencing
When the execution of the instruction is completed,
control must return to the fetch routine.
This is accomplished by executing an unconditional branch
microinstruction to the first address of the fetch routine.
In summary, the address sequencing capabilities required
in a control memory are:
i. Incrementing of the control address register.
ii. Unconditional branch or conditional branch, depending on
status bit conditions.
iii. A mapping process from the bits of the instruction to an
address for control memory.
iv. A facility for subroutine call and return.
12 Nipun Thapa, Ch-5, Computer Organization
[Link]
Fig.5.2: Block diagram of address sequencer.
13 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.2 Address Sequencing
Figure 5.2 shows a block diagram of a control memory and the associated
hardware needed for selecting the next microinstruction address.
The microinstruction in control memory contains a set of bits to initiate
microoperations in computer registers and other bits to specify the method by
which the next address is obtained.
The diagram shows four different paths from which the control address
register (CAR) receives the address.
The incrementer increments the content of the control address register by
one, to select the next microinstruction in sequence.
Branching is achieved by specifying the branch address in one of the fields of
the microinstruction.
Conditional branching is obtained by using part of the microinstruction to select a
specific status bit in order to determine its condition.
An external address is transferred into control memory via a mapping logic
circuit. The return address for a subroutine is stored in a special register whose
value is then used when the microprogram wishes to return from the
14 subroutine.
Nipun Thapa, Ch-5, Computer Organization
[Link]
5.2 Address Sequencing
Control address register receives address of next microinstruction from
different sources.
Incrementer simply increments the address by one
In case of branching, branch address is specified in one of the field of
microinstruction.
In case of subroutine call, return address is stored in the register SBR which is
used when returning from called subroutine.
Conditional Branch
It provide decision-making capabilities in the control unit.
Simplest way of implementing branch logic hardware is to test the specified
condition and branch to the indicated address if condition is met otherwise
address resister is simply incremented.
Information in these bits can be tested and actions initiated based on their
condition: whether their value is 1 or 0.
If Condition is true, hardware set the appropriate field of status register to 1.
Conditions are tested for O (overflow), N (negative), Z (zero), C (carry), etc.
Unconditional Branch
Fix the value of one status bit at the input of the multiplexer to 1. So that,
branching can always be done.
15 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.2 Address Sequencing
Mapping
A special type of branch exists when a microinstruction
specifies a branch to the first word in control memory
where a microprogram routine for an instruction is located.
The status bits for this type of branch are the bits in the
operation code part of the instruction.
Assuming operation code of 4-bits which can specify 16(24)
distinct instructions. Assume further and control memory
has 128 words, requiring an address of 7-bits. Now we
have to map 4-bit operation code into 7-bit control
memory address. Thus, we have to map Op-code of an
instruction to the address of the Microinstruction which is
the starting microinstruction of its subroutine in memory.
16 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.2 Address Sequencing
Direct mapping:
Directly use op-code as address of Control memory
17 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.2 Address Sequencing
Another approach of direct mapping:
This mapping consists of placing a 0 in the most significant
bit of the address, transferring the four operation code
bits, and clearing the two least significant bits of the
control address register.
This provides for each computer instruction a
microprogram routine with a capacity of four
microinstructions.
If the routine needs more than four microinstructions, it
can use addresses 1000000 through 1 1 1 1 1 1 1 .
If it uses fewer than four microinstructions, the unused
memory locations would be available for other routines.
18 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.2 Address Sequencing
Another approach of direct mapping:
Fig: mapping from instruction code to microinstruction address
19 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.2 Address Sequencing
Extended idea: Mapping function implemented by
ROM or PLD (Programmable Logic Device)
Use op-code as address of ROM where address of control
memory is stored and then use that address as an address
of control memory. This provides flexibility to add
instructions for control memory as the need arises.
20 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.2 Address Sequencing
Subroutines
Subroutines are programs that are used by another
program to accomplish a particular task. Microinstructions
can be saved by employing subroutines that use common
sections of micro code.
Example: the sequence of microoperations needed to
generate the effective address is common to all memory
reference instructions. Thus, this sequence could be a
subroutine that is called from within many other routines
to execute the effective address computation.
Subroutine register is used to save a return address during
a subroutine call which is organized in LIFO (last in, first
out) stack.
21 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.3 Microprogram Example
Once the configuration of a computer and its
microprogrammed control unit is established, the
designer’s task is to generate the microcode for the control
memory.
This code generation is called microprogramming and is a
process similar to conventional machine language
programming.
Computer Configuration
It consists of two memory units: a main memory for
storing instructions and data, and a control memory for
storing the microprogram. Four registers are associated
with the processor unit and two with the control unit.
22 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.3 Microprogram Example
Four registers are associated with the processor unit and two with the
control unit. The processor registers are PC, AR, DR and AC.
The control unit has control address register CAR and subroutine
register SBR.
The transfer of information among the registers in processor is done
through multiplexer rather than a common bus. DR can receive
information from AC, PC or memory. AR can receive information from
PC or DR. PC can receive information only from AR.
The arithmetic, logic and shift unit performs microoperations with
data from AC and DR and places the result in AC. Note that memory
receives its address from AR. Input data written to memory come from
DR, and data read from memory can go only to DR.
The computer instruction format has three fields: a 1-bit field for
indirect addressing symbolized by I, a 4-bit operation code (op-code),
and an 11-bit address field. The figure below lists four of the 16
possible memory reference instructions.
23 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.3 Microprogram Example
Fig: computer instructions
24 Nipun Thapa, Ch-5, Computer Organization
[Link]
5.3 Microprogram Example
The ADD instruction adds the content of the operand
found in the effective address to the content of AC.
The BRANCH instruction causes a branch to the effective
address if the operand in AC is negative. The program
proceeds with the next consecutive instruction if AC is not
negative. The AC is negative if its sign bit is a 1.
The STORE instruction transfers the content of AC into the
memory word specified by the effective address.
The EXCHANGE instruction swaps the data between AC
and the memory word specified by the effective address.
25 Nipun Thapa, Ch-5, Computer Organization
[Link]
Microinstruction Format and Description
The 20 bits of the microinstruction are divided into
four functional parts. The three fields F1, F2, and F3
specify microoperations for the computer
26 Nipun Thapa, Ch-5, Computer Organization
[Link]
Microinstruction Format and Description
27 Nipun Thapa, Ch-5, Computer Organization
[Link]
Microinstruction Format and Description
Each microoperation below is defined using resister
transfer statements and is assigned a symbol for use in
symbolic microprogram.
Description of CD
28 Nipun Thapa, Ch-5, Computer Organization
[Link]
Microinstruction Format and Description
Description of BR
29 Nipun Thapa, Ch-5, Computer Organization
[Link]
Microinstruction Format and Description
CD (condition) field consists of two bits representing 4 status bits and
BR (branch) field (2-bits) used together with address field AD, to
choose the address of the next microinstruction.
Microinstruction fields (F1, F2, F3)
30 Nipun Thapa, Ch-5, Computer Organization
[Link]
Microinstruction Format and Description
Here, microoperations are subdivided into three fields of 3-bits each.
These 3 bits are used to encode 7 different microoperations. No more
than 3 microoperations can be chosen for a microinstruction, one for
each field. If fewer than 3 microoperations are used, one or more
fields will contain 000 for no operation.
E.g. the Fetch Routine
Fig : Microinstructions for Fetch routine
31 Nipun Thapa, Ch-5, Computer Organization
[Link]
Microinstruction Format and Description
Fig.: Assembly language convention
Fig.: Binary microprogram
32 Nipun Thapa, Ch-5, Computer Organization
[Link]
Finished
Unit 5
33 Nipun Thapa, Ch-5, Computer Organization