CO I Unit – Chapter 1 Dept of CSE, NMAMIT

UNIT I – Chapter 1

1. BASIC STRUCTURE OF COMPUTERS

1.1 What is a Computer (Digital Computer)?
It is a fast electronic calculating device that accepts digitized information, processes it according
to the list of internally stored instructions and produces the result in the form of output.

Computer Types:

1. Personal Computer:

These are the widely used types of computers in homes, offices and colleges. There are basically
two types of this computer:

i. Desktop Computers:

Computer having a processing or a storage unit, visual display unit, audio unit, input units that
can all be located on a desk of a home or an office.

ii. Portable Notebook Computers:

These are compact version of personal computer with all kinds of devices of the desktop that is
being packaged in a single unit.

2. Workstation:

A computer with high resolution graphic input and output capability which has the dimension of
the desktop but with a higher computational power.

3. Enterprise systems and servers:

Also called as mainframes used for large business processing that has high computation power
and storage capacity than workstation/

Example: ATM

Servers:

These are the one which can handle large volume of requests to access data. Here request and
response both are transferred through internet.

4. Supercomputers:

Computers used for large scale numerical calculations and R & D areas.

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1.2 Functional Units of Computer

A computer system has 5 functionally independent units for instruction processing:

1. Input Unit
2. Memory Unit
3. Arithmetic & Logic Unit (ALU)
4. Output Unit
5. Control Unit (CU)

All the functional units that are being represented in the above schematic handle’s information
fortheir functionality and those information’s are called as instruction. Set of these instructions
constitute to what is called as Program is used to perform a specific task.

Next, we will discuss the overall properties and functionalities of the different units

1. Input Unit:

→Main functionality of this unit is to accept coded information from the human operators or any
other external systems.

→One of the well-known input devices is Keyboard. In keyboard whenever any key
corresponding to letter or a digit is pressed, it is automatically converted to the binary code and is
transmitted over the cable into the memory system or the processor.

2. Memory Unit:

→Main functionality of this unit is to store programs and data that has to be executed. The
memory unit is broadly classified into two classes:

a. Primary Storage
b. Secondary storage

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a. Primary Storage:

• Often known as a fast memory that operates at a very high speed.

• Any programs must be stored in this memory while they are being executed. The
memorysystem is made of a large number of storage cells which are capable of storing
one bit of information.

• While processing (accessing) the information, the information is accessed in terms of a

group of n bits which are called as a word. To provide easy access to the word, each word
is associatedwith a unique address called word location. Number of bits associated with a
word is called as word length and a word length ranges from 16 to 64 bits.

• When memory is accessed usually one word of data is read or written from or into
the memory.

• Primary memory components are called as a RAM (Random Access Memory) component.
RAM is the memory in which any word location can be reached in a short and fixed amount
of time. Time required access its word location is called as Memory Access Time and it is
constant irrespective of word location. The RAM units again have the hierarchy in the
memory systems which are classified as:

i. Cache memory: It is a very fast and smaller RAM unit that is built on top of the processor
chip.

ii. Main Memory: Largest and slowest RAM unit.

b. Secondary Storage:

A slower memory unit when compared to the primary memory but storage area is larger and
permanent and are usually magnetic disks and optical disks

3. Arithmetic & Logic Unit (ALU):

Most of the computer operations are being performed in this unit of the processor. Any ALU
operation is first initiated by bringing the required operands into the processor and is stored in
the high-speed storage elements of the processor called registers which usually have one word
capacity.

4. Output Unit:

Main functionality is to send the processed result to the outside world through any of the output
device.

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5. Control Unit (CU):

→Operations of all other units described earlier are controlled and coordinate by this dedicated
unit.

→Control unit controls and coordinates all the functionalities and communication between the
other units by sending the control signals to other units in the form of timing signals (clock
pulses). Timing signals are the signals that determine when a given action has to take place.

1.3 Basic operational Concepts

→In a computer system, to perform a given task, appropriate program consisting of list of
instructions is stored in the memory. Individual instruction from the memory is loaded into the
processor and is executed one by one by the processor to accomplish a given task. Data to be
used as operands are also stored in the memory.

Example of typical instruction:

ADD LOCA, R0

Above instruction adds the operand at memory location A to operand in register R0 and stores
the result in register R0 as shown:

R0 = [LOCA] + [R0]

Execution Steps:

For the time being we will mention the steps of execution very abstractly, later we will see the
detailed execution. For the execution of any mathematical operations, it has to be performed by
bringing the operands from the memory into the processor registers. Steps of operation are:

1. First instruction is fetched from the memory in to the processor.

2. Then the execution of the instruction is done as shown below:

Load LOCA, R1 (R1 = [LOCA])

Add R1, R0 (R0 = [R1] + [R0])

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Connection between processor and memory

Transfer between memory and processor starts by sending address of memory location to be
accessed into the memory unit along with the appropriate control signal for performing the
required action.

In addition to ALU and Control Unit, processor has a number of other registers which are
classified as dedicated registers and general purpose register.

1. Instruction Register (IR): A dedicated holds the instruction that is currently being executed.

2. Program Counter (PC): A dedicated register that keeps track of the execution of the
program. It points to the next instruction to be executed.

3. Memory Address Register (MAR): A dedicated register that holds the address of any
location of the memory unit that has to be accessed.

4. Memory Data Register (MDR): A dedicated register that contains the data to be written into
or read out from the memory unit.

5. General purpose Registers: There are n general purpose registers for holding the operands
that is decoded from the instruction.

Steps of Execution:

1. Execution of the program starts when PC is set to point to the first instruction of the
program that is to be executed.

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2. Contents of PC are then transferred to MAR and a read control signal is sent to the
memory unit to fetch the instruction from the memory location. Addressed word is read
out of the memory location and is loaded into the register MDR.
3. Next contents of MDR are transferred into IR for the execution purpose. If the
instruction involves any operation that needs operand from the memory location,
operands are fetched from the memory location by sending their address along with the
read signal, Value will be transferred into MDR and then into the general purpose
register.
4. After completing the operation, result may be kept in the general purpose register or may
be sent into the memory location by sending the computed data into MDR along with
write signal by the control unit

1.4 Bus structures

→These are the one that defines how to connect different functional units of the computer.

→Bus: Group of lines (wires) that serves as a connecting path for the several devices connected
across the system is called as Bus.

Lines basically constitute of:

1. Address lines → Carries address to be accessed from the memory location.

2. Data lines → Carries data from or into the memory unit.
3. Control lines → Carries control signals required performing the operation.

Bus structures are broadly classified into two types:

1. Single Bus structure

2. Multiple Bus structure

Single Bus structure:

Input Output Memory Processor

BUS

Here all the units are connected to a single bus. At a time bus can be used for only one transfer
i.e. two units can actively use bus at any given time. Bus control lines are used to arbitrate
multiple bus requests which are called as Bus arbitration. Main advantage of this bus is low
cost and high flexibility.

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1.5 Some basic definitions:

Software: Collection of programs are called as software.

System Software: Software that is responsible for coordination of all the activities of the
computing system.

Operating System: Large program that is used to control the interaction among the various
computer units as they execute application program.

Performance: Computer performance is measured in terms of how quickly it can execute

programs to accomplish a given task successfully.

Factors affecting Computer performance:

1. Compiler
2. Machine Instruction set
3. Hardware Design

Processor Clock: These are the timing signals that control the processor circuits.

Above shown is the representation of the timing signals were one positive and negative edge
constitutes to clock cycle. A timing signal is made of several such clock cycles and the length of
the clock cycle affects the processor speed greatly. During the execution of an instruction each
and every step of the execution is made to complete in one clock cycle. Length of clock cycle is
nothing but the clock period (P) and is inversely proportional to the clock rate (R).

Clock rate is mentioned in terms of cycles per second and a standard unit called Hertz is used to
represent clock rate.

For example: 500 MHz means 500 million cycles per second and 500 GHz means 500 billion
cycles per second were Mega and Giga is used to represent million and billion respectively.

If clock rate of a processor is 500 MHz then clock period P is given by

P = 1/R = 1/500X106 = 0.002X10-9 = 2ns

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1.6 Basic Performance Equation (Processor Time Equation)

→The Equation is also called T, N, S, R equation.

• Let T be the processor time required to execute a program that has been prepared in some
high-level language.
• Compiler generates machine level language for these programs. Assume that complete
execution requires N machine languages to be executed.
• Let S be the average basic step needed to execute one instruction where each step is
completed in one clock cycle
• Let R be the clock rate of the processor clock for a system.

Program Execution Time

1.7 Pipelining & Superscalar Operations

Pipelining

Overlapping the execution of successive instruction in order to improve performance is called as

Pipelining.

Normally when executing any instruction, execution of the instructions is carried out in different
steps such as Fetch, Decode & Execute. Each step of the execution is done by a separate
functional unit. In case of serial execution new instruction is fetched only when the previous
instruction has completed all the steps of execution. But in case of pipelining if any step of the
execution is left idle, new instruction can be sent into that unit.

Example: ADD R1, R2, R3

Move LOC, R1

In the above example mentioned, according to the technique, execution of the instructions is
done in sequence one by one. i.e. execution of the instruction Move starts only after the
completion of execution of instruction ADD. But in the technique of pipelining once after
completing the fetching of operands R1 and R2 of Add instruction, next instruction will be
fetched into the processor when fetching unit is idle.

Superscalar operation
Multiple instruction pipelines are implemented in order to achieve higher degree of concurrency
and this approach is called superscalar operation.

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1.8 Performance Measurement

Computer community adopted the idea of measuring computer performance using standard
programs which are independent of particular system platform and these programs are called as
Benchmark programs.

Here performance measure is the time taken by computer to execute a given Benchmark Suitewith
respect to Benchmark systems. Benchmark Suite is a package of various benchmark programs that
is being developed for various application domain such as database, gaming, compilers etc.

To select and publish benchmark programs, a nonprofit organization called System Performance
Evaluation Corporation (SPEC) is working. To rate the system they have a standard unit which
is called as SPEC rating which is calculated for each and every benchmarkprograms individually
and is given by the formula:

If SPEC rating is 50, it means Computer under test is 50 times faster than the standard
Benchmark system in terms of performance.

The overall SPEC rating is the product of individual rating and is given by the formula:

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CO I Unit – Chapter 2 Dept. of CSE, NMAMIT

MACHINE INSTRUCTIONS & PROGRAMS

Chapter Outcome:
➔ Gaining knowledge over basic machine instructions and program execution..
➔ Different addressing methods for accessing register and memory locations.
➔ Syntax of assembly language.
➔ Concepts of subroutine and their execution.
➔ Usage of stacks in executing program.

2.1 Memory locations and addresses

Main functionality of the memory unit is to store programs and data operands that are requiredfor
program execution.

• Each memory unit is made up of a large storage cells were each cell has the capacity of
storing1 bit in terms of binary value 0 or 1

• Even if the memory unit is made of single bit storage cells, while accessing it accesses in
terms of group of n bits called word. n bits representing the word is called as word length.
Wordlength varies from system to system and the usual length varies from 16 to 64 bits.

• When representing memory schematically, it is represented as a collection of words arranged

vertically as shown in the figure below:

• Next lets concentrate on the structure of each word, how exactly it stores the information.
From now on we will discuss the memory unit having 32 bit word length as a standard.

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Structure of each word

This is one of the format for the structure of word which shows the arrangement of bitsaccording
to the word length.

There is another way for storing the information in encoded form. In encoded form, the
information will be stored in terms of ASCII value, were each ASCII character is made up of 8
bits (1 byte). Then a word of 32 bit length is divided into 4 ASCII character or 4 bytes length.
Below shown figure represents the format of encoded 32 bit word.

Accessing memory items:

After knowing about the proper structure of memory and its representation, next we need to know
how exactly data items stored in memory location can be accessed. To access any item from
memory location, each location is assigned with a unique address.

Address locations are directly related to number of address lines that is present in a system. If there
are k bits of address lines, then the address value ranges from 0 to 2k - 1locations.

Byte Addressability
Assigning address to successive bytes of the memory location is called as Byte addressability.
Most of the modern computers use this assignment system. If the word length is 32 bits, then
successive words are located in 0, 4, 8… byte positions in memory system.

Big Endean and Little Endean Assignments

There are basically two different methods for assigning byte addresses across the words in a
memory location:

1. Big Endean form

2. Little Endean form

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1. Big Endean Form:

In this form of representation, lower byte addresses are used for Most Significant Bytes of the
word. I.e. the leftmost byte of the word. To get the better understanding of this form, consider the
pictorial representation shown below:

2. Little Endean Form:

In this form of representation, lower byte addresses are used for Least Significant Byte of the word.
I.e. the rightmost byte of the word. The representation is done exactly opposite of the Big Endean
format. Even then when accessing the successive words, successive words are located in the same
location as that of Big Endean format. To get the better understanding of the form, consider the
pictorial representation shown below:

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Memory Operations
There are two basic memory operations:

1. Load (Read or Fetch)

2. Store (Write)
1. Load: Transfers a copy of contents of a specific memory location into processor registers. On
performing this operation, contents of memory location remain unchanged. To accomplish this
operation, address of memory location is sent to the memory unit along with the read signal. Hence
also called as read operation.

2. Store: Transfers an item of information from the processor register into a specific memory
location destroying former contents that is already stored inside the memory location. This
operation is accomplished by sending desired address of the memory location along with write
signal into memory unit. Hence it is also called as write operation.

2.3 Instructions and Instruction sequencing

Computer system must have instructions that are capable of performing mainly four types of basic
operations:

1. Data transfer between processor registers and memory.

2. Arithmetic and Logic operations on data.

3. Program sequencing and control.

4. I/O transfers.

Register Transfer Notation (RTN)

When it comes to transfer of information in the computer system, transfer of informationinvolves
transfer of data from one location into another location. Possible locations are memory locations,
processor registers and I/O registers.

To represent the transfer of information between these locations, a standard notation is used and
this standard notation is called as Register Transfer Notation. It uses different nomenclatures to
represent these locations.

• Symbolic names for the memory locations are represented as variable names such as
LOC, A, VAR1, NUM etc.
• Symbolic names for registers are usually represented by placing a alphabet or number
suffix to the letter ‘R’. For ex R0, R1, R2, …..etc
• I/O registers are represented by the names such as DATAIN, DATAOUT etc.

• Contents of these locations are denoted by placing a square braces between the location

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names. For example

• A notation [LOC] means contents present inside the memory location LOC.
• A notation [R0] means contents of the register R0

To get a clear knowledge on Register Transfer Notation, we will look into some of the example
notations and their meaning which is shown below:
Example 1:
R1  [LOC]

This means contents of memory location LOC is copied into the processor register R1.

Example 2:
R3  [R1] + [R2]

This means contents of register R1 and R2 are added and sum is placed inside the processor register
R3.

These types of notations help in understanding the problem and makes writing of machine
instructions in an easier way. Every time left side has to be the name of the location and rightside
has to be contents of some location.

2.3.1 Assembly Language Notation

A notation used to represent the machine and programs very closely are called as Assembly
Language Notation.

For example consider an operation that is represented using Register Transfer Notation

R1  [LOC]

Above operation loads the contents of memory location LOC into the register R1. In machine
instruction, this can be represented as:

Move LOC, R1
This instruction copies the data from memory location LOC and loads into a register R1. In this
notation first we need to write the operation to be performed which is Move. Then destination
location R1 is written at the end and sources must be written first immediately after the operation.
Here source is LOC. Source means it will fetch the contents of the specified location which can
be a register or a memory location.

Consider another Register Transfer Notation

R3  [R1] + [R2]

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This instruction as we know adds contents of register R1 and registers R2 and stores the value
inside register R3. In that case R1 and R2 are sources and R3 is a destination and the operation
involved is add operation. In a machine instruction, this can be represented as shown below:

Add R1, R2, R3

Basic Instruction Types
Based on the number of operands that can be used in a single instruction, machine instructions
can be written in three different formats:

1. Three address instruction

2. Two address instruction
3. One address instruction

To discuss the format of all the above instructions, we will consider a common example of the
expression C = A+B as an example

Expression C = A+B in Register Transfer Notation is represented as:

C  [A] + [B]

1. Three address instruction: An instruction type which consists of memory address of three
operands are called as three address instruction. Below shown is the syntax of three address
instruction format

Syntax
Opcode Source1, Source2, Destination

Were,

Opcode →Represents the type of operation to be performed such as add, sub etc

Source1 → Represents operand1 memory location used in the operation

Source2 → Represents operand2 memory location used in the operation

Destination→Represents the destination memory location were result is stored

For the Considered expression can be represented as:

Operation → Add

Source1 → A

Sourec2 → B

Destination → C

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2. Two address instruction: An instruction type which consists of memory address of only two
operands is called two address instruction types. In this format, One of the location acts both as
a source and destination.

Syntax for two address format is:

Opcode Source, Destination,

Opcode →Operation performed such as Add, Sub etc

Source →Operand1 required for the operation fetched from memory location

Destination→This acts both as a source and destination. To do the operation, it fetches operand2
from the memory location and after performing the operation it acts as destination location for
storing the result.

To implement R2= R0+R1:

In Two address instruction, it can be represented as:
ADD R0,R1
MOVE R1, R2

3. One address instruction: An instruction type which contains memory address of only one
operand is called as One address instruction.

In that case second operand is considered to be in a location called as processor register. Some
systems have only one unique processor register called accumulator and some systems have many
registers called general purpose registers. Based on this there are two classifications for one
address instruction:

i. One address instruction using accumulator: In this format, instruction contains memory
address of only one operand and the second operand is considered to be in a unique location called
Accumulator.
For example:
Add A

It means to add the contents of memory location A with contents present in the accumulator and
store the result back in the accumulator.

Load A
It means to load the contents from memory location A into the accumulator register.

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Instruction Execution and Straight-line sequencing

In this section we will know about the arrangement of program instructions in memory and how
they are executed by the processor to accomplish a task.

To explain the instruction execution concepts in detail, let’s consider the execution of following
set of instruction sequence by the processor:

Move A, R0
Add B, R0

Move R0,C
Program instructions and data required for the program execution needs to be brought into main
memory before they start their execution. We will see how these instructions and data are arranged
in the main memory unit for the set of instructions considered above

Arrangement of program instructions in memory system

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Instructions when stored in the memory are stored in a sequence as shown in the above schematic
representation.

System memory is assumed to be a 32 bit memory system and instructions are stored insuccessive
words having 4 byte length in the sequence i, i+4 and i+8.

Memory location A, B and C correspond to the data required for the operation.

Next we will look how execution steps are carried out in the processor for the above considered
set of instructions

1. To begin with the execution of a program, register called Program Counter (PC) must
hold the address of first instruction that is present in the location I of the program.
2. Next processor control circuits use the information in the PC to fetch and execute
instructions one at a time in the order of increasing address, this method of execution is
called as Straight line sequencing.
3. During execution of each instruction, value of PC is incremented by 4 to point to the next
instruction in the program sequence.

Altogether execution of a given instruction is divided into two phases:

1. Instruction fetch: In this phase instruction is fetched from the memory location whose
address is in PC and fetched instruction is placed in a Instruction Register (IR).
2. Instruction execute: In this phase instruction in IR is executed to determine the operation
to be performed. This phase often involves fetching of operands either from memory or
processor registers and performing operation on them and storing result back in register or
memory location.
Some point during these two phases PC is incremented to point to the next instruction.

Branching
To explain branching technique, let us consider the task of adding N numbers through machine
instructions:
Assume that the address of N numbers to be Num1, Num2,….,Num n which are sequentially
arranged in the memory location one after the other in successive words. Let us use the format of
the instruction that allows only one operand address to fetch from the memory location and the
other from any general purpose register. After doing the require operation final result is saved in
the memory location called sum
According to straight line sequencing technique, machine instruction for the considered problem
can be implemented as shown in the figure below.

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As and when instruction accesses a new number, it is added to the sum series were register R0is
keeping track of the sum series and final result is saved in the location sum.
If the implementation is done through straight line sequencing as shown in the above figure, it
requires a very large number of add instructions to be placed in the memory which acquires lot
of space in the memory. I.e. if there are n numbers there are n-1 add instructions. To overcome
this problem, instead of placing so many add instructions a single add instruction can be place
inside the loop which can be made to repeat n times with a different data value.
Logic of implementing looping concept through machine instruction is called Branching
technique.
To understand the concept of branching for the above instructions, we will understand
the logicthrough ‘C’ program pseudocode written as shown below:
sum = 0;
loop: sum = sum + next number in the address location;
n=n-1;
if(n>0) Goto loop

Here value n is the total numbers to be added in the series which keeps track of the total number
of iterations. It starts from the highest value and gets decremented for every iteration and has to
stop when it reaches 0. In every iteration the number is added to sum series and finally when the
loop terminates, sum series is saved in the location sum. Goto is used to implement the looping
concept which goes back to a location called loop if number is not equal to 0.
Using loop technique in the machine instruction technique, it can be written as shown in the figure
below:

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Let us understand the above written instructions by comparing it with pseudo code written in C.
➢ Initially register R1 is set to value of N through the instruction move N, R1. This register
is used to keep track of total number of iterations for the loop.
➢ Clear R0 instruction empties the register R0 or simply sets the NULL (0) value to the
register so that each number is added to R0 and stored back in R0. To keep it simple it sets
the value R0=0.
➢ To determine the address of a next number, there is a method and we will study how to do
that when we discuss the concept called addressing modes.
➢ Decrement R1 decrements the contents of register R1 by 1. Were R1 has the value of total
numbers which determines the count of a loop n times
Next we will see processing of branch instructions:
• Branch instructions load a new value into a program counter (PC) apart from the sequential
execution.
• Branch instructions specifies the new address that is to be loaded into the program counter
and this address is called as Branch Target address. Program counter is loaded with the
branch target address only if the specified condition in the branch instruction is satisfied.
• For example in the above written set of instructions, Branch > 0 Loop means the result of
immediately preceding instruction is checked and if it is greater than 0 then program
counter will be loaded with the address 0 or else carries out the execution in sequence. In
that case result of decrement R1 is checked which the preceding instruction to branch
instruction is. If it is greater than zero or not and decision of branching is done based on its
value.

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Condition Codes
• Processor keeps track of information about the results of various instructions for the usage
of subsequent conditional branch instructions.

• This is done by recording the required information of the most recently executed instruction
ina individual bits. These individual bits are called as Condition Code flags. These flags
are grouped together in a special processor register called Condition Code register
or Statusregister.
There are four commonly used flags for any operations:
1. N (Negative flag): This flag sets a bit value to 1 if the executed result is less than zero or
else sets the value to 0.
2. Z (Zero flag): This flag sets the bit value to 1 if the executed result is zero or else sets the
value to 0.
3. V (Overflow flag): This flag sets the bit value to 1 if the executed result has caused
arithmetic overflow or else sets the value to 0.
4. C (Carry flag): This flag sets the bit value to 1 if the executed result has caused carry out
from the operation or else sets the value to 0.

Typical register structure would be arranged as shown below:

For example an instruction Branch > 0 will check if the bit N and Z are 0 or not to ensure that
value of the previous result is greater than zero.

Addressing modes
What are addressing modes?
Different ways for specifying the address of a memory location in the instruction for fetching the
operands are called as addressing modes.

Based on the type of operand need to be accessed, addressing modes are categorized under the
following types:

1. Implementation of variables and constants

2. Indirection and pointers
3. Indexing and arrays
4. Relative addressing
5. Additional modes

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i. Register mode: Operand to be fetched is the contents of processor register were name of the
register is specified in the instruction

Example: Add R0, R1

In this example R0 and R1 contents acts as an operands to be fetched.

ii. Absolute mode (Direct mode): Operand to be fetched is the contents of memory location and
address of memory location is directly stated in the instruction in terms of the memory location
name. This mode is also called as direct mode as it directly accesses the memory location for
fetching the operands.

Example: Move Loc1, Loc2

In this example, Loc1 and Loc2 are the locations of the memory to be accessed which moves the
contents of Loc1 into Loc2 of the memory.

As an example consider below instruction:

Move Loc, R2

In this example, contents of memory location Loc is loaded into the processor register R2. In this
case both register mode and direct mode are used were R2 is a register and Loc is a memory
location.

[Link] of constants

Immediate mode: To represent constants there is only one addressing mode called as immediate
mode. In this addressing mode, operand value is explicitly given in the instruction. Since the values
can be explicitly given only into the registers it is also called as Register Immediate mode. Note
that when using this addressing mode the values can be stated only to the register and memory
location cannot be used in this mode.
Example: Move #200, R0

This places the value 200 into the register R0 and symbol ‘#’ is used to specify the immediate
mode.
Example: Move #NUM1, R0

This fetches the address value of memory location named #NUM1 and loads into the register R0.

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Let’s look into another example. To implement A = B+6 in the machine instruction, it can be
implemented as:

In register transfer notation, it is represented as A  [B] + 6

Move B, R1 ( R1 [B] )

Move #6, R1 ( R1 6 )

Move R1, A ( A [R1] )

Indirection and Pointers

Following addressing modes that will be discussed does not provide the memory address of the
operand directly. Rather than it gives the information from which the memory address of the
operand can be determined. The address of the meory location to fetch the operand is called as
Effective address.

Basically in this type, memory is accessed indirectly from another memory. This technique of
addressing is called as Indirect mode.

Indirect mode: Effective address of the operand is the contents of register or memory location
whose address is specified in the instruction. We denote the memory to be accessed in this mode
by placing the name of the register or memory location in parenthesis.

For example (R1) means operand address is the contents of register R1 and (LOC) means operand
address is the contents of the memory location.

We will look into the following examples to get the clear understanding:

Example 1:Add (R1), R0

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In this example, R1 is specified in the braces and indicates the indirect mode. That means R1
contains the address of the memory location were the operand is placed. The above instruction
uses indirect mode through general purpose register.

Here in this example content of R1 is the address from were operand needs to be fetched. R1 is
having the value B which means B is the effective address from where the operand needs to be
fetched.

Example 2: Add (A), R0

This example is bit different in the sense it uses indirect mode through memory location. Here the
address of the memory location is the contents of the memory location A which is nothing but B.
So here in this case effective address is the memory location B.

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Indexing and Arrays

Indexed mode: Effective address of the operand is generated by adding a constant value to the
contents of the register. General syntax of indexed mode is given by:

X(Ri)

Were,

Ri→Index register having an address value often called as a Base register.

X →A constant value added into the contents of register Ri called as offset value.

Effective Address (EA) is calculated by the formula:EA =

X + [Ri]

An example program to exhibit the usage of Indexed mode

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To exhibit the usage of indexed n\mode, we will consider the example of student marks entry of
three tests which is shown accordingly in the figure above.

Input to this program is student’s ID and the marks of three tests and the output is the sum of
test1, test2 and test3 of all the students calculated separately.

By observing the above figure, we will get a clear picture on the structure of data arrangement
and following observation can be made:

1. Every preceding student ID is found after 4 memory locations (16 bytes) from the
previous student ID
2. Test 1 is after 1 word from a particular student ID (4 bytes)
3. Test 2 is after 2 words from a particular student ID (8 bytes)
4. Test 3 is after 3 word from a particular student ID (12 bytes)

So above data can be accessed by referring to the first student ID and then incrementing its
address

According to the data structure shown above, memory location List is the memory location
containing the student 1 ID and all the other data can be accessed from that point.

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Types of indexed mode: There are some variations in the indexed mode addressing by the way
it is being written:

1. Base with index register:Here one of the register itself is used as offset value X. General
syntax of this type of indexed mode is written as show:
(Ri, Rj)
Here second register Rj acts is the offset value and effective address EA is given by:

EA = [Ri] + [Rj]

2. Base with index and offset value: Here constant value X, contents ofindex register Rj
and Base register Ri are added together to get the Effective Address value.
General syntax of this mode is given by:
X(Ri, Rj)
EA = X + [Ri] + [Rj]

Relative addressing mode

In the last section we have discussed about the indexed addressing mode using any general purpose
register as a base register. An useful version of this is derive by using Program Counter in place
of general purpose register. Hence it is also called as PC relative addressing mode.
General form of this mode is denoted by X(PC)which addresses a memory location that is X bytes
away from location pointed to b the PC. Here X is a constant value that acts as adisplacement from
PC which is a base register in this case.
The addressing mode is called as relative mode because the address of location is identified relative
to the program counter. Effective address of this mode is given by:
EA = X + [PC]
Most common use of this mode is to specify target address in branch instructions such as:
Branch > 0 Loop
Here Loop is the branch target address and when processed internally specifies the displacement
value from the program counter.

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Additional Modes
So far discussed are the basic modes of addressing which are present in almost all the computer
systems. Following discussions are on additional modes and they are called as additional modes
because these modes are derived from basic modes which are not present in all the systems and
they are intended to aid certain programming tasks in fewer steps that combine basic modes
together in a single instruction.

Two types of additional modes are discussed here:

1. Auto increment mode

2. Auto decrement mode

1. Auto increment mode:In this addressing mode effective address of the operand is thecontents
of the register specified in the instruction. After accessing the operands, the contents of the register
are automatically incremented to point to the next item in the memory location.

When it is incremented, it is incremented according to the value of accessed operand. For example
if the accessed operand is integer, memory location of 1 word (4 bytes) is incrementedin 32 bits
system. If the operand type is character, location value is incremented by 1 byte (8bits).

The general form of representation of this addressing mode is (Ri)+which automatically

increments the value to the next location corresponding to the operand type accessed.

In the above set of instructions, operand is accessed from the location pointed to by the contents
of the register R2 and added with R0. After adding it with R0, contents of the register R2 is
incremented by 4 bytes to point to the next location. This can be written in single instruction using
the auto increment mode as shown below

Add (R2)+, R0

Above instruction after accessing the operand, increases value by 4 bytes to point to the next
location in the memory.

This mode can be used for adding N numbers in the series. Below set of instructions shows the
usage of this mode for adding N numbers.

Move N, R1 //load the value of N into register R1

Move #NUM1, R2 //load register R2 with NUM1 address value

Clear R0 //set register R0 with null value

Loop: Add (R2)+, R0 // Access the operand and increment to the next location

Decrement R1 //decrement the value of counter

Branch>0 Loop //Check if R1>0 if so goto Loop

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Move R0,Sum //store the result in location Sum

[Link] decrement mode: This addressing mode is exactly opposite to the auto increment mode.
This mode first decreases the memory location to value to point to next location and then accesses
the operand value from that memory loaction

General form of this mode is given by: -(Ri).

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