DEPARTMENT OF COMPUTER SCIENCE

LECTURE NOTE COMPUTER ORGANIZATIONAND ARCHITECTURE

STRUCTURE OF COMPUTERS: Computer types, functional units, basic operational concepts,

Von‐Neumann architecture, bus structures, software, performance, multiprocessors and
multicomputer
Data representation, fixed and floating point and error detecting codes.

REGISTER TRANSFER AND MICRO‐OPERATIONS: Register transfer language, register

transfer, bus and memory transfers, arithmetic micro‐operations, logic micro‐operations, shift
micro‐operations, arithmetic logic shift unit.
Computer Architecture:
Computer Architecture deals with giving operational attributes of the computer or Processor
to be specific. It deals with details like physical memory, ISA (Instruction Set Architecture) of
the processor, the number of bits used to represent the data types, Input Output mechanism
and technique for addressing memories.
Computer Organization:
Computer Organization is realization of what is specified by the computer architecture .It deals
with how operational attributes are linked together to meet the requirements specified by
computer architecture. Some organizational attributes are hardware details, control signals,
peripherals.
EXAMPLE:
Say you are in a company that manufactures cars, design and all low-level details of the car
come under computer architecture (abstract, programmers view), while making it’s parts piece
by piece and connecting together the different components of that car by keeping the basic
design in mind comes under computer organization (physical and visible)
Computer Organization Computer Architecture

Often called microarchitecture (low level) Computer architecture (a bit higher level)

Transparent from programmer (ex. a programmer does not Programmer view (i.e. Programmer has to be
worry much how addition is implemented in hardware) aware of which instruction set used)
Physical components (Circuit design, Adders, Signals, Logic (Instruction set,
Peripherals) Addressing modes, Data types, Cache
optimization)
What to do ? (Instruction set)
How to do ? (implementation of the architecture)

GENERATIONS OF A COMPUTER
Generation in computer terminology is a change in technology a computer is/was being used.
Initially, the generation term was used to distinguish between varying hardware technologies.
But nowadays, generation includes both hardware and software, which together make up an
entire computer system.
There are totally five computer generations known till date. Each generation has been
discussed in detail along with their time period and characteristics. Here approximate dates
against each generations have been mentioned which are normally accepted.
Following are the main five generations of computers
 S.N. Generation & Description

1 First Generation
The period of first generation: 1946-1959. Vacuum tube based.

2 Second Generation
The period of second generation: 1959-1965. Transistor based.
3 Third Generation
The period of third generation: 1965-1971. Integrated Circuit based.
4 Fourth Generation
The period of fourth generation: 1971-1980. VLSI microprocessor based.
5 Fifth Generation
The period of fifth generation: 1980-onwards. ULSI microprocessor based

First generation
. In this generation mainly batch processing operating system were used. Punched cards,
paper tape, and magnetic tape were used as input and output devices. The computers in this
generation used machine code as programming language.

The main features of first generation are:

 Vacuum tube technology, Unreliable, Supported machine language only, Very costly
 Generated lot of heat, Slow input and output devices, Huge size, Need of A.C.
 Non-portable, Consumed lot of electricity, Some computers of this generation were:
ENIAC, EDVAC. UNIVAC, IBM-701, IBM-650

Second generation
In this generation assembly language and high-level programming languages like FORTRAN,
COBOL were used. The computers used batch processing and multiprogramming operating
system.
The main features of second generation are:
 Use of transistors
 Reliable in comparison to first generation computers
 Smaller size as compared to first generation computers
 Generated less heat as compared to first generation computers
 Consumed less electricity as compared to first generation computers
 Faster than first generation computers
 Still very costly
 A.C. needed
 Supported machine and assembly languages
Some computers of this generation were:
 IBM 1620, IBM 7094, CDC 1604, CDC 3600, UNIVAC 1108

Third generation
. High- level languages (FORTRAN-II TO IV, COBOL, PASCAL PL/1, BASIC, ALGOL-68 etc.) were
used during this generation.

The main features of third generation are:

 IC used, More reliable in comparison to previous two generations, Smaller size
 Generated less heat, Faster, Lesser maintenance, Still costly
 A.C needed, Consumed lesser electricity
 Supported high-level language
Some computers of this generation were:
 IBM-360 series, Honeywell-6000 series, PDP(Personal Data Processor), IBM-370/168
 TDC-316

Fourth generation
. Fourth generation computers became more powerful, compact, reliable, and affordable. As a

result, it gave rise to personal computer (PC) revolution. In this generation time sharing, real
time, networks, distributed operating system were used. All the high-level languages like C,
C++, DBASE etc., were used in this generation.

The main features of fourth generation are:

 VLSI technology used
 Very cheap
 Portable and reliable
 Use of PC's
 Very small size
 Pipeline processing
 No A.C. needed
 Concept of internet was introduced
 Great developments in the fields of networks
  Computers became easily available
Some computers of this generation were:
 DEC 10
 STAR 1000
 PDP 11
 CRAY-1(Super Computer)
 CRAY-X-MP(Super Computer)

Fifth generation

This generation is based on parallel processing hardware and AI (Artificial Intelligence)

software. AI is an emerging branch in computer science, which interprets means and method
of making computers think like human beings. All the high-level languages like C and C++, Java,
.Net etc., are used in this generation.
AI includes:
 Robotics
 Neural Networks
 Game Playing
 Development of expert systems to make decisions in real life situations.
 Natural language understanding and generation.
The main features of fifth generation are:
 ULSI technology
 Development of true artificial intelligence
 Development of Natural language processing
 Advancement in Parallel Processing
 Advancement in Superconductor technology
 More user friendly interfaces with multimedia features
 Availability of very powerful and compact computers at cheaper rates
Some computer types of this generation are:
 Desktop
 Laptop
 NoteBook
 UltraBook
 ChromeBook

COMPUTER TYPES
Classification based on Operating Principles
Based on the operating principles, computers can be classified into one of the following types:
1) Digital Computers
2) Analog Computers
3) Hybrid Computer
Digital Computers: - Operate essentially by counting. All quantities are expressed as
discrete or numbers. Digital computers are useful for evaluating arithmetic expressions and
manipulations of data (such as preparation of bills, ledgers, solution of simultaneous equations
etc).
Analog Computers:- An analog computer is a form of computer that uses the continuously
changeable aspects of physical phenomena such as electrical, mechanical, or
hydraulic quantities to model the problem being solved. In contrast, digital
computers represent varying quantities symbolically, as their numerical values change
Hybrid Computers:- are computers that exhibit features of analog
computers and digital computers. The digital component normally serves as the controller

and provides logical operations, while the analog component normally serves as a solver
of differential equations.

Classification digital Computer based on size and Capability

Based on size and capability, computers are broadly classified into
Micro Computers(Personal Computer)
A microcomputer is the smallest general purpose processing system. The older pc started 8
bit processor with speed of 3.7MB and current pc 64 bit processor with speed of 4.66 GB.
Examples: - IBM PCs, APPLE computers
Microcomputer can be classified into 2 types:
1. Desktops
2. Portables
The difference is portables can be used while travelling whereas desktops computers cannot
be carried around.
The different portable computers are: -
1) Laptop
2) Notebooks
3) Palmtop (hand held)
4) Wearable computers
Laptop: - this computer is similar to a desktop computers but the size is smaller. They are
expensive than desktop. The weight of laptop is around 3 to 5 kg.

Notebook: - These computers are as powerful as desktop but size of these computers are
comparatively smaller than laptop and desktop. They weigh 2 to 3 kg. They are more costly
than laptop.

Palmtop (Hand held): - They are also called as personal Digital Assistant (PDA). These
computers are small in size. They can be held in hands. It is capable of doing word processing,
spreadsheets and hand writing recognition, game playing, faxing and paging. These computers
are not as powerful as desktop computers. Ex: - 3com palmV.

Wearable computer: - The size of this computer is very small so that it can be worn on the
body. It has smaller processing power. It is used in the field of medicine. For example pace
maker to correct the heart beats. Insulin meter to find the levels of insulin in the blood.

Workstations:- It is used in large, high-resolution graphics screen built in network support,

Engineering applications(CAD/CAM), software development desktop publishing
Ex: Unix and windows NT.
b) Minicomputer: - A minicomputer is a medium-sized computer. That is more powerful
than a microcomputer. These computers are usually designed to serve multiple users
simultaneously (Parallel Processing). They are more expensive than microcomputers.
Examples: Digital Alpha, Sun Ultra.
 c) Mainframe (Enterprise) computers: - Computers with large storage capacities and
very high speed of processing (compared to mini- or microcomputers) are known as
mainframe computers. They support a large number of terminals for simultaneous use by a
number of users like ATM transactions. They are also used as central host computers in
distributed data processing system.
Examples: - IBM 370, S/390.

d) Supercomputer: - Supercomputers have extremely large storage capacity and

computing speeds which are many times faster than other computers. A supercomputer is
measured in terms of tens of millions Instructions per second (mips), an operation is made up
of numerous instructions. The supercomputer is mainly used for large scale numerical
problems in scientific and engineering disciplines such as Weather analysis.
Examples: IBM Deep Blue

Classification based on number of microprocessors

Based on the number of microprocessors, computers can be classified into
a) Sequential computers and
b) Parallel computers
a) Sequential computers: - Any task complete in sequential computers is with one
microcomputer only. Most of the computers (today) we see are sequential computers where in
any task is completed sequentially instruction after instruction from the beginning to the end.
b) Parallel computers: - The parallel computer is relatively fast. New types of computers
that use a large number of processors. The processors perform different tasks independently
and simultaneously thus improving the speed of execution of complex programs dramatically.
Parallel computers match the speed of supercomputers at a fraction of the cost.

Classification based on word-length

A binary digit is called “BIT”. A word is a group of bits which is fixed for a computer. The
number of bits in a word (or word length) determines the representation of all characters in
these many bits. Word length leis in the range from 16-bit to 64-bitsf or most computers of
today.

Classification based on number of users

Based on number of users, computers are classified into: -
Single User: - Only one user can use the resource at any time.

Multi User: - A single computer shared by a number of users at any time.

Network: - A number of interconnected autonomous computers shared by a number

of users at any time.

COMPUTER TYPES
A computer can be defined as a fast electronic calculating machine that accepts the
(data) digitized input information process it as per the list of internally stored instructions and
produces the resulting information. List of instructions are called programs & internal storage
is called computer memory.

The different types of computers are

 1. Personal computers: - This is the most common type found in homes, schools, Business
offices etc., It is the most common type of desk top computers with processing and
storage units along with various input and output devices.
2. Note book computers: - These are compact and portable versions of PC
3. Work stations: - These have high resolution input/output (I/O) graphics capability, but
with same dimensions as that of desktop computer. These are used in engineering
applications of interactive design work.
4. Enterprise systems: - These are used for business data processing in medium to large
corporations that require much more computing power and storage capacity than work
stations. Internet associated with servers have become a dominant worldwide source of
all types of information.
5. Super computers: - These are used for large scale numerical calculations required in
the applications like weather forecasting etc.,

BASIC TERMINOLOGY
•Input: Whatever is put into a computer system.
•Data: Refers to the symbols that represent facts, objects, or ideas.
•Information: The results of the computer storing data as bits and bytes; the words, umbers,
sounds, and graphics.
•Output: Consists of the processing results produced by a computer.
•Processing: Manipulation of the data in many ways.
•Memory: Area of the computer that temporarily holds data waiting to be processed, stored,
or output.
•Storage: Area of the computer that holds data on a permanent basis when it is not
immediately needed for processing.
•Assembly language program (ALP) –Programs are written using mnemonics
•Mnemonic –Instruction will be in the form of English like form
•Assembler –is a software which converts ALP to MLL (Machine Level Language)
•HLL (High Level Language) –Programs are written using English like statements
•Compiler -Convert HLL to MLL, does this job by reading source program at once
•Interpreter –Converts HLL to MLL, does this job statement by statement
•System software –Program routines which aid the user in the execution of programs eg:
Assemblers, Compilers
•Operating system –Collection of routines responsible for controlling and coordinating all
the activities in a computer system

# Computers has two kinds of components:

Hardware, consisting of its physical devices (CPU, memory, bus, storage devices, .
Software, consisting of the programs it has (Operating system, applications, utilities, .

FUNCTIONAL UNIT
 A computer consists of five functionally independent main parts input, memory,
arithmetic logic unit (ALU), output and control unit.

Functional units of computer

Input device accepts the coded information as source program i.e. high level language. This is
either stored in the memory or immediately used by the processor to perform the desired
operations. The program stored in the memory determines the processing steps. Basically the
computer converts one source program to an object program.
i.e. into machine language.
Finally the results are sent to the outside world through output device. All of these actions are
coordinated by the control unit.

Input unit: -

The source program/high level language program/coded information/simply data is fed to a

computer through input devices keyboard is a most common type. Whenever a key is pressed,
one corresponding word or number is translated into its equivalent binary code over a cable &
fed either to memory or processor.
Joysticks, trackballs, mouse, scanners etc are other input devices.

Memory unit: -
Its function into store programs and data. It is basically to two types
1. Primary memory
2. Secondary memory
Word:
In computer architecture, a word is a unit of data of a defined bit length that can be addressed
and moved between storage and the computer processor. Usually, the defined bit length of a
word is equivalent to the width of the computer's data bus so that a word can be moved in a
single operation from storage to a processor register. For any computer architecture with an
eight-bit byte, the word will be some multiple of eight bits. In IBM's evolutionary
System/360 architecture, a word is 32 bits, or four contiguous eight-bit bytes. In Intel's PC
processor architecture, a word is 16 bits, or two contiguous eight-bit bytes. A word can contain
a computer instruction, a storage address, or application data that is to be manipulated (for
example, added to the data in another word space).

The number of bits in each word is known as word length. Word length refers to the
number of bits processed by the CPU in one go. With modern general purpose computers, word
size can be 16 bits to 64 bits.

The time required to access one word is called the memory access time. The small, fast,
RAM units are called caches. They are tightly coupled with the processor and are often
contained on the same IC chip to achieve high performance.

1. Primary memory: - Is the one exclusively associated with the processor and operates at the
electronics speeds programs must be stored in this memory while they are being executed.
The memory contains a large number of semiconductors storage cells. Each capable of storing
one bit of information. These are processed in a group of fixed site called word.
To provide easy access to a word in memory, a distinct address is associated with each
word location. Addresses are numbers that identify memory location.

Number of bits in each word is called word length of the computer. Programs must
reside in the memory during execution. Instructions and data can be written into the memory
or read out under the control of processor. Memory in which any location can be reached in a
short and fixed amount of time after specifying its address is called random- access memory
(RAM).
 The time required to access one word in called memory access time. Memory which is
only readable by the user and contents of which can’t be altered is called read only memory
(ROM) it contains operating system.

Caches are the small fast RAM units, which are coupled with the processor and are
often contained on the same IC chip to achieve high performance. Although primary storage is
essential it tends to be expensive.
2 Secondary memory: - Is used where large amounts of data & programs have to be stored,
particularly information that is accessed infrequently.
Examples: - Magnetic disks & tapes, optical disks (ie CD-ROM’s), floppies etc.,

Arithmetic logic unit (ALU):-

Most of the computer operators are executed in ALU of the processor like addition,
subtraction, division, multiplication, etc. the operands are brought into the ALU from memory
and stored in high speed storage elements called register. Then according to the instructions
the operation is performed in the required sequence.

The control and the ALU are may times faster than other devices connected to a
computer system. This enables a single processor to control a number of external devices such
as key boards, displays, magnetic and optical disks, sensors and other mechanical controllers.

Output unit:-
These actually are the counterparts of input unit. Its basic function is to send the
processed results to the outside world.

Examples:- Printer, speakers, monitor etc.

Control unit:-
It effectively is the nerve center that sends signals to other units and senses their states.
The actual timing signals that govern the transfer of data between input unit, processor,
memory and output unit are generated by the control unit.

BASIC OPERATIONAL CONCEPTS

To perform a given task an appropriate program consisting of a list of instructions is stored

in the memory. Individual instructions are brought from the memory into the processor, which
executes the specified operations. Data to be stored are also stored in the memory.
Examples: - Add LOCA, R0
This instruction adds the operand at memory location LOCA, to operand in register R 0
& places the sum into register. This instruction requires the performance of several steps,

1. First the instruction is fetched from the memory into the processor.
2. The operand at LOCA is fetched and added to the contents of R0
 3. Finally the resulting sum is stored in the register R0

The preceding add instruction combines a memory access operation with an ALU
Operations. In some other type of computers, these two types of operations are performed by
separate instructions for performance reasons.

Load LOCA, R1
Add R1, R0
Transfers between the memory and the processor are started by sending the address
of the memory location to be accessed to the memory unit and issuing the appropriate control
signals. The data are then transferred to or from the memory.
the processor can be connected. In addition to the ALU & the control circuitry, the processor
contains a number of registers used for several different purposes.

Register:
It is a special, high-speed storage area within the CPU. All data must be represented in a
register before it can be processed. For example, if two numbers are to be multiplied, both
numbers must be in registers, and the result is also placed in a register. (The register can
contain the address of a memory location where data is stored rather than the actual data
itself.)

The number of registers that a CPU has and the size of each (number of bits) help
determine the power and speed of a CPU. For example a 32-bit CPU is one in which each register
is 32 bits wide. Therefore, each CPU instruction can manipulate 32 bits of data. In high-
level languages, the compiler is responsible for translating high-level operations into low-level
operations that access registers.

The instruction register (IR):- Holds the instructions that are currently being executed. Its
output is available for the control circuits which generates the timing signals that control the
various processing elements in one execution of instruction.

The program counter PC:-

This is another specialized register that keeps track of execution of a program. It
contains the memory address of the next instruction to be fetched and executed.

Besides IR and PC, there are n-general purpose registers R0 through Rn-1.

The other two registers which facilitate communication with memory are: -
1. MAR – (Memory Address Register):- It holds the address of the location to be
accessed.
2. MDR – (Memory Data Register):- It contains the data to be written into or read out
of the address location.

Operating steps are

 1. Programs reside in the memory & usually get these through the I/P unit.
2. Execution of the program starts when the PC is set to point at the first instruction of the
program.
3. Contents of PC are transferred to MAR and a Read Control Signal is sent to the
memory.
4. After the time required to access the memory elapses, the address word is read out of the
memory and loaded into the MDR.
5. Now contents of MDR are transferred to the IR & now the instruction is ready to be
decoded and executed.
6. If the instruction involves an operation by the ALU, it is necessary to obtain the
required operands.
7. An operand in the memory is fetched by sending its address to MAR & Initiating a read
cycle.
8. When the operand has been read from the memory to the MDR, it is transferred from MDR
to the ALU.
9. After one or two such repeated cycles, the ALU can perform the desired operation.
10. If the result of this operation is to be stored in the memory, the result is sent to MDR.
11. Address of location where the result is stored is sent to MAR & a write cycle is
initiated.
12. The contents of PC are incremented so that PC points to the next instruction that is to be
executed.

Normal execution of a program may be preempted (temporarily interrupted) if some

devices require urgent servicing, to do this one device raises an Interrupt signal. An interrupt
is a request signal from an I/O device for service by the processor. The processor provides the
requested service by executing an appropriate interrupt service routine.

The Diversion may change the internal stage of the processor its state must be saved
in the memory location before interruption. When the interrupt-routine service is completed
the state of the processor is restored so that the interrupted program may continue

THE VON NEUMANN ARCHITECTURE

The task of entering and altering programs for the ENIAC was extremely tedious. The
programming process can be easy if the program could be represented in a form suitable for
storing in memory alongside the data. Then, a computer could get its instructions by reading
them from memory, and a program could be set or altered by setting the values of a portion of
memory. This idea is known as the stored-program concept. The first publication of the idea
was in a 1945 proposal by von Neumann for a new computer, the EDVAC (Electronic Discrete
Variable Computer).

In 1946, von Neumann and his colleagues began the design of a new stored-program
computer, referred to as the IAS computer, at the Princeton Institute for Advanced Studies. The
 IAS computer, although not completed until 1952, is the prototype of all subsequent general-
purpose computers.

It consists of
 A main memory, which stores both data and instruction
 An arithmetic and logic unit (ALU) capable of operating on binary data
 A control unit, which interprets the instructions in memory and causes them to be
executed
BUS STRUCTURES:

Bus structure and multiple bus structures are types of bus or computing. A bus is basically a
subsystem which transfers data between the components of Computer components either
within a computer or between two computers. It connects peripheral devices at the same time.
  Input and output (I/O) equipment operated by the control unit

- A multiple Bus Structure has multiple inter connected service integration buses and for each
bus the other buses are its foreign buses. A Single bus structure is very simple and consists of
a single server.
- A bus cannot span multiple cells. And each cell can have more than one buses. - Published
messages are printed on it. There is no messaging engine on Single bus structure
I) In single bus structure all units are connected in the same bus than connecting different
buses as multiple bus structure.
II) Multiple bus structure's performance is better than single bus structure. Iii)single bus
structure's cost is cheap than multiple bus structure.

Group of lines that serve as connecting path for several devices is called a bus (one bit per
line).
Individual parts must communicate over a communication line or path for exchanging
data, address and control information as shown in the diagram below. Printer example –
processor to printer. A common approach is to use the concept of buffer registers to hold the
content during the transfer.

Buffer registers hold the data during the data transfer temporarily. Ex: printing

Types of Buses:
1. Data Bus:
Data bus is the most common type of bus. It is used to transfer data between different
components of computer. The number of lines in data bus affects the speed of data transfer
between different components. The data bus consists of 8, 16, 32, or 64 lines. A 64-line data bus
can transfer 64 bits of data at one time.
The data bus lines are bi-directional. It means that:
CPU can read data from memory using these lines CPU can write data to memory locations
using these lines

2. Address Bus:
Many components are connected to one another through buses. Each component is assigned a
unique ID. This ID is called the address of that component. It a component wants to
communicate with another component, it uses address bus to specify the address of that
component. The address bus is a unidirectional bus. It can carry information only in one
direction. It carries address of memory location from microprocessor to the main memory.

3. Control Bus:
Control bus is used to transmit different commands or control signals from one component to
another component. Suppose CPU wants to read data from main memory. It will use control is
also used to transmit control signals like ASKS (Acknowledgement signals). A control signal
contains the following:
1 Timing information: It specifies the time for which a device can use data and address bus.
2 Command Signal: It specifies the type of operation to be performed. Suppose
that CPU gives a command to the main memory to write data. The memory sends
acknowledgement signal to CPU after writing the data successfully. CPU receives the signal and
then moves to perform some other action.

SOFTWARE
If a user wants to enter and run an application program, he/she needs a System Software.
System Software is a collection of programs that are executed as needed to perform functions
such as:

• Receiving and interpreting user commands

• Entering and editing application programs and storing then as files in secondary storage
devices
• Running standard application programs such as word processors, spread sheets, games
etc…
Operating system - is key system software component which helps the user to exploit the
below underlying hardware with the programs.
Types of software
A layer structure showing where Operating System is located on generally used software
systems on desktops

System software
System software helps run the computer hardware and computer system. It includes a
combination of the following:
 device drivers
 operating systems
 servers
 utilities
 windowing systems
 compilers
 debuggers
 interpreters
 linkers

The purpose of systems software is to unburden the applications programmer from the often
complex details of the particular computer being used, including such accessories as
communications devices, printers, device readers, displays and keyboards, and also to partition
the computer's resources such as memory and processor time in a safe and stable manner.
Examples are- Windows XP, Linux and Mac.

Application software
Application software allows end users to accomplish one or more specific (not directly
computer development related) tasks. Typical applications include:

onal software
Application software exists for and has impacted a wide variety of topics.

PERFORMANCE
The most important measure of the performance of a computer is how quickly it can
execute programs. The speed with which a computer executes program is affected by the
design of its hardware. For best performance, it is necessary to design the compiles, the
machine instruction set, and the hardware in a coordinated way.

The total time required to execute the program is elapsed time is a measure of the
performance of the entire computer system. It is affected by the speed of the processor, the
disk and the printer. The time needed to execute a instruction is called the processor time.

Just as the elapsed time for the execution of a program depends on all units in a
computer system, the processor time depends on the hardware involved in the execution of
individual machine instructions. This hardware comprises the processor and the memory
which are usually connected by the bus as shown in the fig c.

The pertinent parts of the fig. c are repeated in fig. d which includes the cache memory
as part of the processor unit.

Let us examine the flow of program instructions and data between the memory and
the processor. At the start of execution, all program instructions and the required data are
stored in the main memory. As the execution proceeds, instructions are fetched one by one
over the bus into the processor, and a copy is placed in the cache later if the same instruction
or data item is needed a second time, it is read directly from the cache.

The processor and relatively small cache memory can be fabricated on a single IC chip.
The internal speed of performing the basic steps of instruction processing on chip is very high
and is considerably faster than the speed at which the instruction and data can be fetched from
the main memory. A program will be executed faster if the movement of instructions and data
between the main memory and the processor is minimized, which is achieved by using the
cache.

For example:- Suppose a number of instructions are executed repeatedly over a short period
of time as happens in a program loop. If these instructions are available in the cache, they can
be fetched quickly during the period of repeated use. The same applies to the data that are
used repeatedly.
Processor clock: -
Processor circuits are controlled by a timing signal called clock. The clock designer the
regular time intervals called clock cycles. To execute a machine instruction the processor
divides the action to be performed into a sequence of basic steps that each step can be
completed in one clock cycle. The length P of one clock cycle is an important parameter that
affects the processor performance.

Processor used in today’s personal computer and work station have a clock rates that
range from a few hundred million to over a billion cycles per second.

Basic performance equation

We now focus our attention on the processor time component of the total elapsed time. Let ‘T’
be the processor time required to execute a program that has been prepared in some high-
level language. The compiler generates a machine language object program that Individual
instructions still require several clock cycles to complete. But for the purpose of computing T,
effective value of S is 1.

A higher degree of concurrency can be achieved if multiple instructions pipelines are

implemented in the processor. This means that multiple functional units are used creating
parallel paths through which different instructions can be executed in parallel with such an
arrangement, it becomes possible to start the execution of several instructions in every clock
cycle. This mode of operation is called superscalar execution. If it can be sustained for a long
time during program execution the effective value of S can be reduced to less than one. But the
parallel execution must preserve logical correctness of programs that is the results produced
must be same as those produced by the serial execution of program instructions. Now days
many processors are designed in this manner.

Clock rate
These are two possibilities for increasing the clock rate ‘R’.
1. Improving the IC technology makes logical circuit faster, which reduces the time of
execution of basic steps. This allows the clock period P, to be reduced and the clock rate
R to be increased.
2. Reducing the amount of processing done in one basic step also makes it possible to
reduce the clock period P. however if the actions that have to be performed by an
instructions remain the same, the number of basic steps needed may increase.

Increase in the value ‘R’ that are entirely caused by improvements in IC technology
affects all aspects of the processor’s operation equally with the exception of the time it takes to
access the main memory. In the presence of cache the percentage of accesses to the main
memory is small. Hence much of the performance gain excepted from the use of faster
technology can be realized.
Instruction set CISC & RISC:-
Simple instructions require a small number of basic steps to execute. Complex
instructions involve a large number of steps. For a processor that has only simple instruction a
large number of instructions may be needed to perform a given programming task. This could
lead to a large value of ‘N’ and a small value of ‘S’ on the other hand if individual instructions
perform more complex operations, a fewer instructions will be needed, leading to a lower
value of N and a larger value of S. It is not obvious if one choice is better than the other.
But complex instructions combined with pipelining (effective value of S ¿ 1) would
achieve one best performance. However, it is much easier to implement efficient pipelining in
processors with simple instruction sets.

RISC and CISC are computing systems developed for computers. Instruction set or
instruction set architecture is the structure of the computer that provides commands to the
computer to guide the computer for processing data manipulation. Instruction set consists of
instructions, addressing modes, native data types, registers, interrupt, exception handling and
memory architecture. Instruction set can be emulated in software by using an interpreter or
built into hardware of the processor. Instruction Set Architecture can be considered as a
boundary between the software and hardware. Classification of microcontrollers and
microprocessors can be done based on the RISC and CISC instruction set architecture.
Comparison between RISC and CISC:

RISC CISC

It stands for ‘Reduced It stands for ‘Complex

Acronym
Instruction Set Computer’. Instruction Set Computer’.

The RISC processors have a The CISC processors have a

Definition smaller set of instructions with larger set of instructions with
few addressing nodes. many addressing nodes.

It has no memory unit and uses It has a memory unit to

Memory unit a separate hardware to implement complex
implement instructions. instructions.

It has a hard-wired unit of It has a micro-programming

Program
programming. unit.

Design It is a complex complier design. It is an easy complier design.

The calculations are faster and The calculations are slow and
Calculations
precise. precise.

Decoding of instructions is Decoding of instructions is

Decoding
simple. complex.

Time Execution time is very less. Execution time is very high.

External It does not require external It requires external memory

memory memory for calculations. for calculations.

Pipelining does function Pipelining does not function

Pipelining
correctly. correctly.

Stalling is mostly reduced in

Stalling The processors often stall.
processors.

Code expansion can be a Code expansion is not a

Code expansion
problem. problem.

Disc space The space is saved. The space is wasted.

 Used in high end applications
Used in low end applications
such as video processing,
Applications such as security systems, home
telecommunications and image
automations, etc.
processing.

1.8 Performance measurements

The performance measure is the time taken by the computer to execute a given bench
mark. Initially some attempts were made to create artificial programs that could be used as
bench mark programs. But synthetic programs do not properly predict the performance
obtained when real application programs are run.

A non-profit organization called SPEC- system performance Evaluation Corporation

selects and publishes bench marks.

The program selected range from game playing, compiler, and data base applications
to numerically intensive programs in astrophysics and quantum chemistry. In each case, the
program is compiled under test, and the running time on a real computer is measured. The
same program is also compiled and run on one computer selected as reference.

The ‘SPEC’ rating is computed as follows.

SPEC rating = Running time on the reference computer/ Running time on the computer under
test
MULTIPROCESSORS AND MULTICOMPUTER

multicomputer multiprocessors
1. A computer made up of several computers. 1. A computer that has more than one CPU on
2. Distributed computing deals with hardwareits motherboard.
and software systems containing more than2. Multiprocessing is the use of two or more
one processing element, multiple programs central processing units (CPUs) within a
3. It can run faster single computer system.
4. A multi-computer is multiple computers, 3. Speed depends on the all processors speed
each of which can have multiple processors. 4. Single Computer with multiple processors
5. Used for true parallel processing. 5. Used for true parallel processing.
6. Processor can not share the memory. 6. Processors can share the memory.
7. Called as message passing multi computers 7. Called as shared memory multi processors
8. Cost is more 8. Cost is low

MICRO‐PROGRAMMED CONTROL: Control memory, address sequencing, micro‐program

example, design of control unit.

COMPUTER ARITHMETIC: Addition and subtraction, multiplication and division algorithms,

floating‐point arithmetic operation, decimal arithmetic unit, decimal arithmetic operations.
Book: M. Moris Mano (2006), Computer System Architecture, 3rd edition, Pearson/PHI,
India: Unit-10 Pages: 333-380

Control Memory:
Control memory is a random access memory(RAM) consisting of addressable storage
registers. It is primarily used in mini and mainframe computers. It is used as a temporary
storage for data. Access to control memory data requires less time than to main memory; this
speeds up CPU operation by reducing the number of memory references for data storage and
retrieval. Access is performed as part of a control section sequence while the master clock
oscillator is running. The control memory addresses are divided into two groups: a task mode
and an executive (interrupt) mode.

Addressing words stored in control memory is via the address select logic for each of
the register groups. There can be up to five register groups in control memory. These groups
select a register for fetching data for programmed CPU operation or for maintenance console
or equivalent display or storage of data via maintenance console or equivalent. During
programmed CPU operations, these registers are accessed directly by the CPU logic. Data
routing circuits are used by control memory to interconnect the registers used in control
memory. Some of the registers contained in a control memory that operate in the task and
the executive modes include the following: Accumulators Indexes Monitor clock status
indicating registers Interrupt data registers

• The control unit in a digital computer initiates sequences of micro operations

• The complexity of the digital system is derived form the number of sequences that are
performed
• When the control signals are generated by hardware, it is hardwired
• In a bus-oriented system, the control signals that specify micro operations are groups of bits
that select the paths in multiplexers, decoders, and ALUs.

• The control unit initiates a series of sequential steps of micro operations

• The control variables can be represented by a string of 1’s and 0’s called a control word
• A micro programmed control unit is a control unit whose binary control variables are stored
in memory
• A sequence of microinstructions constitutes a micro program
• The control memory can be a read-only memory
• Dynamic microprogramming permits a micro program to be loaded and uses a writable
control memory
• A computer with a micro programmed control unit will have two separate memories: a
main memory and a control memory
• The micro program consists of microinstructions that specify various internal control
signals for execution of register micro operations
• These microinstructions generate the micro operations to:
 fetch the instruction from main memory
 evaluate the effective address
 execute the operation
 return control to the fetch phase for the next instruction

• The control memory address register specifies the address of the microinstruction
• The control data register holds the microinstruction read from memory
• The microinstruction contains a control word that specifies one or more micro operations for
the data processor
• The location for the next micro instruction may, or may not be the next in sequence
• Some bits of the present micro instruction control the generation of the address of the next
micro instruction
• The next address may also be a function of external input conditions
• While the micro operations are being executed, the next address is computed in the next
address generator circuit (sequencer) and then transferred into the CAR to read the next micro
instructions

• Typical functions of a sequencer are: o incrementing the CAR by one

 loading into the CAR and address from control memory
 transferring an external address
 loading an initial address to start the control operations

• A clock is applied to the CAR and the control word and next-address information are taken
directly from the control memory
• The address value is the input for the ROM and the control work is the output
• No read signal is required for the ROM as in a RAM
• The main advantage of the micro programmed control is that once the
hardware configuration is established, there should be no need for h/w or wiring changes
• To establish a different control sequence, specify a different set of microinstructions for
control memory

Addressing Sequencing:
Each machine instruction is executed through the application of a sequence of
microinstructions. Clearly, we must be able to sequence these; the collection of
microinstructions which implements a particular machine instruction is called a routine.

The MCU typically determines the address of the first microinstruction which
implements a machine instruction based on that instruction's opcode. Upon machine power-
up, the CAR should contain the address of the first microinstruction to be executed.
The MCU must be able to execute microinstructions sequentially (e.g., within routines), but
must also be able to ``branch'' to other microinstructions as required; hence, the need for a
sequencer.
Four basic computer arithmetic operations are addition, subtraction, division and
multiplication. The arithmetic operation in the digital computer manipulate data to produce
results. It is necessary to design arithmetic procedures and circuits to program arithmetic
operations using algorithm. The algorithm is a solution to any problem and it is stated by a
finite number of well-defined procedural steps. The algorithms can be developed for the
following types of data.
1. Fixed point binary data in signed magnitude representation
2. Fixed point binary data in signed 2’s complement representation.
3. Floating point representation
4. Binary Coded Decimal (BCD) data

Addition and Subtraction with signed magnitude

Consider two numbers having magnitude A and B. When the signed numbers are added or
subtracted, there can be 8 different conditions depending on the sign and the operation
performed as shown in the table below:
Operation Add magnitude When A > B When A < B When A = B
(+A) + (+B) +(A + B) -- -- --
(+A) + (-B) -- +(A - B) -(B - A) +(A - B)
(-A) + (+B) -- -(A - B) +(B - A) +(A - B)
(-A) + (-B) -(A + B) -- -- --
(+A) - (+B) -- +(A - B) -(B - A) +(A - B)
(+A) - (-B) +(A + B) -- -- --
(-A) - (+B) -(A + B) -- -- --
(-A) - (-B) -- -(A - B) +(B - A) +(A - B)
From the table, we can derive an algorithm for addition and subtraction as follows:
Addition (Subtraction) Algorithm:
 When the signs of A & B are identical, add the two magnitudes and attach the sign of A to the

result.
 When the sign of A & B are different, compare the magnitude and subtract the smaller

number from the large number. Choose the sign of the result to be same as A if A > B, or the
complement of the sign of A if A < B. If the two numbers are equal, subtract B from A and
make the sign of the result positive.

Hardware Implementation

fig: Hardware for signed magnitude addition and subtraction

The hardware consists of two registers A and B to store the magnitudes, and two flip-
flops As and Bs to store the corresponding signs. The results can be stored in the register A and
As which acts as an accumulator. The subtraction is performed by adding A to the 2’s
complement of B. The output carry is transferred to the flip-flop E. The overflow may occur
during the add operation which is stored in the flip-flop A Ë… F. When m = 0, the output of E is
transferred to the adder without any change along with the input carry of ‘0".

The output of the parallel adder is equal to A + B which is an add operation. When m =
1, the content of register B is complemented and transferred to parallel adder along with the
input carry of 1. Therefore, the output of parallel is equal to A + B’ + 1 = A – B which is a subtract
operation.
Hardware Algorithm

fig: flowchart for add and subtract operations

As and Bs are compared by an exclusive-OR gate. If output=0, signs are identical, if 1 signs are
different.
 For Add operation, identical signs dictate addition of magnitudes and for operation identical

signs dictate addition of magnitudes and for subtraction, different magnitudes dictate
magnitudes be added. Magnitudes are added with a micro operation EA
 Two magnitudes are subtracted if signs are different for add operation and identical for

subtract operation. Magnitudes are subtracted with a micro operation EA = B and number
(this number is checked again for 0 to make positive 0 [As=0]) in A is correct result. E = 0
indicates A < B, so we take 2’s complement of A.

Multiplication
Hardware Implementation and Algorithm
Generally, the multiplication of two final point binary number in signed magnitude
representation is performed by a process of successive shift and ADD operation. The process
consists of looking at the successive bits of the multiplier (least significant bit first). If the
multiplier is 1, then the multiplicand is copied down otherwise, 0’s are copied. The numbers

copied down in successive lines are shifted one position to the left and finally, all the numbers
are added to get the product.
 But, in digital computers, an adder for the summation (∑) of only two binary numbers are used
and the partial product is accumulated in register. Similarly, instead of shifting the multiplicand
to the left, the partial product is shifted to the right. The hardware for the multiplication of
signed magnitude data is shown in the figure below.

Hardware for multiply operation

Initially, the multiplier is stored q register and the multiplicand in the B register. A register is
used to store the partial product and the sequence counter (SC) is set to a number equal to the
number of bits in the multiplier. The sum of A and B form the partial product and both shifted
to the right using a statement “Shr EAQ” as shown in the hardware algorithm. The flip flops As,
Bs & Qs store the sign of A, B & Q respectively. A binary ‘0” inserted into the flip-flop E during
the shift right.
Booth Algorithm
The algorithm that is used to multiply binary integers in signed 2’s complement form is called
booth multiplication algorithm. It works on the principle that the string 0’s in the multiplier
doesn’t need addition but just the shifting and the sting of 1’s from bit weight 2 k to 2m can be
treated as 2k+1 – 2m (Example, +14 = 001110 = 23=1 – 21 = 14). The product can be obtained by
shifting the binary multiplication to the left and subtraction the multiplier shifted left once.
According to booth algorithm, the rule for multiplication of binary integers in signed 2’s
complement form are:
 The multiplicand is subtracted from the partial product of the first least significant bit is 1

in a string of 1’s in the multiplicand.

 The multiplicand is added to the partial product if the first least significant bit is 0

(provided that there was a previous 1) in a string of 0’s in the multiplier.

 The partial product doesn’t change when the multiplier bit is identical to the previous

multiplier bit.
This algorithm is used for both the positive and negative numbers in signed 2’s complement
form. The hardware implementation of this algorithm is in figure below:
The flowchart for booth multiplication algorithm is given below:

flowchart for booth multiplication algorithm

Numerical Example: Booth algorithm

BR=10111(Multiplicand)
QR=10011(Multiplier)
Array Multiplier
The multiplication algorithm first check the bits of the multiplier one at time and form partial
product. This is a sequential process that requires a sequence of add and shift micro operation.
This method is complicated and time consuming. The multiplication of 2 binary
Division Algorithm
The division of two fixed point signed numbers can be done by a process of successive compare
shift and subtraction. When it is implemented in digital computers, instead of shifting the
divisor to the right, the dividend or the partial remainder is shifted to the left. The subtraction
can be obtained by adding the number A to the 2’s complement of number B. The information
about the relative magnitudes of the information about the relative magnitudes of numbers
can be obtained from the end carry,
Hardware Implementation
The hardware implementation for the division signed numbers is shown id the figure.

Division Algorithm
The divisor is stored in register B and a double length dividend is stored in register A and Q.
the dividend is shifted to the left and the divider is subtracted by adding twice complement of
the value. If E = 1, then A >= B. In this case, a quotient bit 1 is inserted into Qn and the partial
remainder is shifted to the left to repeat the process. If E = 0, then A > B. In this case, the quotient
bit Qn remains zero and the value of B is added to restore the partial remainder in A to the
previous value. The partial remainder is shifted to the left and approaches continues until the
sequence counter reaches to 0. The registers E, A & Q are shifted to the left with 0 inserted into
Qn and the previous value of E is lost as shown in the flow chart for division algorithm.
 flowchart for division algorithm
This algorithm can be explained with the help of an example. Consider that the divisor is
10001 and the dividend is 01110. binary division with digital hardware
Restoring method
Method described above is restoring method in which partial remainder is restored by adding
the divisor to the negative result. Other methods:
Comparison method: A and B are compared prior to subtraction. Then if A >= B, B is subtracted
from A. if A < B nothing is done. The partial remainder is then shifted left and numbers are
compared again. Comparison inspects end carry out of the parallel adder before transferring
to E.
Non-restoring method: In contrast to restoring method, when A -B is negative, B is not added
to restore A but instead, negative difference is shifted left and then B is added. How is it
possible? Let’s argue:
 In flowchart for restoring method, when A < B, we restore A by operation A - B + B. Next time

in a loop,
this number is shifted left (multiplied by 2) and B subtracted again, which gives: 2 (A - B + B)
– B = 2 A - B.
 In Non-restoring method, we leave A - B as it is. Next time around the loop, the number is

shifted left and B is added: 2 (A - B) + B = 2 A - B (same as above

Divide Overflow
The division algorithm may produce a quotient overflow called dividend overflow. The
overflow can occur of the number of bits in the quotient are more than the storage capacity of
the register. The overflow flip-flop DVF is set to 1 if the overflow occurs.
The division overflow can occur if the value of the half most significant bits of the dividend is
equal to or greater than the value of the divisor. Similarly, the overflow can occue=r if the
dividend is divided by a 0. The overflow may cause an error in the result or sometimes it may
stop the operation. When the overflow stops the operation of the system, then it is called divide
stop.
BASIC CONCEPTS OF MEMORY SYSTEM
The maximum size of the Main Memory (MM) that can be used in any computer is
determined by its addressing scheme. For example, a 16-bit computer that generates 16-bit
addresses is capable of addressing upto 216 =64K memory locations. If a machine generates
32-bit addresses, it can access upto 232 = 4G memory locations. This number represents the
size of address space of the computer.

If the smallest addressable unit of information is a memory word, the machine is called
word-addressable. If individual memory bytes are assigned distinct addresses, the computer is
called byte-addressable. Most of the commercial machines are byte addressable. For example
in a byte-addressable 32-bit computer, each memory word contains 4 bytes. A possible word-
address assignment would be:
Word Address Byte Address
0 0123
4 4567
8 8 9 10 11
. ….. . ….. . …..
With the above structure a READ or WRITE may involve an entire memory word or it may
involve only a byte. In the case of byte read, other bytes can also be read but ignored by the
CPU. However, during a write cycle, the control circuitry of the MM must ensure that only the
specified byte is altered. In this case, the higher-order 30 bits can specify the word and the
lower-order 2 bits can specify the byte within the word.
CPU-Main Memory Connection – A block schematic: -
From the system standpoint, the Main Memory (MM) unit can be viewed as a “block box”. Data
transfer between CPU and MM takes place through the use of two CPU registers, usually called
MAR (Memory Address Register) and MDR (Memory Data Register). If MAR is K bits long and
MDR is ‘n’ bits long, then the MM unit may contain upto 2k addressable locations and

each location will be ‘n’ bits wide, while the word length is equal to ‘n’ bits. During a “memory
cycle”, n bits of data may be transferred between the MM and CPU.

This transfer takes place over the processor bus, which has k address lines (address
bus), n data lines (data bus) and control lines like Read, Write, Memory Function completed
(MFC), Bytes specifiers etc (control bus). For a read operation, the CPU loads the address into
MAR, set READ to 1 and sets other control signals if required. The data from the MM is loaded
into MDR and MFC is set to 1. For a write operation, MAR, MDR are suitably loaded by the CPU,
write is set to 1 and other control signals are set suitably. The MM control circuitry loads the
data into appropriate locations and sets MFC to 1. This organization is shown in the following
block schematic.
Address Bus (k bits) Main Memory upto 2k addressable locations Word length = n bits Data
bus (n bits) Control Bus (Read, Write, MFC, Byte Specifier etc) MAR MDR CPU

Some Basic Concepts

Memory Access Times: - It is a useful measure of the speed of the memory unit. It is the time
that elapses between the initiation of an operation and the completion of that operation (for
example, the time between READ and MFC).
Memory Cycle Time :- It is an important measure of the memory system. It is the minimum time
delay required between the initiations of two successive memory operations (for example, the
time between two successive READ operations). The cycle time is usually slightly longer than
the access time.

Random Access Memory (RAM):

A memory unit is called a Random Access Memory if any location can be accessed for a READ
or WRITE operation in some fixed amount of time that is independent of the location’s address.
Main memory units are of this type. This distinguishes them from serial or partly serial access
storage devices such as magnetic tapes and disks which are used as the secondary storage
device.
Cache Memory:-
The CPU of a computer can usually process instructions and data faster than they can be fetched
from compatibly priced main memory unit. Thus the memory cycle time become the bottleneck
in the system. One way to reduce the memory access time is to use cache memory. This is a
small and fast memory that is inserted between the larger, slower main memory and the CPU.
This holds the currently active segments of a program and its data. Because of the locality of
address references, the CPU can, most of the time, find the relevant information in the cache
memory itself (cache hit) and infrequently needs access to the main memory (cache miss) with
suitable size of the cache memory, cache hit rates of over 90% are possible leading to a cost-
effective increase in the performance of the system.

Memory Interleaving: -
This technique divides the memory system into a number of memory modules and arranges
addressing so that successive words in the address space are placed in different modules. When
requests for memory access involve consecutive addresses, the access will be to different
modules. Since parallel access to these modules is possible, the average rate of
fetching words from the Main Memory can be increased.
Virtual Memory: -
In a virtual memory System, the address generated by the CPU is referred to as a virtual or
logical address. The corresponding physical address can be different and the required mapping
is implemented by a special memory control unit, often called the memory management unit.
The mapping function itself may be changed during program execution according to system
requirements.

Because of the distinction made between the logical (virtual) address space and the
physical address space; while the former can be as large as the addressing capability of the CPU,
the actual physical memory can be much smaller. Only the active portion of the virtual address
space is mapped onto the physical memory and the rest of the virtual address space

is mapped onto the bulk storage device used. If the addressed information is in the Main
Memory (MM), it is accessed and execution proceeds.

Otherwise, an exception is generated, in response to which the memory management unit

transfers a contiguous block of words containing the desired word from the bulk storage unit
to the MM, displacing some block that is currently inactive. If the memory is managed in such a
way that, such transfers are required relatively infrequency (ie the CPU will generally find the
required information in the MM), the virtual memory system can provide a reasonably good
performance and succeed in creating an illusion of a large memory with a small, in expensive
MM.
Internal Organization of Semiconductor Memory Chips:-
Memory chips are usually organized in the form of an array of cells, in which each cell is capable
of storing one bit of information. A row of cells constitutes a memory word, and the cells of a
row are connected to a common line referred to as the word line, and this line is driven by the
address decoder on the chip. The cells in each column are connected to a sense/write
circuit by two lines known as bit lines. The sense/write circuits are connected to the data
input/output lines of the chip. During a READ operation, the Sense/Write circuits sense, or
read, the information stored in the cells selected by a word line and transmit this information
to the output lines. During a write operation, they receive input information and store it in the
cells of the selected word.

The 10-bit address is divided into two groups of 5 bits each to form the row and column
addresses for the cell array. A row address selects a row of 32 cells, all of which are accessed in
parallel. One of these, selected by the column address, is connected to the external data lines
by the input and output multiplexers. This structure can store 1024 bits, can be implemented
in a 16-pin chip.

Read Operation:
Let us assume the Q1 on and Q2 off represents a 1 to read the contents of a given cell, the voltage
on the corresponding word line is reduced from 2.5 V to approximately 0.3 V. This causes one
of the diodes D1 or D2 to become forward-biased, depending on whether the transistor Q1 or
Q2 is conducting. As a result, current flows from bit line b when the cell is in the 1 state and
from bit line b when the cell is in the 0 state. The Sense/Write circuit at the end of each pair of
bit lines monitors the current on lines b and b’ and sets the output bit line accordingly.
Write Operation:
While a given row of bits is selected, that is, while the voltage on the corresponding word line
is 0.3V, the cells can be individually forced to either the 1 state by applying a positive voltage
of about 3V to line b’ or to the 0 state by driving line b. This function is performed by the
Sense/Write circuit.
MOS Memory Cell:
MOS technology is used extensively in Main Memory Units. As in the case of bipolar memories,
many MOS cell configurations are possible. The simplest of these is a flip-flop circuit. Two
transistors T1 and T2 are connected to implement a flip-flop. Active pull-up to VCC is provided
through T3 and T4. Transistors T5 and T6 act as switches that can be opened or closed under
control of the word line. For a read operation, when the cell is selected, T5 or T6 is closed and
the corresponding flow of current through b or b’ is sensed by the sense/write circuits to set
the output bit line accordingly. For a write operation, the bit is selected and a positive voltage
is applied on the appropriate bit line, to store a 0 or 1. This configuration is shown below:
Static Memories Vs Dynamic Memories:-
Bipolar as well as MOS memory cells using a flip-flop like structure to store information can
maintain the information as long as current flow to the cell is maintained. Such memories are
called static memories. In contracts, Dynamic memories require not only the maintaining of a
power supply, but also a periodic “refresh” to maintain the information stored in them.
Dynamic memories can have very high bit densities and very lower power consumption
relative to static memories and are thus generally used to realize the main memory unit.

Dynamic Memories:-
The basic idea of dynamic memory is that information is stored in the form of a charge on the
capacitor. An example of a dynamic memory cell is shown below:
When the transistor T is turned on and an appropriate voltage is applied to the bit line,
information is stored in the cell, in the form of a known amount of charge stored on the
capacitor. After the transistor is turned off, the capacitor begins to discharge. This is caused by
the capacitor’s own leakage resistance and the very small amount of current that still flows
through the transistor. Hence the data is read correctly only if is read before the charge on the
capacitor drops below some threshold value. During a Read

operation, the bit line is placed in a high-impedance state, the transistor is turned on and a
sense circuit connected to the bit line is used to determine whether the charge on the capacitor
is above or below the threshold value. During such a Read, the charge on the capacitor is
restored to its original value and thus the cell is refreshed with every read operation.

Introduction About program interrupt:-

When a Process is executed by the CPU and when a user Request for another Process
then this will create disturbance for the Running Process. This is also called as the
Interrupt.

Interrupts can be generated by User, Some Error Conditions and also by

Software’s and the hardware’s. But CPU will handle all the Interrupts very carefully
because when Interrupts are generated then the CPU must handle all the Interrupts
Very carefully means the CPU will also Provide Response to the Various Interrupts those
are generated. So that When an interrupt has Occurred then the CPU will handle by
using the Fetch, decode and Execute Operations.

Interrupts allow the operating system to take notice of an external event, such as
a mouse click. Software interrupts, better known as exceptions, allow the OS to handle
unusual events like divide-by-zero errors coming from code execution.

The sequence of events is usually like this:

Hardware signals an interrupt to the processor
The processor notices the interrupt and suspends the currently running software
The processor jumps to the matching interrupt handler function in the OS
The interrupt handler runs its course and returns from the interrupt
The processor resumes where it left off in the previously running software
The most important interrupt for the operating system is the timer tick interrupt. The
timer tic interrupt allows the OS to periodically regain control from the currently
running user process. The OS can then decide to schedule another process, return back
to the same process, do housekeeping, etc. The timer tick interrupt provides the
foundation for the concept of preemptive multitasking.

TYPES OF INTERRUPTS
Generally there are three types of Interrupts those are Occurred For Example
1) Internal Interrupt
2) External Interrupt.
3) Software Interrupt.

1. Internal Interrupt:
• When the hardware detects that the program is doing something wrong, it will
usually generate an interrupt usually generate an interrupt.
– Arithmetic error - Invalid Instruction
– Addressing error - Hardware malfunction
– Page fault – Debugging
• A Page Fault interrupt is not the result of a program error, but it does require the
operating system to get control.
The Internal Interrupts are those which are occurred due to Some Problem in the
Execution For Example When a user performing any Operation which contains any
Error and which contains any type of Error. So that Internal Interrupts are those which
are occurred by the Some Operations or by Some Instructions and the Operations those
are not Possible but a user is trying for that Operation. And The Software Interrupts are
those which are made some call to the System for Example while we are Processing
Some Instructions and when we wants to Execute one more Application Programs.
2. External Interrupt:
• I/O devices tell the CPU that an I/O request has completed by sending an interrupt
signal to the processor.
• I/O errors may also generate an interrupt.
• Most computers have a timer which interrupts the CPU every so many interrupts
the CPU every so many milliseconds.
The External Interrupt occurs when any Input and Output Device request for any
Operation and the CPU will Execute that instructions first For Example When a Program
is executed and when we move the Mouse on the Screen then the CPU will handle this
External interrupt first and after that he will resume with his Operation.
3. Software interrupts:
These types if interrupts can occur only during the execution of an instruction. They can
be used by a programmer to cause interrupts if need be. The primary purpose of such
interrupts is to switch from user mode to supervisor mode.
A software interrupt occurs when the processor executes an INT instruction.
Written in the program, typically used to invoke a system service. A processor interrupt
is caused by an electrical signal on a processor pin. Typically used by devices to tell a
driver that they require attention. The clock tick interrupt is very common; it wakes up
the processor from a halt state and allows the scheduler to pick other work to perform.
A processor fault like access violation is triggered by the processor itself when it
encounters a condition that prevents it from executing code. Typically when it tries to
read or write from unmapped memory or encounters an invalid instruction.

CISC Characteristics
A computer with large number of instructions is called complex instruction set
computer or CISC. Complex instruction set computer is mostly used in scientific
computing applications requiring lots of floating point arithmetic.
 A large number of instructions - typically from 100 to 250 instructions.
 Some instructions that perform specialized tasks and are used infrequently.
 A large variety of addressing modes - typically 5 to 20 different modes.
 Variable-length instruction formats
  Instructions that manipulate operands in memory.

RISC Characteristics
A computer with few instructions and simple construction is called reduced
instruction set computer or RISC. RISC architecture is simple and efficient. The
major characteristics of RISC architecture are,
 Relatively few instructions
 Relatively few addressing modes
 Memory access limited to load and store instructions
 All operations are done within the registers of the CPU
 Fixed-length and easily-decoded instruction format.
 Single cycle instruction execution
 Hardwired and micro programmed control