SAVITRIBAI PHULE PUNE UNIVERSITY,PUNE
[Link].(CA) Practical Examination (2024 Pattern)
CA-104-P: Lab Course on CA-103-T
Computer Organization and Architecture
Time Duration: 3 Hours Max. Marks: 35
Distribution of Marks
Logic Truth Connections Observations, Oral Total
Diagram Table Result &
Conclusion
10 10 05 05 05 35
INSTRUCTIONS TO THE STUDENTS:
1. Read the Slip carefully and perform the experiment accordingly.
2. Do not Switch ON any Instruments/ Circuit Board without prior permission of the
Examiner.
3. Before taking observations, get the circuit connections checked from the Examiner.
4. Show at least one observation to the Examiner.
5. IC manual will be provided on demand.
6. Use of Non-programmable calculators is allowed.
Logic Gates-I
1. Draw the Symbol and Truth table for given Logic Gates.
a) NAND b) NOR c) AND
2. Write the Output expression for these Logic gates.
3. Show to the Examiner.
4. Connect the Logic circuit and Show it to the Examiner.
5. Note the observations for different input conditions.
6. Verify the observations with the expected values.
7. Write down the result and conclusion.
8. Define Logic gate.
1
SAVITRIBAI PHULE PUNE UNIVERSITY,PUNE
[Link].(CA) Practical Examination (2024 Pattern)
CA-104-P: Lab Course on CA-103-T
Computer Organization and Architecture
Time Duration: 3 Hours Max. Marks: 35
Distribution of Marks
Logic Truth Connections Observations, Oral Total
Diagram Table Result &
Conclusion
10 10 05 05 05 35
INSTRUCTIONS TO THE STUDENTS:
1. Read the Slip carefully and perform the experiment accordingly.
2. Do not Switch ON any Instruments/ Circuit Board without prior permission of the
Examiner.
3. Before taking observations, get the circuit connections checked from the Examiner.
4. Show at least one observation to the Examiner.
5. IC manual will be provided on demand.
6. Use of Non-programmable calculators is allowed.
Logic Gates-II
1. Draw the Symbol and Truth table for given Logic Gates.
a) AND b) OR c) NOT
2. Write the Output expression for these Logic gates.
3. Show to the Examiner.
4. Connect the Logic circuit and Show it to the Examiner.
5. Note the observations for different input conditions.
6. Verify the observations with the expected values.
7. Write down the result and conclusion.
8. Which are universal gates?
2
SAVITRIBAI PHULE PUNE UNIVERSITY,PUNE
[Link].(CA) Practical Examination (2024 Pattern)
CA-104-P: Lab Course on CA-103-T
Computer Organization and Architecture
Time Duration: 3 Hours Max. Marks: 35
Distribution of Marks
Logic Truth Connections Observations, Oral Total
Diagram Table Result &
Conclusion
10 10 05 05 05 35
INSTRUCTIONS TO THE STUDENTS:
1. Read the Slip carefully and perform the experiment accordingly.
2. Do not Switch ON any Instruments/ Circuit Board without prior permission of the
Examiner.
3. Before taking observations, get the circuit connections checked from the Examiner.
4. Show at least one observation to the Examiner.
5. IC manual will be provided on demand.
6. Use of Non-programmable calculators is allowed.
Study of 1 De-Morgan’s theorems
st
1. State De-Morgan’s Theorems.
2. Write the Boolean Equation and Truth table for De-Morgan’s Theorems.
3. Draw the Logic diagram using Logic gates as per the Boolean equations. Show
to the Examiner.
4. Note down the observations to verify the conversion.
5. Write down the result and conclusion.
6. State any 4 basic Booleans laws.
3
SAVITRIBAI PHULE PUNE UNIVERSITY,PUNE
[Link].(CA) Practical Examination (2024 Pattern)
CA-104-P: Lab Course on CA-103-T
Computer Organization and Architecture
Time Duration: 3 Hours Max. Marks: 35
Distribution of Marks
Logic Truth Connections Observations, Oral Total
Diagram Table Result &
Conclusion
10 10 05 05 05 35
INSTRUCTIONS TO THE STUDENTS:
1. Read the Slip carefully and perform the experiment accordingly.
2. Do not Switch ON any Instruments/ Circuit Board without prior permission of the
Examiner.
3. Before taking observations, get the circuit connections checked from the Examiner.
4. Show at least one observation to the Examiner.
5. IC manual will be provided on demand.
6. Use of Non-programmable calculators is allowed.
Study of 2 De-Morgan’s theorems
nd
1. State De-Morgan’s Theorems.
2. Write the Boolean Equation and Truth table for De-Morgan’s Theorems.
3. Draw the Logic diagram using Logic gates as per the Boolean equations. Show
to the Examiner
4. Note down the observations to verify the conversion.
5. Write down the result and conclusion.
6. State any 4 basic Booleans laws.
4
SAVITRIBAI PHULE PUNE UNIVERSITY,PUNE
[Link].(CA) Practical Examination (2024 Pattern)
CA-104-P: Lab Course on CA-103-T
Computer Organization and Architecture
Time Duration: 3 Hours Max. Marks: 35
Distribution of Marks
Logic Truth Connections Observations, Oral Total
Diagram Table Result &
Conclusion
10 10 05 05 05 35
INSTRUCTIONS TO THE STUDENTS:
1. Read the Slip carefully and perform the experiment accordingly.
2. Do not Switch ON any Instruments/ Circuit Board without prior permission of the
Examiner.
3. Before taking observations, get the circuit connections checked from the Examiner.
4. Show at least one observation to the Examiner.
5. IC manual will be provided on demand.
6. Use of Non-programmable calculators is allowed.
Study of Half Adder
1. Draw the Logic diagram for Half Adder along with the Truth table and
Boolean Equations.
2. Check this from the Examiner.
3. Make the connections. Show it to the Examiner.
4. Note the observations by changing the input conditions
5. Write the result and conclusion.
6. What is meant by adder? Mention its types.
5
SAVITRIBAI PHULE PUNE UNIVERSITY,PUNE
[Link].(CA) Practical Examination (2024 Pattern)
CA-104-P: Lab Course on CA-103-T
Computer Organization and Architecture
Time Duration: 3 Hours Max. Marks: 35
Distribution of Marks
Logic Truth Connections Observations, Oral Total
Diagram Table Result &
Conclusion
10 10 05 05 05 35
INSTRUCTIONS TO THE STUDENTS:
1. Read the Slip carefully and perform the experiment accordingly.
2. Do not Switch ON any Instruments/ Circuit Board without prior permission of the
Examiner.
3. Before taking observations, get the circuit connections checked from the Examiner.
4. Show at least one observation to the Examiner.
5. IC manual will be provided on demand.
6. Use of Non-programmable calculators is allowed.
Study of Full Adder
1. Draw the Logic diagram for Full Adder along with the Truth table
and Boolean Equations.
2. Check this from the Examiner.
3. Make the connections. Show it to the Examiner.
4. Note the observations by changing the input conditions
5. Write the result and conclusion.
6. What is mean by adder? Mention its types.
6
SAVITRIBAI PHULE PUNE UNIVERSITY,PUNE
[Link].(CA) Practical Examination (2024 Pattern)
CA-104-P: Lab Course on CA-103-T
Computer Organization and Architecture
Time Duration: 3 Hours Max. Marks: 35
Distribution of Marks
Logic Truth Connections Observations, Oral Total
Diagram Table Result &
Conclusion
10 10 05 05 05 35
INSTRUCTIONS TO THE STUDENTS:
1. Read the Slip carefully and perform the experiment accordingly.
2. Do not Switch ON any Instruments/ Circuit Board without prior permission of the
Examiner.
3. Before taking observations, get the circuit connections checked from the Examiner.
4. Show at least one observation to the Examiner.
5. IC manual will be provided on demand.
6. Use of Non-programmable calculators is allowed.
Study of Decimal to BCD Encoder
1. Write down the truth table for Decimal to BCD converter.
2. Obtain simplified Boolean equations for each decimal input.
3. Draw the logic diagram using these Boolean equations.
4. Get it checked from the examiner.
5. Connect the circuit and show it to the examiner.
6. Note down the observations.
7. Write the result and conclusion.
8. What is full form of BCD?
7
SAVITRIBAI PHULE PUNE UNIVERSITY,PUNE
[Link].(CA) Practical Examination (2024 Pattern)
CA-104-P: Lab Course on CA-103-T
Computer Organization and Architecture
Time Duration: 3 Hours Max. Marks: 35
Distribution of Marks
Logic Truth Connections Observations, Oral Total
Diagram Table Result &
Conclusion
10 10 05 05 05 35
INSTRUCTIONS TO THE STUDENTS:
1. Read the Slip carefully and perform the experiment accordingly.
2. Do not Switch ON any Instruments/ Circuit Board without prior permission of the
Examiner.
3. Before taking observations, get the circuit connections checked from the Examiner.
4. Show at least one observation to the Examiner.
5. IC manual will be provided on demand.
6. Use of Non-programmable calculators is allowed.
Study of Multiplexer (2:1)
1. Draw the logic diagram of 2:1 Multiplexer.
2. Write the truth table of 2:1 Multiplexer.
3. Get it checked from the examiner.
4. Connect the circuit and show it to the examiner.
5. Verify the truth tables of 2:1 Multiplexer with the help of experimental kit. Show it to
the examiner.
6. Note down the observations.
7. Write the result and conclusion.
8. What is mean by MUX. Mention any 2 types.
8
SAVITRIBAI PHULE PUNE UNIVERSITY,PUNE
[Link].(CA) Practical Examination (2024 Pattern)
CA-104-P: Lab Course on CA-103-T
Computer Organization and Architecture
Time Duration: 3 Hours Max. Marks: 35
Distribution of Marks
Logic Truth Connections Observations, Oral Total
Diagram Table Result &
Conclusion
10 10 05 05 05 35
INSTRUCTIONS TO THE STUDENTS:
1. Read the Slip carefully and perform the experiment accordingly.
2. Do not Switch ON any Instruments/ Circuit Board without prior permission of the
Examiner.
3. Before taking observations, get the circuit connections checked from the Examiner.
4. Show at least one observation to the Examiner.
5. IC manual will be provided on demand.
6. Use of Non-programmable calculators is allowed.
Study of De-Multiplexer (1:2)
1. Draw the logic diagram of 1:2 De-Multiplexer.
2. Write the truth table of 1:2 De-Multiplexer.
3. Get it checked from the examiner.
4. Connect the circuit and show it to the examiner.
5. Verify the truth tables of 1:2 De-multiplexers, with the help of experimental kit.
Show it to the examiner.
6. Note down the observations.
7. Write the result and conclusion.
8. What is mean by De-MUX. Mention any 2 types.
9
SAVITRIBAI PHULE PUNE UNIVERSITY,PUNE
[Link].(CA) Practical Examination (2024 Pattern)
CA-104-P: Lab Course on CA-103-T
Computer Organization and Architecture
Time Duration: 3 Hours Max. Marks: 35
Distribution of Marks
Logic Truth Connections Observations, Oral Total
Diagram Table Result &
Conclusion
10 10 05 05 05 35
INSTRUCTIONS TO THE STUDENTS:
1. Read the Slip carefully and perform the experiment accordingly.
2. Do not Switch ON any Instruments/ Circuit Board without prior permission of the
Examiner.
3. Before taking observations, get the circuit connections checked from the Examiner.
4. Show at least one observation to the Examiner.
5. IC manual will be provided on demand.
6. Use of Non-programmable calculators is allowed.
Study of SR Flip-flops
1. Draw the logic diagram of SR Flip Flop .
2. Write the truth table of SR Flip Flop .
3. Get it checked from the examiner.
4. Connect the circuit and show it to the examiner.
5. Verify the truth table.
6. Note down the observations.
7. Write the result and conclusion.
8. List different types of Flip Flops.
10
SAVITRIBAI PHULE PUNE UNIVERSITY,PUNE
[Link].(CA) Practical Examination (2024 Pattern)
CA-104-P: Lab Course on CA-103-T
Computer Organization and Architecture
Time Duration: 3 Hours Max. Marks: 35
Distribution of Marks
Logic Truth Connections Observations, Oral Total
Diagram Table Result &
Conclusion
10 10 05 05 05 35
INSTRUCTIONS TO THE STUDENTS:
1. Read the Slip carefully and perform the experiment accordingly.
2. Do not Switch ON any Instruments/ Circuit Board without prior permission of the
Examiner.
3. Before taking observations, get the circuit connections checked from the Examiner.
4. Show at least one observation to the Examiner.
5. IC manual will be provided on demand.
6. Use of Non-programmable calculators is allowed.
Study of JK Flip-flop
1. Draw the logic diagram of JK Flip Flop .
2. Write the truth table of JK Flip Flop .
3. Get it checked from the examiner.
4. Connect the circuit and show it to the examiner.
5. Verify the truth table.
6. Note down the observations.
7. Write the result and conclusion.
8. List different types of Flip Flops.
11
SAVITRIBAI PHULE PUNE UNIVERSITY,PUNE
[Link].(CA) Practical Examination (2024 Pattern)
CA-104-P: Lab Course on CA-103-T
Computer Organization and Architecture
Time Duration: 3 Hours Max. Marks: 35
Distribution of Marks
Logic Truth Connections Observations, Oral Total
Diagram Table Result &
Conclusion
10 10 05 05 05 35
INSTRUCTIONS TO THE STUDENTS:
1. Read the Slip carefully and perform the experiment accordingly.
2. Do not Switch ON any Instruments/ Circuit Board without prior permission of the Examiner.
3. Before taking observations, get the circuit connections checked from the Examiner.
4. Show at least one observation to the Examiner.
5. IC manual will be provided on demand.
6. Use of Non-programmable calculators is allowed.
Code Converters- Gray to Binary
1. Write down the truth table for Gray to Binary converter.
2. Obtain simplified Boolean equations for each output
3. Draw the logic diagram.
4. Get it checked from the examiner.
5. Connect the circuit and show it to the examiner.
6. Note down the observations.
7. Write the result and conclusion.
8. Theoretically covert ( 1111 )gray = ( ) Binary
17
SAVITRIBAI PHULE PUNE UNIVERSITY,PUNE
[Link].(CA) Practical Examination (2024 Pattern)
CA-104-P: Lab Course on CA-103-T
Computer Organization and Architecture
Time Duration: 3 Hours Max. Marks: 35
Distribution of Marks
Logic Truth Connections Observations, Oral Total
Diagram Table Result &
Conclusion
10 10 05 05 05 35
INSTRUCTIONS TO THE STUDENTS:
1. Read the Slip carefully and perform the experiment accordingly.
2. Do not Switch ON any Instruments/ Circuit Board without prior permission of the Examiner.
3. Before taking observations, get the circuit connections checked from the Examiner.
4. Show at least one observation to the Examiner.
5. IC manual will be provided on demand.
6. Use of Non-programmable calculators is allowed.
Code Converters- Binary to Gray
1. Write down the truth table for Binary to Gray converter.
2. Obtain simplified Boolean equations for each output
3. Draw the logic diagram.
4. Get it checked from the examiner.
5. Connect the circuit and show it to the examiner.
6. Note down the observations.
7. Write the result and conclusion.
8. Theoretically covert ( 1111 )binary = ( ) gray
18