DIGITAL COMPUTER FUNDAMENTALS
MODULE – III
Important Questions
1) Explain Encoder Circuit
o An encoder is a combinational logic circuit that converts binary information in
the form of ‘2n’ input lines into ‘n’ output lines.
o It performs the reverse operation of Decoder.
o Only one input line is active at a time. It produces an N-bit output code
depending on the activated input
o The encoder is a 2n : n circuit where n=1,2,3 etc
4 : 2 Encoder
• The 4 to 2 Encoder consists of four inputs Y3, Y2, Y1 & Y0 and two outputs A1 &
A0.
• At any time, only one of these 4 inputs can be ‘1’ in order to get the respective
binary code at the output.
INPUTS OUTPUTS
Y3 Y2 Y1 Y0 A1 A0
0 0 0 1 0 0
0 0 1 0 0 1
0 1 0 0 1 0
1 0 0 0 1 1
Logical expression for A1
and A0 :
A1 = Y3 + Y2
A0 = Y3 + Y1
2) Explain Decode Circuit
• Block diagram of 2 to 4 decoder is shown in fig.
• A and B are the inputs. ( No. of inputs =2)
• No. of possible input combinations: 22 = 4
• No. of Outputs : 22 = 4, they are indicated by D0, D1, D2 and D3
• From the Truth Table it is clear that each output is “1” for only specific
combination of inputs.
3) Explain Half Adder
A combinational circuit that performs the addition of two bits is called a half adder.
The truth table for the half adder is listed below:
it has two inputs X and Y
it has two out puts Sum and Carry out
4) Explain full adder
It performs the addition of three bits at a time
The three inputs are A,B and Cin and two outputs SUM and Cout.
We can construct a full adder using two half adders
The first half adder will add two inputs A and B. And the second half adder circuit will
add the C-in and the partial sum output of first half adder.
The final C-out will get by OR-ing the C-outs from both Half adders.
Full-adder can be implemented with two half adders and one OR gate (Carry Look-
Ahead adder).
The C-out and SUM together will give the binary equivalent of Cin+B+A
S = C ⊕ (A ⊕ B)
= A’B’C+ A’BC’ +AB’C’ + ABC
Carry = C(AB’ + A’B) + AB = AB’C + A’BC + AB
5) Explain Multiplexer
• Definition : A multiplexers (MUX) is a device that allows digital information from
several sources to be routed onto a single line for transmission over that line to a
common destination.
• Simply a multiplexer is a many input single output combinational circuit.
• Several data input lines
• Some select line (less than the no. of input lines)
• Single output line
• If there are n data input lines and m select lines,
then 2m = n
2 to 1 Multiplexers
• A 2 to 1 Mux has two inputs D0 , D1
• One control signal S and one output Z .
• If value of S is zero D0 is selected and if value of S0 is one D1 is selected.
When S= 0, AND gate1 is enabled and AND gate2 is disabled. So Z = D0
When S = 1, AND gate1 is disabled and AND gate2 is enabled. So Z = D1
6) Explain Binary Parallel Adder
A full adder is capable of adding two 1-bit binary numbers and a carry-in.
When two n-bit numbers are to be added, the number of full adders required will
be equal to the number of bits (n) in each number.
The addition of LSBs can be done by using either a half-adder or a full-adder with
Cin is grounded.
The carry out of each full adder is connected to the carry-in of the next higher
order adder.
A parallel adder is used to add two numbers in parallel form and to produce the
sum bits as parallel outputs.
Eg: if A3A2A1A0 =1101 and B3B2B1B0 = 0101
7) Explain 4-bit binary Adder-Subtractor
When the mode input (M) is at a low logic, i.e. '0', the circuit act as an adder and
when the mode input is at a high logic, i.e. '1', the circuit act as a subtractor.
The exclusive-OR gate connected in series receives input M and one of the inputs
B.
When M is at a low logic, we have B⊕ 0 = B.
The full-adders receive the value of B, the input carry is 0, and the circuit
performs A plus B.
When M is at a high logic, we have B⊕ 1 = B' and C0 = 1.
The B inputs are complemented, and a 1 is added through the input carry. The
circuit performs the operation A plus the 2's complement of B
8) Explain Binary multiplier
Multiplication of binary numbers is performed in the same way as multiplication
of decimal numbers.
The multiplicand is multiplied by each bit of the multiplier, starting from the least
significant bit.
The multiplicand bits are B1 and B0, the multiplier bits are A1 and A0, and the
product is C3C2C1C0.
The first partial product is formed by multiplying B1B0 by A0.
The multiplication of two bits such as A0 and B0 produces 1 if both bits are 1;
otherwise, it produces 0
The partial product can be implemented with AND gates
9) Explain Gray Code to Binary Converter
The MSB of the binary number will be equal to the MSB of the given gray code.
Now if the second gray bit is 0, then the second binary bit will be the same as the
previous or the first bit. If the gray bit is 1 the second binary bit will alter. If it was 1 it
will be 0 and if it was 0 it will be 1.
This step is continued for all the bits to do Gray code to binary conversion.
Input (gray) Output (Binary)
G4 G3 G2 G1 B4 B3 B2 B1
0 0 0 0 0 0 0 0
0 0 0 1 0 0 0 1
0 0 1 0 0 0 1 1
0 0 1 1 0 0 1 0
0 1 0 0 0 1 1 1
0 1 0 1 0 1 1 0
0 1 1 0 0 1 0 0
0 1 1 1 0 1 0 1
1 0 0 0 1 1 1 1
1 0 0 1 1 1 1 0
1 0 1 0 1 1 0 0
Logic Diagram
10)