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0% found this document useful (0 votes)
9 views8 pages

Assignment

Uploaded by

mahesh060307
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

Digital Logic

CACS105 – Assignment

Unit1n2: Introduction and Number System

Attempt all the questions given below and submit your answer file via google classroom.

Note: Insert your name and college roll number (CRN) as mention below

STUDENT NAME:​ _________________________________________________

STUDENT CRN:​ __________________________________________________

1)​ Define analog and digital system. List any five advantages of digital system over its
analog counterpart.
2)​ Write any five different between analog and digital system.
3)​ Write short notes on Digital Computer and Integrated Circuits(IC).
4)​ What is clock waveform? Why it is essential in digital electronics?
5)​ Define number system and radix. Explain the different types of number system.
6)​ Convert the following
i)​ (225.225)10 to (----)2,(----)8,(----)16
ii)​ (1001001.011)2 to (----)10,(----)8,(----)16
iii)​ (623.77)8 to (----)2,(----)10,(----)16
iv)​ (2AC5.D)16 to (----)2,(----)10, (----)8
v)​ (250.5)10 to base-3, 4 and 7.
7)​ Obtain 1ꞌs and 2ꞌs complement of:
1010101, 0111000, 0000001, 10101110
8)​ Obtain 9ꞌs and 10ꞌs complement of:
13579, 09900, 90090, 10000
9)​ Subtract the following decimal numbers using 9’s and 10’s complement:
i)​ 5250-321
ii)​ 3570-2100
iii)​ 753-864
iv)​ 20-100​​
10)​Subtract the following binary numbers using 1’s and 2’s complement:
i)​ 11010-1101​ ​
ii)​ 11010-10000
Digital Logic
CACS105 – Assignment

iii)​ 10010-10011
iv)​ 100-110000
11)​Write (-53) in: i) Signed magnitude representation, ii) 1ꞌs complement representation and
iii) 2ꞌs complement representation.
12)​Find the value of negative number 1101011 if it is in signed magnitude, 1ꞌs complement
and 2ꞌs complement forms.
13)​Perform the following operation using signed 2’s complement representation:
i)​ -70-80
ii)​ 42-13
iii)​-46+26
14)​Add the following numbers in BCD:
i)​ 99+19
ii)​ 10011000+10010111
iii)​1000+0001
iv)​ 01100100+00110011
15)​Determine which of the following even parity codes are in error:
i)​ 100110010
ii)​ 011101010
16)​Determine which of the following odd parity codes are in error:
i)​ 001101011
ii)​ 0101101000101
17)​Attach the proper even/odd parity bit to each of the following bytes(8-bit) data:
a)​ 10100100
b)​ 00001001
c)​ 11111110

18)​What is weighted and non-weighted code? Explain the BCD code in detail.
19)​Perform the following:
a)​ (92)10 = (?)BCD
b)​ (153)10 = (?)BCD
c)​ (101101)2 = (?)BCD
d)​ (1101011)2 = (?)BCD
Digital Logic
CACS105 – Assignment

e)​ (3F)16 = (?)BCD


f)​ (124)8 = (?)BCD
20)​In financial systems, precision is critical to avoid errors, especially when handling
monetary values. Consider adding Rs. 0.10 and Rs. 0.20 using two methods:
floating-point and BCD. In the first method, represent the values in binary floating-point,
perform the addition, and convert the result back to decimal. Observe why the result is
not exact. In the second method, represent the same values in BCD format, perform the
addition, and convert the result back to decimal to see why the result is exact. Compare
the two methods and explain why BCD is more suitable for financial calculations in
NPR. Additionally, calculate the yearly loss for a bank processing 1 million transactions
daily, assuming a rounding error of Rs. 0.0000003 per transaction in floating-point
calculations.
Hints:
0.10=0.0001100110011001101…..
0.20=0.00110011001100110011…
0.10=0000 1000 (for 10 in cents)
0.20=0010 0000 (for 20 in cents)
21)​Perform the following addition in BCD:
a)​ (75)10​+(48)10​
b)​ (123)10​+(77)10​
c)​ (11100101)2​+(1011101)2​
d)​ (100011110)2​+(1101101011)2​
e)​ (256)10​+(342)10​
22)​Write short notes about Alphanumeric Code and ASCII Code.
23)​Why is excess-3 code called call as self-complementary code? Explain in detail.
24)​Perform the following:
a)​ (1100101)BCD​=(?)Excess−3​
b)​ (1111101)BCD=(?)Excess−3
c)​ (11010011)Excess−3=(?)BCD
d)​ (1010011)Excess−3​=(?)BCD​
e)​ (101011010)BCD​=(?)Excess−3​
Digital Logic
CACS105 – Assignment

f)​ (101100111)BCD=(?)Excess-3
g)​ (10010011)Excess-3 = (?)BCD
25)​Why is gray code is called as unit distance code?
26)​Perform the following:
a)​ (1011)Gray​=(?)2​
b)​ (1001)Gray=(?)2
c)​ (110110)Gray=(?)2
d)​ (1111)2=(?)Gray
e)​ (0110)2=(?)Gray
f)​ (110101)2=(?)Gray
27)​Identify the value of b (123)b = (83)10

Unit3: Combinational Logic Design

1)​ State and verify De Morgan’s Theorem for three variables.


2)​ Why NAND and NOR are called universal gates? Explain the universal property
(universality) of NAND and NOR gate.
3)​ Make the circuit diagram as well as the truth table of the following boolean expressions.
a)​ A′B+C′
b)​ D(A′+B)+B′D
c)​ ABC′D′+A′BC′D′+BC′D
d)​ (BC′+A′D)(AB′+CD′)
e)​ xyz+x′y+xyz′
Digital Logic
CACS105 – Assignment

f)​ x+yz+x′(y′+z′)
4)​ Realize Ex-OR gate using only NAND gates.
5)​ Construct NOR gate using AND & NOT gate.
6)​ Construct NAND gate using NOR gate and NOR gate using NAND gate.
7)​ What are the basic logic gates, and what are their respective symbols, truth tables, and
timing diagrams?
8)​ How does the AND gate differ from the OR gate in terms of output?
9)​ Design a circuit using basic logic gates to represent the function F=A+BC.
10)​How can you implement an XOR gate using only NAND gates?
11)​How many rows will a truth table have for a Boolean function with 4 variables? Explain
why.
12)​What are the basic postulates of Boolean algebra? Explain their significance in forming
the foundation of Boolean algebra.
13)​Prove the Absorption Law (A+A⋅B=A) using the basic postulates of Boolean algebra.
14)​What is a canonical form in Boolean algebra?
15)​What is a literal in Boolean algebra, and how is it represented in an expression?
16)​What is the difference between a term and a literal in a Boolean expression?
17)​Can a term in Boolean algebra consist of more than two literals? Provide an example.
18)​What is a minterm in Boolean algebra, and how is it represented?
19)​What is a maxterm in Boolean algebra, and how is it represented?
20)​What is the number of minterms for a Boolean function with three variables? List all the
minterms for the Boolean function with three variables A,B,C.
21)​How many maxterms are there in a Boolean function with four variables? List all the
maxterms for the function A,B,C,D.
22)​Express the Boolean function F(A,B,C)=A⋅B+C′ as a sum of minterms and a product of
maxterms.
23)​What is the significance of using minterms and maxterms in the simplification of
Boolean expressions?
24)​How do you identify the minterms/maxterms from a given truth table?
25)​Convert the following POS to SOP:
a)​ F=(A+B)(C+D)
Digital Logic
CACS105 – Assignment

b)​ F=(A′+B′)(C′+D)(A+C)
c)​ F=(A+B)(C+D)(A′+C′)
d)​ F=(A+B+C)(A′+B′)
26)​Convert the following SOP to POS:
a)​ F=AB+A′C
b)​ F=A′B′C+AB+CD
c)​ F=AB+BC′
d)​ F=A′B+AB+A′C.
e)​ F=AB+A′C′
27)​Design a digital system whose output is defined as logically low if the 4-bit input binary
number is a multiple of 3; otherwise, the output will be logically high. The output is
defined if and only if the input binary number is greater than 2.
28)​Design a code conversion circuit to convert Binary code into Gray code.
29)​Hints: If you used BCD or 8421 Binary code, don’t care conditions from m10-m15
30)​Design an combination circuit that converts BCD to Excess-3 code.
31)​Design a combinational circuit that has four inputs and two outputs. One of the outputs is
high when majority of inputs are high. The second output is high only when all inputs are
of same type.

Hints: majority condition means that more than half of the inputs are 1 (logically high).
minority condition means that fewer than half of the inputs are 1 (logically high).

32)​Design a circuit for 3-bit parity generation and 4-bit parity checker using odd parity.
33)​Design a circuit for 3-bit parity generation and 4-bit parity checker using even parity.
34)​Design a combinational circuit that accepts a 4-bit/3-bit number as input and generates
the output binary number equal to the 2’s complement of input number.
35)​Design a combinational circuit that converts a decimal digit from 2421 code to BCD.
Hints: Used don’t care conditions of 2421 code
36)​Design a full subtractor circuit. Also construct it using two half subtractors.
37)​Draw the truth-table of a full adder. Show that a full adder can be implemented using two
half adders and an OR gate.
Digital Logic
CACS105 – Assignment

38)​Design a combinational circuit with 4-input lines that represents a decimal digits in BCD
and 4-output lines that generates the 9’s/10’s complement of the input digits.
39)​Design a combinational circuit that converts a decimal digit from 8 4 -2 -1 to the BCD.
Hints: Used don’t care conditions of 8 4 -2 -1 code
40)​Design a combinational circuit that converts 4-bit reflected code number to 4-bit binary
Number. Implement the circuit with X-OR gates.
41)​Design a combinational logic circuit which converts BCD to seven segment decoder. Use
the proper don’t care conditions. Hints: Used don’t care conditions of 8421 code (BCD
Code)
42)​Draw X-OR gate with minimum number of NAND gates. Also show that dual of X-OR is
its complement.
43)​Design a combinational circuit that converts a decimal digit from 2421 code to 84-2-1
code.
44)​Design a single combinational logic circuit that performs the addition of two input bits (a
and b) when third input bit c is set to 0 whereas; the same circuit performs the subtraction
of same input bits when c is set to 1.
45)​Show how a full adder can be converted to a full substractor with the addition of one
inverter circuit.
46)​Design a combinational circuit which takes three input numbers and produces an output
equal to square of the input. Hints: the maximum number that can be at the o/p is (7)2
=49=110001 i.e. the o/p will be of six bit maximum.
47)​


Digital Logic
CACS105 – Assignment

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