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DCS Tutorial2

This document is a tutorial sheet for the EC1004E course on Digital Circuits and Systems at the National Institute of Technology, Calicut. It includes exercises on Boolean algebra, logic gates, simplification of functions using Karnaugh maps, and realization of logic functions with NAND and NOR gates. The tutorial covers various tasks such as minimizing expressions, implementing circuit diagrams, and converting functions into canonical forms.

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5 views1 page

DCS Tutorial2

This document is a tutorial sheet for the EC1004E course on Digital Circuits and Systems at the National Institute of Technology, Calicut. It includes exercises on Boolean algebra, logic gates, simplification of functions using Karnaugh maps, and realization of logic functions with NAND and NOR gates. The tutorial covers various tasks such as minimizing expressions, implementing circuit diagrams, and converting functions into canonical forms.

Uploaded by

rock tej
Copyright
© All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd

NATIONAL INSTITUTE OF TECHNOLOGY, CALICUT

DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING

EC1004E - Digital Circuits and Systems


Tutorial Sheet – 2

Topics included : Boolean algebra, Boolean functions – truth table, logic gates, canonical form,
simplification of functions using Karnaugh map, Don’t care conditions, NAND and NOR
realization of logic functions

1. Use Boolean algebra to minimise the following expressions.


(i) W = (X + Y ).(X + Z)
(ii) F = (A + B + C’).(A + B + D).(A + B + E).(A + D’ + E).(A’ + C)
(iii) F = (A’B+C+D)(A’B+D)
(iv) (A+BC) + (DE+F)(A+BC)’
2. Show using a circuit diagram how W can be implemented in 2-level sum of products
form using AND gates followed by OR gates. Remember to include any NOT gates
required since only uncomplemented input variables are available:
W = B.C + A.B.C + A.C.D
3. State the minimum number of NAND gates required to implement

4. Find the number of a) 2-input NAND gates b) 2-input NOR gates required to realise the
following function. It is given that only normal inputs are available.
F(W,X,Y,Z) = W’YZ + W’XZ + X’YZ + WXY’Z
5) Convert F(A,B,C)= B+AC’+ABC into canonical SOP form[sum of min terms].
6) Convert F(A,B,C)=A.B+A’.C into canonical POS form[product of max terms].
7) Simply F(A,B,C,D)= A’C+C’D+B’C+AB using K- map.
8) Find the no of EPI’s and minimal expression for the following functions.
a. F(A,B,C,D) = ∑m(1, 5, 6, 7, 11, 12, 13, 15)
b. F(A,B,C) = ∑m(0, 2, 3, 4, 5, 6)
c. F(A,B,C) = ∑m(0, 2, 3, 4, 5, 7)
9) A logic circuit implements the following Boolean function
F(A,B,C,D) = A’C +AC’D’
It is given that the input combination A=C=1 can never occur. Find the simplified
expression for F using proper don’t care conditions.
10) Using a Karnaugh Map, simplify the following Boolean function into sum of products
form F(A, B, C, D) = (A’+B’ +C).(B +C +D’).(A+B’ +D).(A’+B +D’).(B’ +C +D).

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