MODULE-3

BASIC STRUCTURE OF COMPUTERS: FUNCTIONAL UNITS, BASIC OPERATIONAL CONCEPTS, BUS STRUCTURE, PERFORMANCE
–PROCESSOR CLOCK, BASIC PERFORMANCE EQUATION, CLOCK RATE, PERFORMANCE MEASUREMENT.

MACHINE INSTRUCTIONS AND PROGRAMS: MEMORY LOCATION AND ADDRESSES, MEMORY OPERATIONS, INSTRUCTION AND
INSTRUCTION SEQUENCING, ADDRESSING MODES.

TEXT BOOK 2: 1.2, 1.3, 1.4, 1.6, 2.2, 2.3, 2.4, 2.5

2. CARL HAMACHER, ZVONKOVRANESIC, SAFWATZAKY, COMPUTER ORGANIZATION, 5 TH EDITION, TATA MCGRAW HILL.
 COMPUTER

• Computer is a fast electronic calculating machine, that accepts digitalized information, process it according to
the internally stored instructions(programs), and produce the resulting output information.
• Computer types:
1. Personal Computer (Desktop Computer)
2. Portable Notebook Computer
3. Workstations
4. Enterprise Systems and servers(Mainframes)
5. Super Computers
 FUNCTIONAL UNITS

A computer consists of five functionally independent main parts: input, output, memory,
arithmetic and logic, and control units, as shown in Figure
• The input unit accepts coded information from human
operators using devices such as keyboards, or from other
computers over digital communication lines.
• The information received is stored in the computer‟s
memory, either for later use or to be processed immediately
by the arithmetic and logic unit.
• The processing steps are specified by a program that is also
stored in the memory.
• Finally, the results are sent back to the outside world
through the output unit.
• All of these actions are coordinated by the control unit.
• An interconnection network provides the means for the
functional units to exchange information and coordinate their
actions.
 INPUT UNITS
• Computers accept coded information through input units.
• The most common input device is the keyboard.
• Whenever a key is pressed, the corresponding letter or digit is automatically
translated into its corresponding binary code and transmitted to the
processor.
• Many other kinds of input devices for human-computer interaction are
available , including the touchpad, mouse, joystick, and trackball.
• Microphones can be used to capture audio input which is sampled and
converted into digital codes for storage and processing.
• Cameras can be used to capture video input.
• Digital communication facilities, such as the Internet, can also provide input to
acomputer from other computers and database servers.
 MEMORY UNIT
• The function of the memory unit is to store programs and data.
• The memory consists of a large number of semiconductor storage
cells, each capable of storing one bit of information.
• They are handled in groups of fixed size called words.
• There are two classes of storage, called primary and secondary.
ARITHMETIC AND LOGICAL UNIT
 OUTPUT UNIT

• The output unit is the counterpart of the input unit. Its

function is to send processed results to the outside
world.
 CONTROL UNIT
• Control unit coordinate the functions of different
Functional blocks in the computer.
• The control unit is effectively the nerve center that
sends control signals to other units and senses their
states.
• Control circuits are responsible for generating the
timing signals that govern the transfers and determine
when a given action is to take place.
• Data transfers between the processor and the
memory are also managed by the control unit through
timing signals.
 BASIC OPERATIONAL CONCEPTS
• An appropriate program consisting of list of instructions are required to perform any given task.
• The program to be stored in memory.
• Individual instructions are brought from the memory into the processor, which executes the specified
operation.
• Data required for the operation is also stored in the memory.
CONNECTION BETWEEN PROCESSOR AND MEMORY

• The connection between Memory and

Processor is as shown in the figure.
• The Processor consists of different types of
registers.
1. MAR (Memory Address Register)
2. MDR (Memory Data Register)
3. Control Unit
4. PC (Program Counter)
5. General Purpose Registers
6. IR (Instruction Register)
7. ALU (Arithmetic and Logic Unit)
 The Process: Fetch-Decode-Execute Cycle
These components work together constantly in a three-step process known as the Instruction Cycle:
[Link]:
1. The address in the PC is copied to the MAR.
2. The MAR sends the address to memory via the address bus.
3. The instruction at that address is retrieved from memory and placed into the MDR.
4. The PC is incremented to point to the next instruction.
5. The instruction from the MDR is moved into the IR.

[Link]:
1. The Control Unit (CU) reads the instruction in the IR and decodes it (determines what operation to perform, and
what operands are needed).

[Link]:
1. The CU issues control signals to all relevant components.
2. If an operation is required (e.g., addition), the ALU performs it using data stored in registers (like the AC).
3. The result is written back to a register or back to memory (using the MDR and MAR).
 BUS STRUCTURES

• Bus is defined as set of parallel wires used for data

communication between different parts of computer.
Each wire carries 1 bit of data.

• There are 3 types of buses, namely 1. Address bus

2. Data bus and 3. Control bus

• The I/O devices, Memory and CPU are connected to this bus is as shown in the figure.
• It establishes communication between two devices, at a time.
• There is a variation in the devices connected to this bus in terms of speed of operation.
• Hence to provide the synchronization between two devices, a buffer register is attached to each device. It
holds the data temporarily during the data transfer between two devices.
 PERFORMANCE
• The performance of a Computer System is based on hardware design of the processor and the
instruction set of the processors.
• To obtain high performance of computer system it is necessary to reduce the execution time of the
processor.
• Execution time: It is defined as total time required executing one complete program.
• The processing time of a program includes time taken to read inputs, display outputs, system services,
execution time etc.
• The performance of the processor is inversely proportional to execution time of the processor.
• More performance = Less Execution time.
• Less Performance = More Execution time.
• For best performance, it is necessary to design the compiler, the machine instruction set and the
hardware in a coordinated way.
 PROCESSOR CLOCK
• The processor circuits are controlled by the timing signal called clock.
• Execution of machine instruction can be divided into sequence of task which can be executed in one clock
cycle.
• The length of one clock cycle (P) is the parameter which affect the performance of the processor.
• Clock rate (R) = number of clock cycles per second . (Hz)
• R=1/P.
• The clock rate of personal computer may vary from few hundred million to a billion cycles per second.
• I million = 1Mhz , 1 Billion =1Ghz
 BASIC PERFORMANCE EQUATION
•
 PIPELINE AND SUPERSCALAR OPERATION
• Performance of the computer can improved by overlapping the execution of successive instructions using the technique
called pipelining.
• In the ideal case if all instructions are overlapped to the maximum possible, executions proceeds at the rate of one
instruction completed at one clock cycle and the effective value of S = 1.
• But S=1 can not be attained in practice for many reasons.
• However pipelining increases the rate of executing instructions significantly.
• High degree of concurrency can be achieved if multiple instructions pipelines are implemented in the processor.
• That means multiple functional units are used to create parallel path, through which different instructions can be
executed in parallel.
• This will allow to start the execution of several instructions in every clock cycle. This is called superscalar execution.
• With this the effective value of S can be reduced to less than one. And many of today’s high performance processors are
designed to operate in this manner.
 CLOCK RATE
• There are two possibilities to increase the clock rate
1. Improving Integrated circuit (IC ) technology which makes logic circuits faster and reduce the time
needed to complete a basic steps.
This allows Clock period P to be reduced and clock rate to be increased.
2. Reducing the amount of processing done in one basic step, which makes possible to reduce P.
• As P reduced , R will increase.
• The value of T will be reduced by the same factor as R, because there is no change in S and N .
 INSTRUCTIONS SET: CISC AND RISC
• Simple instructions may require a small number of basic steps to execute.
• Complex instructions may have large number of steps.
• But the simple instruction set processor may require more number of instructions to perform a given
program.
• This will increase N value and reduce S value.
• For complex instruction set processor, individual instruction can perform more task, and it can take less
number of instruction to perform given program. This will reduce N and increase S
 COMPILER
• The compiler translates a high level language program into sequence of machine instructions.
• To reduce N, we need to have suitable machine instruction set and compiler must make best use of
it.
• An optimized compiler takes advantage of features of processor to reduce the product N*S, (ie, total
number of clock cycle needed to execute a program.
• The number of cycle is dependent not only on choice of instructions but also on the order in
which they appear in the program.
• The compiler may rearrange program instructions to achieve better performance.
 PERFORMANCE MEASUREMENT
• It is important to be able to assess the performance of a computer.
• Performance of a computer can also be measured by using benchmark programs.
• SPEC (System Performance Evaluation Corporation) is a non-profitable organization, that measures
performance of computer using SPEC rating.
• The organization publishes the application programs and also time taken to execute these programs
in standard systems.
• SPEC Rating =
 MEMORY LOCATIONS AND ADDRESSES
• Memory is a storage device. It is used to store character operands, data
operands and instructions.
• It consists of number of semiconductor cells and each cell holds 1 bit of
information.
• A group of 8 bits is called as byte and a group of 16 or 32 or 64 bits is called as
word.
• World length = 16 for 16 bit CPU and World length = 32 for 32 bit CPU. Word
length is defined as number of bits in a word.
• Memory is organized in terms of bytes or words.
• Memory of a computer can be schematically represented as a collection of word
as shown in figure.
• The contents of memory location can be accessed for read and write operation.
• The memory is accessed either by specifying address of the memory location or
by name of the memory location.
 ADDRESS SPACE
•
 BYTE ADDRESSABILITY
• Each byte of the memory are addressed; this addressing used in most computers are called byte
addressability.
• Hence Byte Addressability is the process of assignment of address to successive bytes of the memory.
• Byte locations have address 0,1,2,…..
• If the word length of the processor is 32 bits,
successive words are located at address
0,4,8,………..with each word consisting of
4 bytes as shown in fig.
 BIG-ENDIAN AND LITTLE-ENDIAN ASSIGNMENTS
• Two ways in which byte addresses can be assigned in a word are
1. Big Endian lower byte addresses are used for more significant bytes of the word.
2. Little Endian lower byte addresses are used for less significant bytes of the word.
12H 34H 56H 78H
 WORD ALIGNED
• It is process of assignment of addresses of two successive words and this address is the number of
bytes in the word is called as Word alignment.

ACCESSING CHARACTERS AND NUMBERS

The character occupies 1 byte of memory and hence byte
address for memory. The numbers occupies 2 bytes of
memory and hence word address for numbers.
 MEMORY OPERATIONS
• Program Instructions and data operands are stored
in the memory.
• Two basic operations required are Load(or Read or
Fetch) and Store(or Write).
• Load operation transfer a copy of the contents of a
specific memory location to the processor and
memory content remain unchanged.
• Store operation transfer data from the processor to
a specific location in the memory and it overwrites
the content in that location.
 INTRUCTIONS AND INSTRUCTION SEQUENCING
(BASIC OPERATIONS PERFORMED BY PROCESSOR)

• The computer must have instruction capable of performing Four Types

of operation.
1. Data transfer operation( data transfer between memory and
processor)
2. Arithmetic and logical operation
3. Program sequencing and control
4. I/O transfer
 BASIC INSTRUCTION TYPES (FORMATS)
• In computer organization, instruction formats refer to the way instructions are encoded and
represented in machine language.
• Each type of instruction format has its own advantages and disadvantages in terms of code size,
execution time, and flexibility.
1. Zero address Instruction
2. One address
3. Two address instruction
4. Three address instruction
 ZERO ADDRESS INSTRUCTION

• These instructions do not specify any operands or addresses. Instead, they operate on data stored in
registers or memory locations implicitly defined by the instruction.
• A stack-based computer does not use the address field in the instruction. To evaluate an expression, it is
first converted to reverse Polish Notation i.e. Postfix Notation.

Expression: X = (A+B)*(C+D)
Postfixed : X = AB+CD+*
TOP means top of stack
M[X] is any memory location
PUSH W
PUSH X
SUB
PUSH Y
PUSH Z
ADD
MUL
 ONE ADDRESS INSTRUCTIONS
• These instructions specify one operand or address, which typically refers to a memory location or register.
• This uses an implied ACCUMULATOR register for data manipulation. One operand is in the accumulator
and the other is in the register or memory location.
format : Opcode Operand/Address of operand
Expression: X = (A+B)*(C+D)
AC is accumulator
M[] is any memory location
M[T] is temporary location
LOAD A ; AC ← A
MUL B ; AC ← AC × B → (A × B)
ADD C ; AC ← AC + C → (A × B) + C
STORE P ; P ← AC
 TWO ADDRESS INSTRUCTIONS
• These instructions specify two operands or addresses, which may be memory locations or registers.
• The instruction operates on the contents of both operands, and the result may be stored in the same or a
different location.
• For example, a two-address instruction might add the contents of two registers together and store the
result in one of the registers.
• Format Opcode Destination, Source

Expression: X = (A+B)*(C+D)
R1, R2 are registers
M[] is any memory location
MOV R1, M ; R1 ← M
ADD R1, N ; R1 ← R1 + N → (M + N)
SUB R1, R ; R1 ← R1 - R → (M + N) - R
MOV T, R1 ; T ← (M + N) - R
 THREE ADDRESS INSTRUCTIONS
• These instructions specify three operands or addresses, which may be memory locations or registers.
• The instruction operates on the contents of all three operands, and the result may be stored in the same or
a different location.
• Format Opcode Destination, source1, source2

Expression: X = (A+B)*(C+D)
R1, R2 are registers
M[] is any memory location
SUB R1, A, B ; R1 = A - B
SUB R2, C, D ; R2 = C - D
MUL R3, R1, R2 ; R3 = (A - B) * (C - D)
MOV R, R3 ; Store final result in R
 DATA TRANSFER OPERATIONS
• a) Data transfer between two registers.
Format: Opcode Source , Destination
• The processor uses MOV instruction to perform data transfer operation between two registers The
mathematical representation of this instruction is [ R1] → [R2].
Ex : MOV R1 , R2 : R1 and R2 are the registers.
Where MOV is the operation code, R1 is the source operand and R2 is the destination operand. This
instruction transfers the contents of R1 to R2.
• EX: Before the execution of MOV R1,R2, the contents of R1 and R2 are as follows R1 = 34h and R2 = 65h
After the execution of MOV R1, R2, the contents of R1 and R2 are as follows R1 = 34H and R2 = 34H
 B) DATA TRANSFER FROM MEMORY TO REGISTER
• The processor uses LOAD instruction to perform data transfer operation from memory to register.
• The mathematical representation of this instruction is [LOCA] → ACC. Where ACC is the Accumulator.
• Format : opcode operand(source,destination)
Ex: LOAD [LOC] , A For this instruction Memory Location is the source and Accumulator is the
destination.
• Data transfer from Accumulator register to memory : The processor uses STORE instruction to perform
data transfer operation from Accumulator register to memory location.
• The mathematical representation of this instruction is [ACC] → LOCA. Where, ACC is the
Accumulator. Ex: STORE A,[LOC] . For this instruction accumulator is the source and memory location
is the destination.
 INSTRUCTION EXECUTION AND STRAIGHT LINE SEQUENCING

• Let the operation be C [A] +[B].

• Figure shows the possible program segment for this task,
and how it is stored in the memory.
• Let the word length be 32 bits and memory is byte
addressable.
• Execution happens in two phase
a) Instruction Fetch
b) Instruction Execution
 Move N, R1
R1 = N (number of values to add)

R1 will count how many numbers are left.

Clear R0---accumulator
R0 = 0
R0 will hold the running sum.
•The processor calculates the memory
address of:
•NUM1 on first iteration
•NUM2 on second
•NUM3 on third… and so on.
•Then adds that number to R0.
Decrement R1
•R1 = R1 − 1
•Shows one number has been added.
•Branch > 0 LOOP
•If R1 > 0 → go back to LOOP (more numbers left) If R1 == 0 → exit the loop
This is conditional branching.
Move R0, SUM
Store accumulated sum in memory location SUM.
•Two operands (A and B) enter the ALU.
•The ALU performs an operation (ADD,
SUB, etc.) producing output F.
 ADDRESSING MODES
• Different ways in which the location of an
operand is specified in an machine
instruction are called addressing modes
 Effective address or offset: An offset is determined by adding any combination
of three address elements: displacement, base and index.
•Displacement: It is an 8-bit or 16-bit immediate value given in the instruction.
•Base: Contents of base register, BX (Base Register) or BP (Base Pointer
Register).
•Index: Content of index register SI (Source Index Register) or DI (Destination
Index Register). LOAD 20(R2, R3), R1
If:
LOAD 8(R2), R1 Here •R2 (Base) = 2000
•8 = displacement •R3 (Index) = 40
•R2 = base register •Displacement = 20
EA = R2 + 8 Then:
✔ Displacement = a small EA = Base + Index + Displacement
constant added. EA = 2000 + 40 + 20
EA = 2060
MOV R1, 500
Load into R1 the data stored in memory at address 500.
So after execution:
R1 = contents of memory[500] = 20
•A register (example: R1)
holds an address.
•That address points to a
memory location (example:
B).
•Memory location B
contains the actual
operand.
•The instruction uses this
operand.
LOAD 4(R2), R1
If R2 = 1000
EA = 1000 + 4 = 1004
→ R1 = memory[1004]

Used for arrays.

Two registers added to get address.
LOAD (R2, R3), R1
If R2 = 500, R3 = 20
EA = 520
→ R1 = memory[520]

Used for 2D arrays, structure

access.
 PC = 1000
Instruction = JUMP +5

EA = PC + 5
EA = 1000 + 5 = 1005

Relative Addressing = PC + Offset → Effective Address.